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Description
Fuel cells, particularly solid oxide fuel cells (SOFC), are important for the future of greener and more efficient energy sources. Although SOFCs have been in existence for over fifty years, they have not been deployed extensively because they need to be operated at a high temperature (∼1000 °C), are expensive, and have slow response to changes in energy demands. One important need for commercialization of SOFCs is a lowering of their operating temperature, which requires an electrolyte that can operate at lower temperatures. Doped ceria is one such candidate. For this dissertation work I have studied different types of doped ceria to understand the mechanism of oxygen vacancy diffusion through the bulk. Doped ceria is important because they have high ionic conductivities thus making them attractive candidates for the electrolytes of solid oxide fuel cells. In particular, I have studied how the ionic conductivities are improved in these doped materials by studying the oxygen-vacancy formations and migrations. In this dissertation I describe the application of density functional theory (DFT) and Kinetic Lattice Monte Carlo (KLMC) simulations to calculate the vacancy diffusion and ionic conductivities in doped ceria. The dopants used are praseodymium (Pr), gadolinium (Gd), and neodymium (Nd), all belonging to the lanthanide series. The activation energies for vacancy migration between different nearest neighbor (relative to the dopant) positions were calculated using the commercial DFT code VASP (Vienna Ab-initio Simulation Package). These activation energies were then used as inputs to the KLMC code that I co-developed. The KLMC code was run for different temperatures (673 K to 1073 K) and for different dopant concentrations (0 to 40%). These simulations have resulted in the prediction of dopant concentrations for maximum ionic conductivity at a given temperature.
ContributorsAnwar, Shahriar (Author) / Adams, James B (Thesis advisor) / Crozier, Peter (Committee member) / Krause, Stephen (Committee member) / Arizona State University (Publisher)
Created2011
Description
With the increasing focus on developing environmentally benign electronic packages, lead-free solder alloys have received a great deal of attention. Mishandling of packages, during manufacture, assembly, or by the user may cause failure of solder joint. A fundamental understanding of the behavior of lead-free solders under mechanical shock conditions is lacking. Reliable experimental and numerical analysis of lead-free solder joints in the intermediate strain rate regime need to be investigated. This dissertation mainly focuses on exploring the mechanical shock behavior of lead-free tin-rich solder alloys via multiscale modeling and numerical simulations. First, the macroscopic stress/strain behaviors of three bulk lead-free tin-rich solders were tested over a range of strain rates from 0.001/s to 30/s. Finite element analysis was conducted to determine appropriate specimen geometry that could reach a homogeneous stress/strain field and a relatively high strain rate. A novel self-consistent true stress correction method is developed to compensate the inaccuracy caused by the triaxial stress state at the post-necking stage. Then the material property of micron-scale intermetallic was examined by micro-compression test. The accuracy of this measure is systematically validated by finite element analysis, and empirical adjustments are provided. Moreover, the interfacial property of the solder/intermetallic interface is investigated, and a continuum traction-separation law of this interface is developed from an atomistic-based cohesive element method. The macroscopic stress/strain relation and microstructural properties are combined together to form a multiscale material behavior via a stochastic approach for both solder and intermetallic. As a result, solder is modeled by porous plasticity with random voids, and intermetallic is characterized as brittle material with random vulnerable region. Thereafter, the porous plasticity fracture of the solders and the brittle fracture of the intermetallics are coupled together in one finite element model. Finally, this study yields a multiscale model to understand and predict the mechanical shock behavior of lead-free tin-rich solder joints. Different fracture patterns are observed for various strain rates and/or intermetallic thicknesses. The predictions have a good agreement with the theory and experiments.
ContributorsFei, Huiyang (Author) / Jiang, Hanqing (Thesis advisor) / Chawla, Nikhilesh (Thesis advisor) / Tasooji, Amaneh (Committee member) / Mobasher, Barzin (Committee member) / Rajan, Subramaniam D. (Committee member) / Arizona State University (Publisher)
Created2011
Description
Reliable extraction of human pose features that are invariant to view angle and body shape changes is critical for advancing human movement analysis. In this dissertation, the multifactor analysis techniques, including the multilinear analysis and the multifactor Gaussian process methods, have been exploited to extract such invariant pose features from video data by decomposing various key contributing factors, such as pose, view angle, and body shape, in the generation of the image observations. Experimental results have shown that the resulting pose features extracted using the proposed methods exhibit excellent invariance properties to changes in view angles and body shapes. Furthermore, using the proposed invariant multifactor pose features, a suite of simple while effective algorithms have been developed to solve the movement recognition and pose estimation problems. Using these proposed algorithms, excellent human movement analysis results have been obtained, and most of them are superior to those obtained from state-of-the-art algorithms on the same testing datasets. Moreover, a number of key movement analysis challenges, including robust online gesture spotting and multi-camera gesture recognition, have also been addressed in this research. To this end, an online gesture spotting framework has been developed to automatically detect and learn non-gesture movement patterns to improve gesture localization and recognition from continuous data streams using a hidden Markov network. In addition, the optimal data fusion scheme has been investigated for multicamera gesture recognition, and the decision-level camera fusion scheme using the product rule has been found to be optimal for gesture recognition using multiple uncalibrated cameras. Furthermore, the challenge of optimal camera selection in multi-camera gesture recognition has also been tackled. A measure to quantify the complementary strength across cameras has been proposed. Experimental results obtained from a real-life gesture recognition dataset have shown that the optimal camera combinations identified according to the proposed complementary measure always lead to the best gesture recognition results.
ContributorsPeng, Bo (Author) / Qian, Gang (Thesis advisor) / Ye, Jieping (Committee member) / Li, Baoxin (Committee member) / Spanias, Andreas (Committee member) / Arizona State University (Publisher)
Created2011
Description
Process variations have become increasingly important for scaled technologies starting at 45nm. The increased variations are primarily due to random dopant fluctuations, line-edge roughness and oxide thickness fluctuation. These variations greatly impact all aspects of circuit performance and pose a grand challenge to future robust IC design. To improve robustness, efficient methodology is required that considers effect of variations in the design flow. Analyzing timing variability of complex circuits with HSPICE simulations is very time consuming. This thesis proposes an analytical model to predict variability in CMOS circuits that is quick and accurate. There are several analytical models to estimate nominal delay performance but very little work has been done to accurately model delay variability. The proposed model is comprehensive and estimates nominal delay and variability as a function of transistor width, load capacitance and transition time. First, models are developed for library gates and the accuracy of the models is verified with HSPICE simulations for 45nm and 32nm technology nodes. The difference between predicted and simulated σ/μ for the library gates is less than 1%. Next, the accuracy of the model for nominal delay is verified for larger circuits including ISCAS'85 benchmark circuits. The model predicted results are within 4% error of HSPICE simulated results and take a small fraction of the time, for 45nm technology. Delay variability is analyzed for various paths and it is observed that non-critical paths can become critical because of Vth variation. Variability on shortest paths show that rate of hold violations increase enormously with increasing Vth variation.
ContributorsGummalla, Samatha (Author) / Chakrabarti, Chaitali (Thesis advisor) / Cao, Yu (Thesis advisor) / Bakkaloglu, Bertan (Committee member) / Arizona State University (Publisher)
Created2011
Description
Many products undergo several stages of testing ranging from tests on individual components to end-item tests. Additionally, these products may be further "tested" via customer or field use. The later failure of a delivered product may in some cases be due to circumstances that have no correlation with the product's inherent quality. However, at times, there may be cues in the upstream test data that, if detected, could serve to predict the likelihood of downstream failure or performance degradation induced by product use or environmental stresses. This study explores the use of downstream factory test data or product field reliability data to infer data mining or pattern recognition criteria onto manufacturing process or upstream test data by means of support vector machines (SVM) in order to provide reliability prediction models. In concert with a risk/benefit analysis, these models can be utilized to drive improvement of the product or, at least, via screening to improve the reliability of the product delivered to the customer. Such models can be used to aid in reliability risk assessment based on detectable correlations between the product test performance and the sources of supply, test stands, or other factors related to product manufacture. As an enhancement to the usefulness of the SVM or hyperplane classifier within this context, L-moments and the Western Electric Company (WECO) Rules are used to augment or replace the native process or test data used as inputs to the classifier. As part of this research, a generalizable binary classification methodology was developed that can be used to design and implement predictors of end-item field failure or downstream product performance based on upstream test data that may be composed of single-parameter, time-series, or multivariate real-valued data. Additionally, the methodology provides input parameter weighting factors that have proved useful in failure analysis and root cause investigations as indicators of which of several upstream product parameters have the greater influence on the downstream failure outcomes.
ContributorsMosley, James (Author) / Morrell, Darryl (Committee member) / Cochran, Douglas (Committee member) / Papandreou-Suppappola, Antonia (Committee member) / Roberts, Chell (Committee member) / Spanias, Andreas (Committee member) / Arizona State University (Publisher)
Created2011
Description
One of the challenges in future semiconductor device design is excessive rise of power dissipation and device temperatures. With the introduction of new geometrically confined device structures like SOI, FinFET, nanowires and continuous incorporation of new materials with poor thermal conductivities in the device active region, the device thermal problem is expected to become more challenging in coming years. This work examines the degradation in the ON-current due to self-heating effects in 10 nm channel length silicon nanowire transistors. As part of this dissertation, a 3D electrothermal device simulator is developed that self-consistently solves electron Boltzmann transport equation with 3D energy balance equations for both the acoustic and the optical phonons. This device simulator predicts temperature variations and other physical and electrical parameters across the device for different bias and boundary conditions. The simulation results show insignificant current degradation for nanowire self-heating because of pronounced velocity overshoot effect. In addition, this work explores the role of various placement of the source and drain contacts on the magnitude of self-heating effect in nanowire transistors. This work also investigates the simultaneous influence of self-heating and random charge effects on the magnitude of the ON current for both positively and negatively charged single charges. This research suggests that the self-heating effects affect the ON-current in two ways: (1) by lowering the barrier at the source end of the channel, thus allowing more carriers to go through, and (2) via the screening effect of the Coulomb potential. To examine the effect of temperature dependent thermal conductivity of thin silicon films in nanowire transistors, Selberherr's thermal conductivity model is used in the device simulator. The simulations results show larger current degradation because of self-heating due to decreased thermal conductivity . Crystallographic direction dependent thermal conductivity is also included in the device simulations. Larger degradation is observed in the current along the [100] direction when compared to the [110] direction which is in agreement with the values for the thermal conductivity tensor provided by Zlatan Aksamija.
ContributorsHossain, Arif (Author) / Vasileska, Dragica (Thesis advisor) / Ahmed, Shaikh (Committee member) / Bakkaloglu, Bertan (Committee member) / Goodnick, Stephen (Committee member) / Arizona State University (Publisher)
Created2011
Description
This thesis pursues a method to deregulate the electric distribution system and provide support to distributed renewable generation. A locational marginal price is used to determine prices across a distribution network in real-time. The real-time pricing may provide benefits such as a reduced electricity bill, decreased peak demand, and lower emissions. This distribution locational marginal price (D-LMP) determines the cost of electricity at each node in the electrical network. The D-LMP is comprised of the cost of energy, cost of losses, and a renewable energy premium. The renewable premium is an adjustable function to compensate `green' distributed generation. A D-LMP is derived and formulated from the PJM model, as well as several alternative formulations. The logistics and infrastructure an implementation is briefly discussed. This study also takes advantage of the D-LMP real-time pricing to implement distributed storage technology. A storage schedule optimization is developed using linear programming. Day-ahead LMPs and historical load data are used to determine a predictive optimization. A test bed is created to represent a practical electric distribution system. Historical load, solar, and LMP data are used in the test bed to create a realistic environment. A power flow and tabulation of the D-LMPs was conducted for twelve test cases. The test cases included various penetrations of solar photovoltaics (PV), system networking, and the inclusion of storage technology. Tables of the D-LMPs and network voltages are presented in this work. The final costs are summed and the basic economics are examined. The use of a D-LMP can lower costs across a system when advanced technologies are used. Storage improves system costs, decreases losses, improves system load factor, and bolsters voltage. Solar energy provides many of these same attributes at lower penetrations, but high penetrations have a detrimental effect on the system. System networking also increases these positive effects. The D-LMP has a positive impact on residential customer cost, while greatly increasing the costs for the industrial sector. The D-LMP appears to have many positive impacts on the distribution system but proper cost allocation needs further development.
ContributorsKiefer, Brian Daniel (Author) / Heydt, Gerald T (Thesis advisor) / Shunk, Dan (Committee member) / Hedman, Kory (Committee member) / Arizona State University (Publisher)
Created2011
Description
As the 3rd generation solar cell, quantum dot solar cells are expected to outperform the first 2 generations with higher efficiency and lower manufacture cost. Currently the main problems for QD cells are the low conversion efficiency and stability. This work is trying to improve the reliability as well as the device performance by inserting an interlayer between the metal cathode and the active layer. Titanium oxide and a novel nitrogen doped titanium oxide were compared and TiOxNy capped device shown a superior performance and stability to TiOx capped one. A unique light anneal effect on the interfacial layer was discovered first time and proved to be the trigger of the enhancement of both device reliability and efficiency. The efficiency was improved by 300% and the device can retain 73.1% of the efficiency with TiOxNy when normal device completely failed after kept for long time. Photoluminescence indicted an increased charge disassociation rate at TiOxNy interface. External quantum efficiency measurement also inferred a significant performance enhancement in TiOxNy capped device, which resulted in a higher photocurrent. X-ray photoelectron spectrometry was performed to explain the impact of light doping on optical band gap. Atomic force microscopy illustrated the effect of light anneal on quantum dot polymer surface. The particle size is increased and the surface composition is changed after irradiation. The mechanism for performance improvement via a TiOx based interlayer was discussed based on a trap filling model. Then Tunneling AFM was performed to further confirm the reliability of interlayer capped organic photovoltaic devices. As a powerful tool based on SPM technique, tunneling AFM was able to explain the reason for low efficiency in non-capped inverted organic photovoltaic devices. The local injection properties as well as the correspondent topography were compared in organic solar cells with or without TiOx interlayer. The current-voltage characteristics were also tested at a single interested point. A severe short-circuit was discovered in non capped devices and a slight reverse bias leakage current was also revealed in TiOx capped device though tunneling AFM results. The failure reason for low stability in normal devices was also discussed comparing to capped devices.
ContributorsYu, Jialin (Author) / Jabbour, Ghassan E. (Thesis advisor) / Alford, Terry L. (Thesis advisor) / Yu, Hongbin (Committee member) / Arizona State University (Publisher)
Created2011
Description
A dual-channel directional digital hearing aid (DHA) front-end using a fully differential difference amplifier (FDDA) based Microphone interface circuit (MIC) for a capacitive Micro Electro Mechanical Systems (MEMS) microphones and an adaptive-power analog font end (AFE) is presented. The Microphone interface circuit based on FDDA converts the capacitance variations into voltage signal, achieves a noise of 32 dB SPL (sound pressure level) and an SNR of 72 dB, additionally it also performs single to differential conversion allowing for fully differential analog signal chain. The analog front-end consists of 40dB VGA and a power scalable continuous time sigma delta ADC, with 68dB SNR dissipating 67u¬W from a 1.2V supply. The ADC implements a self calibrating feedback DAC, for calibrating the 2nd order non-linearity. The VGA and power scalable ADC is fabricated on 0.25 um CMOS TSMC process. The dual channels of the DHA are precisely matched and achieve about 0.5dB gain mismatch, resulting in greater than 5dB directivity index. This will enable a highly integrated and low power DHA
ContributorsNaqvi, Syed Roomi (Author) / Kiaei, Sayfe (Thesis advisor) / Bakkaloglu, Bertan (Committee member) / Chae, Junseok (Committee member) / Barnby, Hugh (Committee member) / Aberle, James T., 1961- (Committee member) / Arizona State University (Publisher)
Created2011
Description
Silicon nanowires were grown epitaxially on Si (100) and (111) surfaces using the Vapor-Liquid-Solid (VLS) mechanism under both thermal and plasma enhanced growth conditions. Nanowire morphology was investigated as a function of temperature, time, disilane partial pressure and substrate preparation. Silicon nanowires synthesized in low temperature plasma typically curved compared to the linear nanowires grown under simple thermal conditions. The nanowires tended bend more with increasing disilane partial gas pressure up to 25 x10-3 mTorr. The nanowire curvature measured geometrically is correlated with the shift of the main silicon peak obtained in Raman spectroscopy. A mechanistic hypothesis was proposed to explain the bending during plasma activated growth. Additional driving forces related to electrostatic and Van der Waals forces were also discussed. Deduced from a systematic variation of a three-step experimental protocol, the mechanism for bending was associated with asymmetric deposition rate along the outer and inner wall of nanowire. The conditions leading to nanowire branching were also examined using a two-step growth process. Branching morphologies were examined as a function of plasma powers between 1.5 W and 3.5 W. Post-annealing thermal and plasma-assisted treatments in hydrogen were compared to understand the influences in the absence of an external silicon source (otherwise supplied by disilane). Longer and thicker nanowires were associated with longer annealing times due to an Ostwald-like ripening effect. The roles of surface diffusion, gas diffusion, etching and deposition rates were examined.
ContributorsJoun, Hee-Joung (Author) / Petuskey, William T. (Thesis advisor) / Drucker, Jeff (Committee member) / Chizmeshya, Andrew (Committee member) / Arizona State University (Publisher)
Created2011