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- Genre: Doctoral Dissertation
- Creators: Seo, Jae-Sun
- Member of: ASU Electronic Theses and Dissertations
Description
The development of a Solid State Transformer (SST) that incorporates a DC-DC multiport converter to integrate both photovoltaic (PV) power generation and battery energy storage is presented in this dissertation. The DC-DC stage is based on a quad-active-bridge (QAB) converter which not only provides isolation for the load, but also for the PV and storage. The AC-DC stage is implemented with a pulse-width-modulated (PWM) single phase rectifier. A unified gyrator-based average model is developed for a general multi-active-bridge (MAB) converter controlled through phase-shift modulation (PSM). Expressions to determine the power rating of the MAB ports are also derived. The developed gyrator-based average model is applied to the QAB converter for faster simulations of the proposed SST during the control design process as well for deriving the state-space representation of the plant. Both linear quadratic regulator (LQR) and single-input-single-output (SISO) types of controllers are designed for the DC-DC stage. A novel technique that complements the SISO controller by taking into account the cross-coupling characteristics of the QAB converter is also presented herein. Cascaded SISO controllers are designed for the AC-DC stage. The QAB demanded power is calculated at the QAB controls and then fed into the rectifier controls in order to minimize the effect of the interaction between the two SST stages. The dynamic performance of the designed control loops based on the proposed control strategies are verified through extensive simulation of the SST average and switching models. The experimental results presented herein show that the transient responses for each control strategy match those from the simulations results thus validating them.
ContributorsFalcones, Sixifo Daniel (Author) / Ayyanar, Raja (Thesis advisor) / Karady, George G. (Committee member) / Tylavsky, Daniel (Committee member) / Tsakalis, Konstantinos (Committee member) / Arizona State University (Publisher)
Created2011
Description
Due to restructuring and open access to the transmission system, modern electric power systems are being operated closer to their operational limits. Additionally, the secure operational limits of modern power systems have become increasingly difficult to evaluate as the scale of the network and the number of transactions between utilities increase. To account for these challenges associated with the rapid expansion of electric power systems, dynamic equivalents have been widely applied for the purpose of reducing the computational effort of simulation-based transient security assessment. Dynamic equivalents are commonly developed using a coherency-based approach in which a retained area and an external area are first demarcated. Then the coherent generators in the external area are aggregated and replaced by equivalenced models, followed by network reduction and load aggregation. In this process, an improperly defined retained area can result in detrimental impacts on the effectiveness of the equivalents in preserving the dynamic characteristics of the original unreduced system. In this dissertation, a comprehensive approach has been proposed to determine an appropriate retained area boundary by including the critical generators in the external area that are tightly coupled with the initial retained area. Further-more, a systematic approach has also been investigated to efficiently predict the variation in generator slow coherency behavior when the system operating condition is subject to change. Based on this determination, the critical generators in the external area that are tightly coherent with the generators in the initial retained area are retained, resulting in a new retained area boundary. Finally, a novel hybrid dynamic equivalent, consisting of both a coherency-based equivalent and an artificial neural network (ANN)-based equivalent, has been proposed and analyzed. The ANN-based equivalent complements the coherency-based equivalent at all the retained area boundary buses, and it is designed to compensate for the discrepancy between the full system and the conventional coherency-based equivalent. The approaches developed have been validated on a large portion of the Western Electricity Coordinating Council (WECC) system and on a test case including a significant portion of the eastern interconnection.
ContributorsMa, Feng (Author) / Vittal, Vijay (Thesis advisor) / Tylavsky, Daniel (Committee member) / Heydt, Gerald (Committee member) / Si, Jennie (Committee member) / Ayyanar, Raja (Committee member) / Arizona State University (Publisher)
Created2011
Description
Traditional approaches to modeling microgrids include the behavior of each inverter operating in a particular network configuration and at a particular operating point. Such models quickly become computationally intensive for large systems. Similarly, traditional approaches to control do not use advanced methodologies and suffer from poor performance and limited operating range. In this document a linear model is derived for an inverter connected to the Thevenin equivalent of a microgrid. This model is then compared to a nonlinear simulation model and analyzed using the open and closed loop systems in both the time and frequency domains. The modeling error is quantified with emphasis on its use for controller design purposes. Control design examples are given using a Glover McFarlane controller, gain sched- uled Glover McFarlane controller, and bumpless transfer controller which are compared to the standard droop control approach. These examples serve as a guide to illustrate the use of multi-variable modeling techniques in the context of robust controller design and show that gain scheduled MIMO control techniques can extend the operating range of a microgrid. A hardware implementation is used to compare constant gain droop controllers with Glover McFarlane controllers and shows a clear advantage of the Glover McFarlane approach.
ContributorsSteenis, Joel (Author) / Ayyanar, Raja (Thesis advisor) / Mittelmann, Hans (Committee member) / Tsakalis, Konstantinos (Committee member) / Tylavsky, Daniel (Committee member) / Arizona State University (Publisher)
Created2013
Description
With the rapid growth of power systems and the concomitant technological advancements, the goal of achieving smart grids is no longer a vision but a foreseeable reality. Hence, the existing grids are undergoing infrastructural modifications to achieve the diverse characteristics of a smart grid. While there are many subjects associated with the operation of smart grids, this dissertation addresses two important aspects of smart grids: increased penetration of renewable resources, and increased reliance on sensor systems to improve reliability and performance of critical power system components. Present renewable portfolio standards are changing both structural and performance characteristics of power systems by replacing conventional generation with alternate energy resources such as photovoltaic (PV) systems. The present study investigates the impact of increased penetration of PV systems on steady state performance as well as transient stability of a large power system which is a portion of the Western U.S. interconnection. Utility scale and residential rooftop PVs are added to replace a portion of conventional generation resources. While steady state voltages are observed under various PV penetration levels, the impact of reduced inertia on transient stability performance is also examined. The simulation results obtained effectively identify both detrimental and beneficial impacts of increased PV penetration both for steady state stability and transient stability performance. With increased penetration of the renewable energy resources, and with the current loading scenario, more transmission system components such as transformers and circuit breakers are subject to increased stress and overloading. This research work explores the feasibility of increasing system reliability by applying condition monitoring systems to selected circuit breakers and transformers. A very important feature of smart grid technology is that this philosophy decreases maintenance costs by deploying condition monitoring systems that inform the operator of impending failures; or the approach can ameliorate problematic conditions. A method to identify the most critical transformers and circuit breakers with the aid of contingency ranking methods is presented in this study. The work reported in this dissertation parallels an industry sponsored study in which a considerable level of industry input and industry reported concerns are reflected.
ContributorsEftekharnejad, Sara (Author) / Heydt, Gerald (Thesis advisor) / Vittal, Vijay (Thesis advisor) / Si, Jennie (Committee member) / Tylavsky, Daniel (Committee member) / Arizona State University (Publisher)
Created2012
Description
Contemporary methods for dynamic security assessment (DSA) mainly re-ly on time domain simulations to explore the influence of large disturbances in a power system. These methods are computationally intensive especially when the system operating point changes continually. The trajectory sensitivity method, when implemented and utilized as a complement to the existing DSA time domain simulation routine, can provide valuable insights into the system variation in re-sponse to system parameter changes. The implementation of the trajectory sensitivity analysis is based on an open source power system analysis toolbox called PSAT. Eight categories of sen-sitivity elements have been implemented and tested. The accuracy assessment of the implementation demonstrates the validity of both the theory and the imple-mentation. The computational burden introduced by the additional sensitivity equa-tions is relieved by two innovative methods: one is by employing a cluster to per-form the sensitivity calculations in parallel; the other one is by developing a mod-ified very dishonest Newton method in conjunction with the latest sparse matrix processing technology. The relation between the linear approximation accuracy and the perturba-tion size is also studied numerically. It is found that there is a fixed connection between the linear approximation accuracy and the perturbation size. Therefore this finding can serve as a general application guide to evaluate the accuracy of the linear approximation. The applicability of the trajectory sensitivity approach to a large realistic network has been demonstrated in detail. This research work applies the trajectory sensitivity analysis method to the Western Electricity Coordinating Council (WECC) system. Several typical power system dynamic security problems, in-cluding the transient angle stability problem, the voltage stability problem consid-ering load modeling uncertainty and the transient stability constrained interface real power flow limit calculation, have been addressed. Besides, a method based on the trajectory sensitivity approach and the model predictive control has been developed for determination of under frequency load shedding strategy for real time stability assessment. These applications have shown the great efficacy and accuracy of the trajectory sensitivity method in handling these traditional power system stability problems.
ContributorsHou, Guanji (Author) / Vittal, Vijay (Thesis advisor) / Heydt, Gerald (Committee member) / Tylavsky, Daniel (Committee member) / Si, Jennie (Committee member) / Arizona State University (Publisher)
Created2012
Description
The reliability assessment of future distribution networks is an important issue in power engineering for both utilities and customers. This is due to the increasing demand for more reliable service with less interruption frequency and duration. This research consists of two main parts related to the evaluation of the future distribution system reliability. An innovative algorithm named the encoded Markov cut set (EMCS) is proposed to evaluate the reliability of the networked power distribution system. The proposed algorithm is based on the identification of circuit minimal tie sets using the concept of Petri nets. Prime number encoding and unique prime factorization are then utilized to add more flexibility in communicating between the systems states, and to classify the states as tie sets, cut sets, or minimal cut sets. Different reduction and truncation techniques are proposed to reduce the size of the state space. The Markov model is used to compute the availability, mean time to failure, and failure frequency of the network. A well-known Test Bed is used to illustrate the analysis (the Roy Billinton test system (RBTS)), and different load and system reliability indices are calculated. The method shown is algorithmic and appears suitable for off-line comparison of alternative secondary distribution system designs on the basis of their reliability. The second part assesses the impact of the conventional and renewable distributed generation (DG) on the reliability of the future distribution system. This takes into account the variability of the power output of the renewable DG, such as wind and solar DGs, and the chronological nature of the load demand. The stochastic nature of the renewable resources and its influence on the reliability of the system are modeled and studied by computing the adequacy transition rate. Then, an integrated Markov model that incorporates the DG adequacy transition rate, DG mechanical failure, and starting and switching probability is proposed and utilized to give accurate results for the DG reliability impact. The main focus in this research is the conventional, solar, and wind DG units. However, the technique used appears to be applicable to any renewable energy source.
ContributorsAlmuhaini, Mohammad (Author) / Heydt, Gerald (Thesis advisor) / Ayyanar, Raja (Committee member) / Gel, Esma (Committee member) / Tylavsky, Daniel (Committee member) / Arizona State University (Publisher)
Created2012
Description
After a power system blackout, system restoration is the most important task for the operators. Most power systems rely on an off&ndashline; restoration plan and the experience of operators to select scenarios for the black start path. Using an off&ndashline; designed restoration plan based on past experience may not be the most reliable approach under changing network configurations and loading levels. Hence, an objective restoration path selection procedure, including the option to check constraints, may be more responsive in providing directed guidance to the operators to identify the optimal transmission path to deliver power to other power plants or to pick up load as needed. After the system is subjected to a blackout, parallel restoration is an efficient way to speed up the restoration process. For a large scale power system, this system sectionalizing problem is quite complicated when considering black&ndashstart; constraints, generation/load balance constraints and voltage constraints. This dissertation presents an ordered binary decision diagram (OBDD) &ndashbased; system sectionalizing method, by which the splitting points can be quickly found. The simulation results on the IEEE 39 and 118&ndashbus; system show that the method can successfully split the system into subsystems satisfying black&ndashstart; constraints, generation/load balance constraints and voltage constraints. A power transfer distribution factor (PTDF)&ndashbased; approach will be described in this dissertation to check constraints while restoring the system. Two types of restoration performance indices are utilized considering all possible restoration paths, which are then ranked according to their expected performance characteristics as reflected by the restoration performance index. PTDFs and weighting factors are used to determine the ordered list of restoration paths, which can enable the load to be picked up by lightly loaded lines or relieve stress on heavily loaded lines. A transmission path agent can then be formulated by performing the automatic path selection under different system operating conditions. The proposed restoration strategy is tested on the IEEE&ndash39; bus system and on the Western region of the Entergy system. The testing results reveal that the proposed strategy can be used in real time.
ContributorsWang, Chong (Author) / Vittal, Vijay (Thesis advisor) / Tylavsky, Daniel (Committee member) / Heydt, Gerald (Committee member) / Farmer, Richard (Committee member) / Arizona State University (Publisher)
Created2010
Description
Convolutional neural networks(CNNs) achieve high accuracy on large datasets but requires significant computation and storage requirement for training/testing. While many applications demand low latency and energy-efficient processing of the images, deploying these complex algorithms on the hardware is a challenging task. This dissertation first presents a compiler-based CNN training accelerator using DDR3 and HBM2 memory. An optimized RTL library is implemented to perform training-specific tasks and an RTL compiler is developed to generate FPGA-synthesizable RTL based on user-defined constraints. High Bandwidth Memory(HBM) provides efficient off-chip communication and improves the training performance. The impact of HBM2 on CNN training workloads is analyzed and compressively compared with DDR3. For training ResNet-20/VGG-like CNNs for the CIFAR-10 dataset, the proposed CNN training accelerator on Stratix-10 GX FPGA(DDR3) demonstrates 479 GOPS performance, and on Stratix-10 MX FPGA(HBM) shows 4.5/9.7 X energy-efficiency improvement compared to Tesla V100 GPU. Next, the FPGA online learning accelerator is presented. Adopting model segmentation techniques from Progressive Segmented Training(PST), the online learning accelerator achieved a 4.2X reduction in training latency. Furthermore, this dissertation presents an 8-bit floating-point (FP8) training processor which implements (1) Highly parallel tensor cores that maintain high PE utilization, (2) Hardware-efficient channel gating for dynamic output activation sparsity (3) Dynamic weight sparsity based on group Lasso (4) Gradient skipping based on FP prediction error. The 28nm prototype chip demonstrates significant improvements in FLOPs reduction (7.3×), energy efficiency (16.4 TFLOPS/W), and overall training latency speedup (4.7×) for both supervised training and self-supervised training tasks. In addition to the training accelerators, this dissertation also presents a CNN inference accelerator on ASIC(FixyNN) and FPGA(FixyFPGA). FixyNN consists of a fixed-weight feature extractor that generates ubiquitous CNN features and a conventional programmable CNN accelerator. In the fixed-weight feature extractor, the network weights are hard-coded into hardware and used as a fixed operand for the multiplication. Experimental results demonstrate FixyNN can achieve very high energy efficiencies up to 26.6 TOPS/W, and FixyFPGA achieves $2.34\times$ higher GOPS on ImageNet classification. In summary, this dissertation comprehensively discusses novel architectures of high-performance and energy-efficient ASIC/FPGA CNN inference/training accelerators.
ContributorsKolala Venkataramaniah, Shreyas (Author) / Seo, Jae-Sun (Thesis advisor) / Cao, Yu (Committee member) / Chakrabarti, Chaitali (Committee member) / Fan, Deliang (Committee member) / Arizona State University (Publisher)
Created2022
Description
Artificial Intelligence (AI) and Machine Learning (ML) techniques have come a long way since their inception and have been used to build intelligent systems for a wide range of applications in everyday life. However they are very computationintensive and require transfer of large volume of data from memory to the computation units. This memory access time constitute significant part of the computational latency and a performance bottleneck. To address this limitation and the ever-growing demand for implementation in hand-held and edge-devices, In-memory computing (IMC) based AI/ML hardware accelerators have emerged. First, the dissertation presents an IMC static random access memory (SRAM) based hardware modeling and optimization framework. A unified systematic study closely models the IMC hardware, and investigates how a number of design variables and non-idealities (e.g. device mismatch and ADC quantization) affect the Deep Neural Network (DNN) accuracy of the IMC design. The framework allows co-optimized selection of different design variables accounting for sources of noise in IMC hardware and robust implementation of a high accuracy DNN. Next, it presents a kNN hardware accelerator in 65nm Complementary Metal-Oxide-Semiconductor (CMOS) technology. The accelerator combines an IMC SRAM that is developed for binarized deep neural networks and other digital hardware that performs top-k sorting. The simulated k Nearest Neighbor accelerator design processes up to 17.9 million query vectors per second while consuming 11.8 mW, demonstrating >4.8× energy-efficiency improvement over prior works. This dissertation also presents a novel floating-point precision IMC (FP-IMC) macro with a hybrid architecture that configurably supports two Floating Point (FP) precisions. Implementing FP precision MAC has been a challenge owing to its complexity. The design is implemented on 28nm CMOS, and taped-out on chip demonstrating 12.1 TFLOPS/W and 66.1 TFLOPS/W for 8-bit Floating Point (FP8) and Block Floating point (BF8) respectively. Finally, another iteration of the FP design is presented that is modeled to support multiple precision modes from FP8 up to FP32. Two approaches to the architectural design were compared illustrating the throughput-area overhead trade-off. The simulated design shows a 2.1 × normalized energy-efficiency compared to the on-chip implementation of the FP-IMC.
ContributorsSaikia, Jyotishman (Author) / Seo, Jae-Sun (Thesis advisor) / Chakrabarti, Chaitali (Thesis advisor) / Fan, Deliang (Committee member) / Cao, Yu (Committee member) / Arizona State University (Publisher)
Created2023
Description
Modern-day automobiles are becoming more connected and reliant on wireless connectivity. Thus, automotive electronics can be both a cause of and highly sensitive to electromagnetic interference (EMI), and the consequences of failure can be fatal. Technology advancements in engineering have brought several features into the automotive field but at the expense of electromagnetic compatibility issues. Automotive EMC problems are the result of the emissions from electronic assemblies inside a vehicle and the susceptibility of the electronics when exposed to external EMI sources. In both cases, automotive EMC problems can cause unintended changes in the automotive system operation. Robustness to electromagnetic interference (EMI) is one of the primary design aspects of state-of-the-art automotive ICs like System Basis Chips (SBCs) which provide a wide range of analog, power regulation and digital functions on the same die. One of the primary sources of conducted EMI on the Local Interconnect Network (LIN) driver output is an integrated switching DC-DC regulator noise coupling through the parasitic substrate capacitance of the SBC. In this dissertation an adaptive active EMI cancellation technique to cancel the switching noise of the DC-DC regulator on the LIN driver output to ensure electromagnetic compatibility (EMC) is presented. The proposed active EMI cancellation circuit synthesizes a phase synchronized cancellation pulse which is then injected onto the LIN driver output using an on-chip tunable capacitor array to cancel the switching noise injected via the substrate. The proposed EMI reduction technique can track and cancel substrate noise independent of process technology and device parasitics, input voltage, duty cycle, and loading conditions of the DC-DC switching regulator. The EMI cancellation system is designed and fabricated on a 180nm Bipolar-CMOS-DMOS (BCD) process with an integrated power stage of a DC-DC buck regulator at a switching frequency of 2MHz along with an automotive LIN driver. The EMI cancellation circuit occupies an area of 0.7 mm2, which is less than 3% of the overall area in a standard SBC and consumes 12.5 mW of power and achieves 25 dB reduction of conducted EMI in the LIN driver output’s power spectrum at the switching frequency and its harmonics.
ContributorsRay, Abhishek (Author) / Bakkaloglu, Bertan (Thesis advisor) / Garrity, Douglas (Committee member) / Kitchen, Jennifer (Committee member) / Seo, Jae-Sun (Committee member) / Arizona State University (Publisher)
Created2023