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Description
There is an ever growing need for larger memories which are reliable and fast. New technologies to implement non-volatile memories which are large, fast, compact and cost-efficient are being studied extensively. One of the most promising technologies being developed is the resistive RAM (ReRAM). In ReRAM the resistance of the

There is an ever growing need for larger memories which are reliable and fast. New technologies to implement non-volatile memories which are large, fast, compact and cost-efficient are being studied extensively. One of the most promising technologies being developed is the resistive RAM (ReRAM). In ReRAM the resistance of the device varies with the voltage applied across it. Programmable metallization cells (PMC) is one of the devices belonging to this category of non-volatile memories.

In order to advance the development of these devices, there is a need to develop simulation models which replicate the behavior of these devices in circuits. In this thesis, a verilogA model for the PMC has been developed. The behavior of the model has been tested using DC and transient simulations. Experimental data obtained from testing PMC devices fabricated at Arizona State University have been compared to results obtained from simulation.

A basic memory cell known as the 1T 1R cell built using the PMC has also been simulated and verified. These memory cells have the potential to be building blocks of large scale memories. I believe that the verilogA model developed in this thesis will prove to be a powerful tool for researchers and circuit developers looking to develop non-volatile memories using alternative technologies.
ContributorsBharadwaj, Vineeth (Author) / Barnaby, Hugh (Thesis advisor) / Kozicki, Michael (Committee member) / Mikkola, Esko (Committee member) / Arizona State University (Publisher)
Created2014
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Description
Nonvolatile memory (NVM) technologies have been an integral part of electronic systems for the past 30 years. The ideal non-volatile memory have minimal physical size, energy usage, and cost while having maximal speed, capacity, retention time, and radiation hardness. A promising candidate for next-generation memory is ion-conducting bridging RAM which

Nonvolatile memory (NVM) technologies have been an integral part of electronic systems for the past 30 years. The ideal non-volatile memory have minimal physical size, energy usage, and cost while having maximal speed, capacity, retention time, and radiation hardness. A promising candidate for next-generation memory is ion-conducting bridging RAM which is referred to as programmable metallization cell (PMC), conductive bridge RAM (CBRAM), or electrochemical metallization memory (ECM), which is likely to surpass flash memory in all the ideal memory characteristics. A comprehensive physics-based model is needed to completely understand PMC operation and assist in design optimization.

To advance the PMC modeling effort, this thesis presents a precise physical model parameterizing materials associated with both ion-rich and ion-poor layers of the PMC's solid electrolyte, so that captures the static electrical behavior of the PMC in both its low-resistance on-state (LRS) and high resistance off-state (HRS). The experimental data is measured from a chalcogenide glass PMC designed and manufactured at ASU. The static on- and off-state resistance of a PMC device composed of a layered (Ag-rich/Ag-poor) Ge30Se70 ChG film is characterized and modeled using three dimensional simulation code written in Silvaco Atlas finite element analysis software. Calibrating the model to experimental data enables the extraction of device parameters such as material bandgaps, workfunctions, density of states, carrier mobilities, dielectric constants, and affinities.

The sensitivity of our modeled PMC to the variation of its prominent achieved material parameters is examined on the HRS and LRS impedance behavior.

The obtained accurate set of material parameters for both Ag-rich and Ag-poor ChG systems and process variation verification on electrical characteristics enables greater fidelity in PMC device simulation, which significantly enhances our ability to understand the underlying physics of ChG-based resistive switching memory.
ContributorsRajabi, Saba (Author) / Barnaby, Hugh (Thesis advisor) / Kozicki, Michael (Committee member) / Vasileska, Dragica (Committee member) / Arizona State University (Publisher)
Created2014
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Description
Micro-electro-mechanical systems (MEMS) film bulk acoustic resonator (FBAR) demonstrates label-free biosensing capabilities and is considered to be a promising alternative of quartz crystal microbalance (QCM). FBARs achieve great success in vacuum, or in the air, but find limited applications in liquid media because squeeze damping significantly degrades quality factor (Q)

Micro-electro-mechanical systems (MEMS) film bulk acoustic resonator (FBAR) demonstrates label-free biosensing capabilities and is considered to be a promising alternative of quartz crystal microbalance (QCM). FBARs achieve great success in vacuum, or in the air, but find limited applications in liquid media because squeeze damping significantly degrades quality factor (Q) and results in poor frequency resolution. A transmission-line model shows that by confining the liquid in a thickness comparable to the acoustic wavelength of the resonator, Q can be considerably improved. The devices exhibit damped oscillatory patterns of Q as the liquid thickness varies. Q assumes its maxima and minima when the channel thickness is an odd and even multiple of the quarter-wavelength of the resonance, respectively. Microfluidic channels are integrated with longitudinal-mode FBARs (L-FBARs) to realize this design; a tenfold improvement of Q over fully-immersed devices is experimentally verified. Microfluidic integrated FBAR sensors have been demonstrated for detecting protein binding in liquid and monitoring the Vroman effect (the competitive protein adsorption behavior), showing their potential as a promising bio-analytical tool. A contour-mode FBAR (C-FBAR) is developed to further improve Q and to alleviate the need for complex integration of microfluidic channels. The C-FBAR consists of a suspended piezoelectric ring made of aluminum nitride and is excited in the fundamental radial-extensional mode. By replacing the squeeze damping with shear damping, high Qs (189 in water and 77 in human whole blood) are obtained in semi-infinite depth liquids. The C-FBAR sensors are characterized by aptamer - thrombin binding pairs and aqueous glycerine solutions for mass and viscosity sensing schemes, respectively. The C-FBAR sensor demonstrates accurate viscosity measurement from 1 to 10 centipoise, and can be deployed to monitor in-vitro blood coagulation processes in real time. Results show that its resonant frequency decreases as the viscosity of the blood increases during the fibrin generation process after the coagulation cascade. The coagulation time and the start/end of the fibrin generation are quantitatively determined, showing the C-FBAR can be a low-cost, portable yet reliable tool for hemostasis diagnostics.
ContributorsXu, Wencheng (Author) / Chae, Junseok (Thesis advisor) / Phillips, Stephen (Committee member) / Cao, Yu (Committee member) / Kozicki, Michael (Committee member) / Arizona State University (Publisher)
Created2011
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Description
With the progression of different industries moving away from employing secretaries for business professionals and professors, there exists a void in the area of personal assistance. This problem has existing solutions readily available to replace this service, i.e. secretary or personal assistant, tend to range from expensive and useful to

With the progression of different industries moving away from employing secretaries for business professionals and professors, there exists a void in the area of personal assistance. This problem has existing solutions readily available to replace this service, i.e. secretary or personal assistant, tend to range from expensive and useful to inexpensive and not efficient. This leaves a low cost niche into the market of a virtual office assistant or manager to display messages and to help direct people in obtaining contact information. The development of a low cost solution revolves around the software needed to solve the various problems an accessible and user friendly Virtual Interface in which the owner of the Virtual Office Manager/Assistant can communicate to colleagues who are at standby outside of the owner's office and vice versa. This interface will be allowing the owner to describe the status pertaining to their absence or any other message sent to the interface. For example, the status of the owner's work commute can be described with a simple "Running Late" phrase or a message like "Busy come back in 10 minutes". In addition, any individual with an interest to these entries will have the opportunity to respond back because the device will provide contact information. When idle, the device will show supplemental information such as the owner's calendar and name. The scope of this will be the development and testing of solutions to achieve these goals.
ContributorsOffenberger, Spencer Eliot (Author) / Kozicki, Michael (Thesis director) / Goryll, Michael (Committee member) / Electrical Engineering Program (Contributor) / Computer Science and Engineering Program (Contributor) / Barrett, The Honors College (Contributor)
Created2016-12
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Description
Non-volatile memory (NVM) has become a staple in the everyday life of consumers. NVM manifests inside cell phones, laptops, and most recently, wearable tech such as smart watches. NAND Flash has been an excellent solution to conditions requiring fast, compact NVM. Current technology nodes are nearing the physical limits of

Non-volatile memory (NVM) has become a staple in the everyday life of consumers. NVM manifests inside cell phones, laptops, and most recently, wearable tech such as smart watches. NAND Flash has been an excellent solution to conditions requiring fast, compact NVM. Current technology nodes are nearing the physical limits of scaling, preventing flash from improving. To combat the limitations of flash and to appease consumer demand for progressively faster and denser NVM, new technologies are needed. One possible candidate for the replacement of NAND Flash is programmable metallization cells (PMC). PMC are a type of resistive memory, meaning that they do not rely on charge storage to maintain a logic state. Depending on their application, it is possible that devices containing NVM will be exposed to harsh radiation environments. As part of the process for developing a novel memory technology, it is important to characterize the effects irradiation has on the functionality of the devices.

This thesis characterizes the effects that ionizing γ-ray irradiation has on the retention of the programmed resistive state of a PMC. The PMC devices tested used Ge30Se70 doped with Ag as the solid electrolyte layer and were fabricated by the thesis author in a Class 100 clean room. Individual device tiles were wire bonded into ceramic packages and tested in a biased and floating contact scenario.

The first scenario presented shows that PMC devices are capable of retaining their programmed state up to the maximum exposed total ionizing dose (TID) of 3.1 Mrad(Si). In this first scenario, the contacts of the PMC devices were left floating during exposure. The second scenario tested shows that the PMC devices are capable of retaining their state until the maximum TID of 10.1 Mrad(Si) was reached. The contacts in the second scenario were biased, with a 50 mV read voltage applied to the anode contact. Analysis of the results show that Ge30Se70 PMC are ionizing radiation tolerant and can retain a programmed state to a higher TID than NAND Flash memory.
ContributorsTaggart, Jennifer Lynn (Author) / Barnaby, Hugh (Thesis advisor) / Kozicki, Michael (Committee member) / Holbert, Keith E. (Committee member) / Arizona State University (Publisher)
Created2015
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Description
The partially-depleted (PD) silicon Metal Semiconductor Field Effect Transistor (MESFET) is becoming more and more attractive for analog and RF applications due to its high breakdown voltage. Compared to conventional CMOS high voltage transistors, the silicon MESFET can be fabricated in commercial standard Silicon-on-Insulator (SOI) CMOS foundries without any change

The partially-depleted (PD) silicon Metal Semiconductor Field Effect Transistor (MESFET) is becoming more and more attractive for analog and RF applications due to its high breakdown voltage. Compared to conventional CMOS high voltage transistors, the silicon MESFET can be fabricated in commercial standard Silicon-on-Insulator (SOI) CMOS foundries without any change to the process. The transition frequency of the device is demonstrated to be 45GHz, which makes the MESFET suitable for applications in high power RF power amplifier designs. Also, high breakdown voltage and low turn-on resistance make it the ideal choice for switches in the switching regulator designs. One of the anticipated applications of the MESFET is for the pass device for a low dropout linear regulator. Conventional NMOS and PMOS linear regulators suffer from high dropout voltage, low bandwidth and poor stability issues. In contrast, the N-MESFET pass transistor can provide an ultra-low dropout voltage and high bandwidth without the need for an external compensation capacitor to ensure stability. In this thesis, the design theory and problems of the conventional linear regulators are discussed. N-MESFET low dropout regulators are evaluated and characterized. The error amplifier used a folded cascode architecture with gain boosting. The source follower topology is utilized as the buffer to sink the gate leakage current from the MESFET. A shunt-feedback transistor is added to reduce the output impedance and provide the current adaptively. Measurement results show that the dropout voltage is less than 150 mV for a 1A load current at 1.8V output. Radiation measurements were done for discrete MESFET and fully integrated LDO regulators, which demonstrate their radiation tolerance ability for aerospace applications.
ContributorsChen, Bo (Author) / Thornton, Trevor (Thesis advisor) / Bakkaloglu, Bertan (Committee member) / Goryll, Michael (Committee member) / Arizona State University (Publisher)
Created2013
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Description
The constant scaling of supply voltages in state-of-the-art CMOS processes has led to severe limitations for many analog circuit applications. Some CMOS processes have addressed this issue by adding high voltage MOSFETs to their process. Although it can be a completely viable solution, it usually requires a changing of the

The constant scaling of supply voltages in state-of-the-art CMOS processes has led to severe limitations for many analog circuit applications. Some CMOS processes have addressed this issue by adding high voltage MOSFETs to their process. Although it can be a completely viable solution, it usually requires a changing of the process flow or adding additional steps, which in turn, leads to an increase in fabrication costs. Si-MESFETs (silicon-metal-semiconductor-field-effect-transistors) from Arizona State University (ASU) on the other hand, have an inherent high voltage capability and can be added to any silicon-on-insulator (SOI) or silicon-on-sapphire (SOS) CMOS process free of cost. This has been proved at five different commercial foundries on technologies ranging from 0.5 to 0.15 μm. Another critical issue facing CMOS processes on insulated substrates is the scaling of the thin silicon channel. Consequently, the future direction of SOI/SOS CMOS transistors may trend away from partially depleted (PD) transistors and towards fully depleted (FD) devices. FD-CMOS are already being implemented in multiple applications due to their very low power capability. Since the FD-CMOS market only figures to grow, it is appropriate that MESFETs also be developed for these processes. The beginning of this thesis will focus on the device aspects of both PD and FD-MESFETs including their layout structure, DC and RF characteristics, and breakdown voltage. The second half will then shift the focus towards implementing both types of MESFETs in an analog circuit application. Aside from their high breakdown ability, MESFETs also feature depletion mode operation, easy to adjust but well controlled threshold voltages, and fT's up to 45 GHz. Those unique characteristics can allow certain designs that were previously difficult to implement or prohibitively expensive using conventional technologies to now be achieved. One such application which benefits is low dropout regulators (LDO). By utilizing an n-channel MESFET as the pass transistor, a LDO featuring very low dropout voltage, fast transient response, and stable operation can be achieved without an external capacitance. With the focus of this thesis being MESFET based LDOs, the device discussion will be mostly tailored towards optimally designing MESFETs for this particular application.
ContributorsLepkowski, William (Author) / Thornton, Trevor (Thesis advisor) / Bakkaloglu, Bertan (Committee member) / Goryll, Michael (Committee member) / Ayyanar, Raja (Committee member) / Arizona State University (Publisher)
Created2010
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Description

This creative project is an extension of the work being done as part of Senior Design in<br/>developing the See-Through Car Pillar, a system designed to render the forward car pillars in a car<br/>invisible to the driver so they can have an unobstructed view utilizing displays, sensors, and a<br/>computer. The first

This creative project is an extension of the work being done as part of Senior Design in<br/>developing the See-Through Car Pillar, a system designed to render the forward car pillars in a car<br/>invisible to the driver so they can have an unobstructed view utilizing displays, sensors, and a<br/>computer. The first half of the paper provides the motivation, design and progress of the project, <br/>while the latter half provides a literature survey on current automobile trends, the viability of the<br/>See-Through Car Pillar as a product in the market through case studies, and alternative designs and <br/>technologies that also might address the problem statement.

ContributorsRoy, Delwyn J (Author) / Thornton, Trevor (Thesis director) / Kozicki, Michael (Committee member) / Electrical Engineering Program (Contributor, Contributor) / Barrett, The Honors College (Contributor)
Created2021-05
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Description

This is a test plan document for Team Aegis' capstone project that has the goal of mitigating single event upsets in NAND flash memory caused by space radiation.

ContributorsForman, Oliver Ethan (Co-author) / Smith, Aiden (Co-author) / Salls, Demetra (Co-author) / Kozicki, Michael (Thesis director) / Hodge, Chris (Committee member) / Electrical Engineering Program (Contributor) / Barrett, The Honors College (Contributor)
Created2021-05
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Description

This thesis proposes hardware and software security enhancements to the robotic explorer of a capstone team, in collaboration with the NASA Psyche Mission Student Collaborations program. The NASA Psyche Mission, launching in 2022 and reaching the metallic asteroid of the same name in 2026, will explore from orbit what is

This thesis proposes hardware and software security enhancements to the robotic explorer of a capstone team, in collaboration with the NASA Psyche Mission Student Collaborations program. The NASA Psyche Mission, launching in 2022 and reaching the metallic asteroid of the same name in 2026, will explore from orbit what is hypothesized to be remnant core material of an early planet, potentially providing key insights to planet formation. Following this initial mission, it is possible there would be scientists and engineers interested in proposing a mission to land an explorer on the surface of Psyche to further document various properties of the asteroid. As a proposal for a second mission, an interdisciplinary engineering and science capstone team at Arizona State University designed and constructed a robotic explorer for the hypothesized surfaces of Psyche, capable of semi-autonomously navigating simulated surfaces to collect scientific data from onboard sensors. A critical component of this explorer is the command and data handling subsystem, and as such, the security of this system, though outside the scope of the capstone project, remains a crucial consideration. This thesis proposes the pairing of Trusted Platform Module (TPM) technology for increased hardware security and the implementation of SELinux (Security Enhanced Linux) for increased software security for Earth-based testing as well as space-ready missions.

ContributorsAnderson, Kelly Joanne (Author) / Bowman, Catherine (Thesis director) / Kozicki, Michael (Committee member) / Electrical Engineering Program (Contributor) / Barrett, The Honors College (Contributor)
Created2021-05