Matching Items (28)
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- All Subjects: engineering
- Creators: Bakkaloglu, Bertan
- Creators: Mignolet, Marc
- Member of: ASU Electronic Theses and Dissertations
- Status: Published
Description
Pulse Density Modulation- (PDM-) based class-D amplifiers can reduce non-linearity and tonal content due to carrier signal in Pulse Width Modulation - (PWM-) based amplifiers. However, their low-voltage analog implementations also require a linear- loop filter and a quantizer. A PDM-based class-D audio amplifier using a frequency-domain quantization is presented in this paper. The digital-intensive frequency domain approach achieves high linearity under low-supply regimes. An analog comparator and a single-bit quantizer are replaced with a Current-Controlled Oscillator- (ICO-) based frequency discriminator. By using the ICO as a phase integrator, a third-order noise shaping is achieved using only two analog integrators. A single-loop, singlebit class-D audio amplifier is presented with an H-bridge switching power stage, which is designed and fabricated on a 0.18 um CMOS process, with 6 layers of metal achieving a total harmonic distortion plus noise (THD+N) of 0.065% and a peak power efficiency of 80% while driving a 4-ohms loudspeaker load. The amplifier can deliver the output power of 280 mW.
ContributorsLee, Junghan (Author) / Bakkaloglu, Bertan (Thesis advisor) / Kiaei, Sayfe (Committee member) / Ozev, Sule (Committee member) / Song, Hongjiang (Committee member) / Arizona State University (Publisher)
Created2011
Description
ABSTRACT To meet stringent market demands, manufacturers must produce Radio Frequency (RF) transceivers that provide wireless communication between electronic components used in consumer products at extremely low cost. Semiconductor manufacturers are in a steady race to increase integration levels through advanced system-on-chip (SoC) technology. The testing costs of these devices tend to increase with higher integration levels. As the integration levels increase and the devices get faster, the need for high-calibre low cost test equipment become highly dominant. However testing the overall system becomes harder and more expensive. Traditionally, the transceiver system is tested in two steps utilizing high-calibre RF instrumentation and mixed-signal testers, with separate measurement setups for transmitter and receiver paths. Impairments in the RF front-end, such as the I/Q gain and phase imbalance and nonlinearity, severely affect the performance of the device. The transceiver needs to be characterized in terms of these impairments in order to guarantee good performance and specification requirements. The motivation factor for this thesis is to come up with a low cost and computationally simple extraction technique of these impairments. In the proposed extraction technique, the mapping between transmitter input signals and receiver output signals are used to extract the impairment and nonlinearity parameters. This is done with the help of detailed mathematical modeling of the transceiver. While the overall behavior is nonlinear, both linear and nonlinear models to be used under different test setups are developed. A two step extraction technique has been proposed in this work. The extraction of system parameters is performed by using the mathematical model developed along with a genetic algorithm implemented in MATLAB. The technique yields good extraction results with reasonable error. It uses simple mathematical operation which makes the extraction fast and computationally simple when compared to other existing techniques such as traditional two step dedicated approach, Nonlinear Solver (NLS) approach, etc. It employs frequency domain analysis of low frequency input and output signals, over cumbersome time domain computations. Thus a test method, including detailed behavioral modeling of the transceiver, appropriate test signal design along with a simple algorithm for extraction is presented.
ContributorsSreenivassan, Aiswariya (Author) / Ozev, Sule (Thesis advisor) / Kiaei, Sayfe (Committee member) / Bakkaloglu, Bertan (Committee member) / Arizona State University (Publisher)
Created2011
Description
The partially-depleted (PD) silicon Metal Semiconductor Field Effect Transistor (MESFET) is becoming more and more attractive for analog and RF applications due to its high breakdown voltage. Compared to conventional CMOS high voltage transistors, the silicon MESFET can be fabricated in commercial standard Silicon-on-Insulator (SOI) CMOS foundries without any change to the process. The transition frequency of the device is demonstrated to be 45GHz, which makes the MESFET suitable for applications in high power RF power amplifier designs. Also, high breakdown voltage and low turn-on resistance make it the ideal choice for switches in the switching regulator designs. One of the anticipated applications of the MESFET is for the pass device for a low dropout linear regulator. Conventional NMOS and PMOS linear regulators suffer from high dropout voltage, low bandwidth and poor stability issues. In contrast, the N-MESFET pass transistor can provide an ultra-low dropout voltage and high bandwidth without the need for an external compensation capacitor to ensure stability. In this thesis, the design theory and problems of the conventional linear regulators are discussed. N-MESFET low dropout regulators are evaluated and characterized. The error amplifier used a folded cascode architecture with gain boosting. The source follower topology is utilized as the buffer to sink the gate leakage current from the MESFET. A shunt-feedback transistor is added to reduce the output impedance and provide the current adaptively. Measurement results show that the dropout voltage is less than 150 mV for a 1A load current at 1.8V output. Radiation measurements were done for discrete MESFET and fully integrated LDO regulators, which demonstrate their radiation tolerance ability for aerospace applications.
ContributorsChen, Bo (Author) / Thornton, Trevor (Thesis advisor) / Bakkaloglu, Bertan (Committee member) / Goryll, Michael (Committee member) / Arizona State University (Publisher)
Created2013
Description
The focus of this investigation includes three aspects. First, the development of nonlinear reduced order modeling techniques for the prediction of the response of complex structures exhibiting "large" deformations, i.e. a geometrically nonlinear behavior, and modeled within a commercial finite element code. The present investigation builds on a general methodology, successfully validated in recent years on simpler panel structures, by developing a novel identification strategy of the reduced order model parameters, that enables the consideration of the large number of modes needed for complex structures, and by extending an automatic strategy for the selection of the basis functions used to represent accurately the displacement field. These novel developments are successfully validated on the nonlinear static and dynamic responses of a 9-bay panel structure modeled within Nastran. In addition, a multi-scale approach based on Component Mode Synthesis methods is explored. Second, an assessment of the predictive capabilities of nonlinear reduced order models for the prediction of the large displacement and stress fields of panels that have a geometric discontinuity; a flat panel with a notch was used for this assessment. It is demonstrated that the reduced order models of both virgin and notched panels provide a close match of the displacement field obtained from full finite element analyses of the notched panel for moderately large static and dynamic responses. In regards to stresses, it is found that the notched panel reduced order model leads to a close prediction of the stress distribution obtained on the notched panel as computed by the finite element model. Two enrichment techniques, based on superposition of the notch effects on the virgin panel stress field, are proposed to permit a close prediction of the stress distribution of the notched panel from the reduced order model of the virgin one. A very good prediction of the full finite element results is achieved with both enrichments for static and dynamic responses. Finally, computational challenges associated with the solution of the reduced order model equations are discussed. Two alternatives to reduce the computational time for the solution of these problems are explored.
ContributorsPerez, Ricardo Angel (Author) / Mignolet, Marc (Thesis advisor) / Oswald, Jay (Committee member) / Spottswood, Stephen (Committee member) / Peralta, Pedro (Committee member) / Jiang, Hanqing (Committee member) / Arizona State University (Publisher)
Created2012
Description
This dissertation presents methods for addressing research problems that currently can only adequately be solved using Quality Reliability Engineering (QRE) approaches especially accelerated life testing (ALT) of electronic printed wiring boards with applications to avionics circuit boards. The methods presented in this research are generally applicable to circuit boards, but the data generated and their analysis is for high performance avionics. Avionics equipment typically requires 20 years expected life by aircraft equipment manufacturers and therefore ALT is the only practical way of performing life test estimates. Both thermal and vibration ALT induced failure are performed and analyzed to resolve industry questions relating to the introduction of lead-free solder product and processes into high reliability avionics. In chapter 2, thermal ALT using an industry standard failure machine implementing Interconnect Stress Test (IST) that simulates circuit board life data is compared to real production failure data by likelihood ratio tests to arrive at a mechanical theory. This mechanical theory results in a statistically equivalent energy bound such that failure distributions below a specific energy level are considered to be from the same distribution thus allowing testers to quantify parameter setting in IST prior to life testing. In chapter 3, vibration ALT comparing tin-lead and lead-free circuit board solder designs involves the use of the likelihood ratio (LR) test to assess both complete failure data and S-N curves to present methods for analyzing data. Failure data is analyzed using Regression and two-way analysis of variance (ANOVA) and reconciled with the LR test results that indicating that a costly aging pre-process may be eliminated in certain cases. In chapter 4, vibration ALT for side-by-side tin-lead and lead-free solder black box designs are life tested. Commercial models from strain data do not exist at the low levels associated with life testing and need to be developed because testing performed and presented here indicate that both tin-lead and lead-free solders are similar. In addition, earlier failures due to vibration like connector failure modes will occur before solder interconnect failures.
ContributorsJuarez, Joseph Moses (Author) / Montgomery, Douglas C. (Thesis advisor) / Borror, Connie M. (Thesis advisor) / Gel, Esma (Committee member) / Mignolet, Marc (Committee member) / Pan, Rong (Committee member) / Arizona State University (Publisher)
Created2012
Description
High Pressure Superheater 1 (HPSH1) is the first heat exchange tube bank inside the Heat Recovery Steam Generator (HRSG) to encounter exhaust flue gas from the gas turbine of a Combined Cycle Power Plant. Steam flowing through the HPSH1 gains heat from the flue gas prior to entering the steam turbine. During cold start-ups, rapid temperature changes in operating condition give rise to significant temperature gradients in the thick-walled components of HPSH1 (manifolds, links, and headers). These temperature gradients produce thermal-structural stresses in the components. The resulting high cycle fatigue is a major concern as this can lead to premature failure of the components. The main objective of this project was to address the thermal-structural stress field induced in HPSH1 during a typical cold start-up transient. To this end, computational fluid dynamics (CFD) was used to carry out the thermal-fluid analysis of HPSH1. The calculated temperature distributions in the component walls were the primary inputs for the finite element (FEA) model that performed structural analysis. Thermal-structural analysis was initially carried out at full-load steady state condition in order to gain confidence in the CFD and FEA methodologies. Results of the full-load steady state thermal-fluid analysis were found in agreement with the temperature values measured at specific locations on the outer surfaces of the inlet links and outlet manifold. It was found from the subsequent structural analysis that peak effective stresses were located at the connecting regions of the components and were well below the allowed stress values. Higher temperature differences were observed between the thick-walled HPSH1 components during the cold start-up transient as compared to the full-load steady state operating condition. This was because of the rapid temperature changes that occurred, especially in the steam temperature at the HPSH1 entry, and the different rates of heating or cooling for components with different wall thicknesses. Results of the transient thermal-fluid analysis will be used in future to perform structural analysis of the HPSH1. The developed CFD and FEA models are capable of analyzing various other transients (e.g., hot start-up and shut-down) and determine their influence on the durability of plant components.
ContributorsHardeep Singh (Author) / Roy, Ramendra P. (Thesis advisor) / Lee, Taewoo (Thesis advisor) / Mignolet, Marc (Committee member) / Arizona State University (Publisher)
Created2012
Description
ABSTRACT Ongoing research into wireless transceivers in the 60 GHz band is required to address the demand for high data rate communications systems at a frequency where signal propagation is challenging even over short ranges. This thesis proposes a mixer architecture in Complementary Metal Oxide Semiconductor (CMOS) technology that uses a voltage controlled oscillator (VCO) operating at a fractional multiple of the desired output signal. The proposed topology is different from conventional subharmonic mixing in that the oscillator phase generation circuitry usually required for such a circuit is unnecessary. Analysis and simulations are performed on the proposed mixer circuit in an IBM 90 nm RF process on a 1.2 V supply. A typical RF transmitter system is considered in determining the block requirements needed for the mixer to meet the IEEE 802.11ad 60 GHz Draft Physical Layer Specification. The proposed circuit has a conversion loss of 21 dB at 60 GHz with a 5 dBm LO power at 20 GHz. Input-referred third-order intercept point (IIP3) is 2.93 dBm. The gain and linearity of the proposed mixer are sufficient for Orthogonal Frequency Division Multiplexing (OFDM) modulation at 60 GHz with a transmitted data rate of over 4 Gbps.
ContributorsMartino, Todd Jeffrey (Author) / Kiaei, Sayfe (Thesis advisor) / Bakkaloglu, Bertan (Committee member) / Aberle, James T., 1961- (Committee member) / Arizona State University (Publisher)
Created2010
Description
The constant scaling of supply voltages in state-of-the-art CMOS processes has led to severe limitations for many analog circuit applications. Some CMOS processes have addressed this issue by adding high voltage MOSFETs to their process. Although it can be a completely viable solution, it usually requires a changing of the process flow or adding additional steps, which in turn, leads to an increase in fabrication costs. Si-MESFETs (silicon-metal-semiconductor-field-effect-transistors) from Arizona State University (ASU) on the other hand, have an inherent high voltage capability and can be added to any silicon-on-insulator (SOI) or silicon-on-sapphire (SOS) CMOS process free of cost. This has been proved at five different commercial foundries on technologies ranging from 0.5 to 0.15 μm. Another critical issue facing CMOS processes on insulated substrates is the scaling of the thin silicon channel. Consequently, the future direction of SOI/SOS CMOS transistors may trend away from partially depleted (PD) transistors and towards fully depleted (FD) devices. FD-CMOS are already being implemented in multiple applications due to their very low power capability. Since the FD-CMOS market only figures to grow, it is appropriate that MESFETs also be developed for these processes. The beginning of this thesis will focus on the device aspects of both PD and FD-MESFETs including their layout structure, DC and RF characteristics, and breakdown voltage. The second half will then shift the focus towards implementing both types of MESFETs in an analog circuit application. Aside from their high breakdown ability, MESFETs also feature depletion mode operation, easy to adjust but well controlled threshold voltages, and fT's up to 45 GHz. Those unique characteristics can allow certain designs that were previously difficult to implement or prohibitively expensive using conventional technologies to now be achieved. One such application which benefits is low dropout regulators (LDO). By utilizing an n-channel MESFET as the pass transistor, a LDO featuring very low dropout voltage, fast transient response, and stable operation can be achieved without an external capacitance. With the focus of this thesis being MESFET based LDOs, the device discussion will be mostly tailored towards optimally designing MESFETs for this particular application.
ContributorsLepkowski, William (Author) / Thornton, Trevor (Thesis advisor) / Bakkaloglu, Bertan (Committee member) / Goryll, Michael (Committee member) / Ayyanar, Raja (Committee member) / Arizona State University (Publisher)
Created2010
Description
A major concern in the operation of present-day gas turbine engines is the ingestion of hot mainstream gas into rotor-stator disk cavities of the high-pressure turbine stages. Although the engines require high gas temperature at turbine entry for good performance efficiency, the ingested gas shortens the lives of the cavity internals, particularly that of the rotor disks. Steps such as installing seals at the disk rims and injecting purge (secondary) air bled from the compressor discharge into the cavities are implemented to reduce the gas ingestion. Although there are advantages to the above-mentioned steps, the performance of a gas turbine engine is diminished by the purge air bleed-off. This then requires that the cavity sealing function be achieved with as low a purge air supply rate as possible. This, in turn, renders imperative an in-depth understanding of the pressure and velocity fields in the main gas path and within the disk cavities. In this work, experiments were carried out in a model 1.5-stage (stator-rotor-stator) axial air turbine to study the ingestion of main air into the aft, rotor-stator, disk cavity. The cavity featured rotor and stator rim seals with radial clearance and axial overlap and an inner labyrinth seal. First, time-average static pressure distribution was measured in the main gas path upstream and downstream of the rotor as well as in the cavity to ensure that a nominally steady run condition had been achieved. Main gas ingestion was determined by measuring the concentration distribution of tracer gas (CO2) in the cavity. To map the cavity fluid velocity field, particle image velocimetry was employed. Results are reported for two main air flow rates, two rotor speeds, and four purge air flow rates.
ContributorsJunnarkar, Nihal (Author) / Roy, Ramendra P (Thesis advisor) / Mignolet, Marc (Committee member) / Lee, Taewoo (Committee member) / Arizona State University (Publisher)
Created2010
Description
The technology and science capabilities of SmallSats continue to grow with the increase of capabilities in commercial off the shelf components. However, the maturation of SmallSat hardware has also led to an increase in component power consumption, this poses an issue with using traditional passive thermal management systems (radiators, thermal straps, etc.) to regulate high-power components. High power output becomes limited in order to maintain components within their allowable temperature ranges. The aim of this study is to explore new methods of using additive manufacturing to enable the usage of heat pipe structures on SmallSat platforms up to 3U’s in size. This analysis shows that these novel structures can increase the capabilities of SmallSat platforms by allowing for larger in-use heat loads from a nominal power density of 4.7 x 10^3 W/m3 to a higher 1.0 x 10^4 W/m3 , an order of magnitude increase. In addition, the mechanical properties of the SmallSat structure are also explored to characterize effects to the mechanical integrity of the spacecraft. The results show that the advent of heat pipe integration to the structures of SmallSats will lead to an increase in thermal management capabilities compared to the current state-of-the-art systems, while not reducing the structural integrity of the spacecraft. In turn, this will lead to larger science and technology capabilities for a field that is growing in both the education and private sectors.
ContributorsAcuna, Antonio (Author) / Das, Jnaneshwar (Thesis advisor) / Phelan, Patrick (Thesis advisor) / Mignolet, Marc (Committee member) / Arizona State University (Publisher)
Created2022