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Description
Proton exchange membrane fuel cells (PEMFCs) run on pure hydrogen and oxygen (or air), producing electricity, water, and some heat. This makes PEMFC an attractive option for clean power generation. PEMFCs also operate at low temperature which makes them quick to start up and easy to handle. PEMFCs have several

Proton exchange membrane fuel cells (PEMFCs) run on pure hydrogen and oxygen (or air), producing electricity, water, and some heat. This makes PEMFC an attractive option for clean power generation. PEMFCs also operate at low temperature which makes them quick to start up and easy to handle. PEMFCs have several important limitations which must be overcome before commercial viability can be achieved. Active areas of research into making them commercially viable include reducing the cost, size and weight of fuel cells while also increasing their durability and performance. A growing and important part of this research involves the computer modeling of fuel cells. High quality computer modeling and simulation of fuel cells can help speed up the discovery of optimized fuel cell components. Computer modeling can also help improve fundamental understanding of the mechanisms and reactions that take place within the fuel cell. The work presented in this thesis describes a procedure for utilizing computer modeling to create high quality fuel cell simulations using Ansys Fluent 12.1. Methods for creating computer aided design (CAD) models of fuel cells are discussed. Detailed simulation parameters are described and emphasis is placed on establishing convergence criteria which are essential for producing consistent results. A mesh sensitivity study of the catalyst and membrane layers is presented showing the importance of adhering to strictly defined convergence criteria. A study of iteration sensitivity of the simulation at low and high current densities is performed which demonstrates the variance in the rate of convergence and the absolute difference between solution values derived at low numbers of iterations and high numbers of iterations.
ContributorsArvay, Adam (Author) / Madakannan, Arunachalanadar (Thesis advisor) / Peng, Xihong (Committee member) / Liang, Yong (Committee member) / Subach, James (Committee member) / Arizona State University (Publisher)
Created2011
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Description
Photovoltaic (PV) systems are one of the next generation's renewable energy sources for our world energy demand. PV modules are highly reliable. However, in polluted environments, over time, they will collect grime and dust. There are also limited field data studies about soiling losses on PV modules. The study showed

Photovoltaic (PV) systems are one of the next generation's renewable energy sources for our world energy demand. PV modules are highly reliable. However, in polluted environments, over time, they will collect grime and dust. There are also limited field data studies about soiling losses on PV modules. The study showed how important it is to investigate the effect of tilt angle on soiling. The study includes two sets of mini-modules. Each set has 9 PV modules tilted at 0, 5, 10, 15, 20, 23, 30, 33 and 40°. The first set called "Cleaned" was cleaned every other day. The second set called "Soiled" was never cleaned after the first day. The short circuit current, a measure of irradiance, and module temperature was monitored and recorded every two minutes over three months (January-March 2011). The data were analyzed to investigate the effect of tilt angle on daily and monthly soiling, and hence transmitted solar insolation and energy production by PV modules. The study shows that during the period of January through March 2011 there was an average loss due to soiling of approximately 2.02% for 0° tilt angle. Modules at tilt anlges 23° and 33° also have some insolation losses but do not come close to the module at 0° tilt angle. Tilt anlge 23° has approximately 1.05% monthly insolation loss, and 33° tilt angle has an insolation loss of approximately 0.96%. The soiling effect is present at any tilt angle, but the magnitude is evident: the flatter the solar module is placed the more energy it will lose.
ContributorsCano Valero, José (Author) / Tamizhmani, Govindasamy (Thesis advisor) / Madakannan, Arunachalanadar (Committee member) / Macia, Narciso (Committee member) / Arizona State University (Publisher)
Created2011
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Description
ABSTRACT To meet stringent market demands, manufacturers must produce Radio Frequency (RF) transceivers that provide wireless communication between electronic components used in consumer products at extremely low cost. Semiconductor manufacturers are in a steady race to increase integration levels through advanced system-on-chip (SoC) technology. The testing costs of these devices

ABSTRACT To meet stringent market demands, manufacturers must produce Radio Frequency (RF) transceivers that provide wireless communication between electronic components used in consumer products at extremely low cost. Semiconductor manufacturers are in a steady race to increase integration levels through advanced system-on-chip (SoC) technology. The testing costs of these devices tend to increase with higher integration levels. As the integration levels increase and the devices get faster, the need for high-calibre low cost test equipment become highly dominant. However testing the overall system becomes harder and more expensive. Traditionally, the transceiver system is tested in two steps utilizing high-calibre RF instrumentation and mixed-signal testers, with separate measurement setups for transmitter and receiver paths. Impairments in the RF front-end, such as the I/Q gain and phase imbalance and nonlinearity, severely affect the performance of the device. The transceiver needs to be characterized in terms of these impairments in order to guarantee good performance and specification requirements. The motivation factor for this thesis is to come up with a low cost and computationally simple extraction technique of these impairments. In the proposed extraction technique, the mapping between transmitter input signals and receiver output signals are used to extract the impairment and nonlinearity parameters. This is done with the help of detailed mathematical modeling of the transceiver. While the overall behavior is nonlinear, both linear and nonlinear models to be used under different test setups are developed. A two step extraction technique has been proposed in this work. The extraction of system parameters is performed by using the mathematical model developed along with a genetic algorithm implemented in MATLAB. The technique yields good extraction results with reasonable error. It uses simple mathematical operation which makes the extraction fast and computationally simple when compared to other existing techniques such as traditional two step dedicated approach, Nonlinear Solver (NLS) approach, etc. It employs frequency domain analysis of low frequency input and output signals, over cumbersome time domain computations. Thus a test method, including detailed behavioral modeling of the transceiver, appropriate test signal design along with a simple algorithm for extraction is presented.
ContributorsSreenivassan, Aiswariya (Author) / Ozev, Sule (Thesis advisor) / Kiaei, Sayfe (Committee member) / Bakkaloglu, Bertan (Committee member) / Arizona State University (Publisher)
Created2011
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Description
The partially-depleted (PD) silicon Metal Semiconductor Field Effect Transistor (MESFET) is becoming more and more attractive for analog and RF applications due to its high breakdown voltage. Compared to conventional CMOS high voltage transistors, the silicon MESFET can be fabricated in commercial standard Silicon-on-Insulator (SOI) CMOS foundries without any change

The partially-depleted (PD) silicon Metal Semiconductor Field Effect Transistor (MESFET) is becoming more and more attractive for analog and RF applications due to its high breakdown voltage. Compared to conventional CMOS high voltage transistors, the silicon MESFET can be fabricated in commercial standard Silicon-on-Insulator (SOI) CMOS foundries without any change to the process. The transition frequency of the device is demonstrated to be 45GHz, which makes the MESFET suitable for applications in high power RF power amplifier designs. Also, high breakdown voltage and low turn-on resistance make it the ideal choice for switches in the switching regulator designs. One of the anticipated applications of the MESFET is for the pass device for a low dropout linear regulator. Conventional NMOS and PMOS linear regulators suffer from high dropout voltage, low bandwidth and poor stability issues. In contrast, the N-MESFET pass transistor can provide an ultra-low dropout voltage and high bandwidth without the need for an external compensation capacitor to ensure stability. In this thesis, the design theory and problems of the conventional linear regulators are discussed. N-MESFET low dropout regulators are evaluated and characterized. The error amplifier used a folded cascode architecture with gain boosting. The source follower topology is utilized as the buffer to sink the gate leakage current from the MESFET. A shunt-feedback transistor is added to reduce the output impedance and provide the current adaptively. Measurement results show that the dropout voltage is less than 150 mV for a 1A load current at 1.8V output. Radiation measurements were done for discrete MESFET and fully integrated LDO regulators, which demonstrate their radiation tolerance ability for aerospace applications.
ContributorsChen, Bo (Author) / Thornton, Trevor (Thesis advisor) / Bakkaloglu, Bertan (Committee member) / Goryll, Michael (Committee member) / Arizona State University (Publisher)
Created2013
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Description
Efficiency of components is an ever increasing area of importance to portable applications, where a finite battery means finite operating time. Higher efficiency devices need to be designed that don't compromise on the performance that the consumer has come to expect. Class D amplifiers deliver on the goal of increased

Efficiency of components is an ever increasing area of importance to portable applications, where a finite battery means finite operating time. Higher efficiency devices need to be designed that don't compromise on the performance that the consumer has come to expect. Class D amplifiers deliver on the goal of increased efficiency, but at the cost of distortion. Class AB amplifiers have low efficiency, but high linearity. By modulating the supply voltage of a Class AB amplifier to make a Class H amplifier, the efficiency can increase while still maintaining the Class AB level of linearity. A 92dB Power Supply Rejection Ratio (PSRR) Class AB amplifier and a Class H amplifier were designed in a 0.24um process for portable audio applications. Using a multiphase buck converter increased the efficiency of the Class H amplifier while still maintaining a fast response time to respond to audio frequencies. The Class H amplifier had an efficiency above the Class AB amplifier by 5-7% from 5-30mW of output power without affecting the total harmonic distortion (THD) at the design specifications. The Class H amplifier design met all design specifications and showed performance comparable to the designed Class AB amplifier across 1kHz-20kHz and 0.01mW-30mW. The Class H design was able to output 30mW into 16Ohms without any increase in THD. This design shows that Class H amplifiers merit more research into their potential for increasing efficiency of audio amplifiers and that even simple designs can give significant increases in efficiency without compromising linearity.
ContributorsPeterson, Cory (Author) / Bakkaloglu, Bertan (Thesis advisor) / Barnaby, Hugh (Committee member) / Kiaei, Sayfe (Committee member) / Arizona State University (Publisher)
Created2013
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Description
While the piezoelectric effect has been around for some time, it has only recently caught interest as a potential sustainable energy harvesting device. Piezoelectric energy harvesting has been developed for shoes and panels, but has yet to be integrated into a marketable bicycle tire. For this thesis, the development and

While the piezoelectric effect has been around for some time, it has only recently caught interest as a potential sustainable energy harvesting device. Piezoelectric energy harvesting has been developed for shoes and panels, but has yet to be integrated into a marketable bicycle tire. For this thesis, the development and feasibility of a piezoelectric tire was done. This includes the development of a circuit that incorporates piezoceramic elements, energy harvesting circuitry, and an energy storage device. A single phase circuit was designed using an ac-dc diode rectifier. An electrolytic capacitor was used as the energy storage device. A financial feasibility was also done to determine targets for manufacturing cost and sales price. These models take into account market trends for high performance tires, economies of scale, and the possibility of government subsidies. This research will help understand the potential for the marketability of a piezoelectric energy harvesting tire that can create electricity for remote use. This study found that there are many obstacles that must be addressed before a piezoelectric tire can be marketed to the general public. The power output of this device is miniscule compared to an alkaline battery. In order for this device to approach the power output of an alkaline battery the weight of the device would also become an issue. Additionally this device is very costly compared to the average bicycle tire. Lastly, this device is extreme fragile and easily broken. In order for this device to become marketable the issues of power output, cost, weight, and durability must all be successfully overcome.
ContributorsMalotte, Christopher (Author) / Madakannan, Arunachalanadar (Thesis advisor) / Srinivasan, Devarajan (Committee member) / Rogers, Bradley (Committee member) / Arizona State University (Publisher)
Created2012
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Description
Dye sensitized solar cells (DSSCs) are currently being explored as a cheaper alternative to the more common silicon (Si) solar cell technology. In addition to the cost advantages, DSSCs show good performance in low light conditions and are not sensitive to varying angles of incident light like traditional Si cells.

Dye sensitized solar cells (DSSCs) are currently being explored as a cheaper alternative to the more common silicon (Si) solar cell technology. In addition to the cost advantages, DSSCs show good performance in low light conditions and are not sensitive to varying angles of incident light like traditional Si cells. One of the major challenges facing DSSCs is loss of the liquid electrolyte, through evaporation or leakage, which lowers stability and leads to increased degradation. Current research with solid-state and quasi-solid DSSCs has shown success regarding a reduction of electrolyte loss, but at a cost of lower conversion efficiency output. The research work presented in this paper focuses on the effects of using nanoclay material as a gelator in the electrolyte of the DSSC. The data showed that the quasi-solid cells are more stable than their liquid electrolyte counterparts, and achieved equal or better I-V characteristics. The quasi-solid cells were fabricated with a gel electrolyte that was prepared by adding 7 wt% of Nanoclay, Nanomer® (1.31PS, montmorillonite clay surface modified with 15-35% octadecylamine and 0.5-5 wt% aminopropyltriethoxysilane, Aldrich) to the iodide/triiodide liquid electrolyte, (Iodolyte AN-50, Solaronix). Various gel concentrations were tested in order to find the optimal ratio of nanoclay to liquid. The gel electrolyte made with 7 wt% nanoclay was more viscous, but still thin enough to allow injection with a standard syringe. Batches of cells were fabricated with both liquid and gel electrolyte and were evaluated at STC conditions (25°C, 100 mW/cm2) over time. The gel cells achieved efficiencies as high as 9.18% compared to 9.65% achieved by the liquid cells. After 10 days, the liquid cell decreased to 1.75%, less than 20% of its maximum efficiency. By contrast, the gel cell's efficiency increased for two weeks, and did not decrease to 20% of maximum efficiency until 45 days. After several measurements, the liquid cells showed visible signs of leakage through the sealant, whereas the gel cells did not. This resistance to leakage likely contributed to the improved performance of the quasi-solid cells over time, and is a significant advantage over liquid electrolyte DSSCs.
ContributorsMain, Laura (Author) / Munukutla, Lakshmi (Thesis advisor) / Madakannan, Arunachalanadar (Committee member) / Polesky, Gerald (Committee member) / Arizona State University (Publisher)
Created2012
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Description
Microgrids are a subset of the modern power structure; using distributed generation (DG) to supply power to communities rather than vast regions. The reduced scale mitigates loss allowing the power produced to do more with better control, giving greater security, reliability, and design flexibility. This paper explores the performance and

Microgrids are a subset of the modern power structure; using distributed generation (DG) to supply power to communities rather than vast regions. The reduced scale mitigates loss allowing the power produced to do more with better control, giving greater security, reliability, and design flexibility. This paper explores the performance and cost viability of a hybrid grid-tied microgrid that utilizes Photovoltaic (PV), batteries, and fuel cell (FC) technology. The concept proposes that each community home is equipped with more PV than is required for normal operation. As the homes are part of a microgrid, excess or unused energy from one home is collected for use elsewhere within the microgrid footprint. The surplus power that would have been discarded becomes a community asset, and is used to run intermittent services. In this paper, the modeled community does not have parking adjacent to each home allowing for the installment of a privately owned slower Level 2 charger, making EV ownership option untenable. A solution is to provide a Level 3 DC Quick Charger (DCQC) as the intermittent service. The addition of batteries and Fuel Cells are meant to increase load leveling, reliability, and instill limited island capability.
ContributorsPatterson, Maxx (Author) / Madakannan, Arunachalanadar (Thesis advisor) / Macia, Narciso (Committee member) / Peng, Xihong (Committee member) / Arizona State University (Publisher)
Created2013
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Description
Micro Electro Mechanical Systems (MEMS) is one of the fastest growing field in silicon industry. Low cost production is key for any company to improve their market share. MEMS testing is challenging since input to test a MEMS device require physical stimulus like acceleration, pressure etc. Also, MEMS device vary

Micro Electro Mechanical Systems (MEMS) is one of the fastest growing field in silicon industry. Low cost production is key for any company to improve their market share. MEMS testing is challenging since input to test a MEMS device require physical stimulus like acceleration, pressure etc. Also, MEMS device vary with process and requires calibration to make them reliable. This increases test cost and testing time. This challenge can be overcome by combining electrical stimulus based testing along with statistical analysis on MEMS response for electrical stimulus and also limited physical stimulus response data. This thesis proposes electrical stimulus based built in self test(BIST) which can be used to get MEMS data and later this data can be used for statistical analysis. A capacitive MEMS accelerometer is considered to test this BIST approach. This BIST circuit overhead is less and utilizes most of the standard readout circuit. This thesis discusses accelerometer response for electrical stimulus and BIST architecture. As a part of this BIST circuit, a second order sigma delta modulator has been designed. This modulator has a sampling frequency of 1MHz and bandwidth of 6KHz. SNDR of 60dB is achieved with 1Vpp differential input signal and 3.3V supply
ContributorsKundur, Vinay (Author) / Bakkaloglu, Bertan (Committee member) / Ozev, Sule (Committee member) / Kiaei, Sayfe (Committee member) / Arizona State University (Publisher)
Created2013
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Description
The applications which use MEMS accelerometer have been on rise and many new fields which are using the MEMS devices have been on rise. The industry is trying to reduce the cost of production of these MEMS devices. These devices are manufactured using micromachining and the interface circuitry is manufactured

The applications which use MEMS accelerometer have been on rise and many new fields which are using the MEMS devices have been on rise. The industry is trying to reduce the cost of production of these MEMS devices. These devices are manufactured using micromachining and the interface circuitry is manufactured using CMOS and the final product is integrated on to a single chip. Amount spent on testing of the MEMS devices make up a considerable share of the total final cost of the device. In order to save the cost and time spent on testing, researchers have been trying to develop different methodologies. At present, MEMS devices are tested using mechanical stimuli to measure the device parameters and for calibration the device. This testing is necessary since the MEMS process is not a very well controlled process unlike CMOS. This is done using an ATE and the cost of using ATE (automatic testing equipment) contribute to 30-40% of the devices final cost. This thesis proposes an architecture which can use an Electrical Signal to stimulate the MEMS device and use the data from the MEMS response in approximating the calibration coefficients efficiently. As a proof of concept, we have designed a BIST (Built-in self-test) circuit for MEMS accelerometer. The BIST has an electrical stimulus generator, Capacitance-to-voltage converter, ∑ ∆ ADC. This thesis explains in detail the design of the Electrical stimulus generator. We have also designed a technique to correlate the parameters obtained from electrical stimuli to those obtained by mechanical stimuli. This method is cost effective since the additional circuitry needed to implement BIST is less since the technique utilizes most of the existing standard readout circuitry already present.
ContributorsJangala Naga, Naveen Sai (Author) / Ozev, Sule (Thesis advisor) / Bakkaloglu, Bertan (Committee member) / Kiaei, Sayfe (Committee member) / Arizona State University (Publisher)
Created2014