Matching Items (40)
Filtering by

Clear all filters

150217-Thumbnail Image.png
Description
The past two decades have been monumental in the advancement of microchips designed for a diverse range of medical applications and bio-analysis. Owing to the remarkable progress in micro-fabrication technology, complex chemical and electro-mechanical features can now be integrated into chip-scale devices for use in biosensing and physiological measurements. Some

The past two decades have been monumental in the advancement of microchips designed for a diverse range of medical applications and bio-analysis. Owing to the remarkable progress in micro-fabrication technology, complex chemical and electro-mechanical features can now be integrated into chip-scale devices for use in biosensing and physiological measurements. Some of these devices have made enormous contributions in the study of complex biochemical processes occurring at the molecular and cellular levels while others overcame the challenges of replicating various functions of human organs as implant systems. This thesis presents test data and analysis of two such systems. First, an ISFET based pH sensor is characterized for its performance in a continuous pH monitoring application. Many of the basic properties of ISFETs including I-V characteristics, pH sensitivity and more importantly, its long term drift behavior have been investigated. A new theory based on frequent switching of electric field across the gate oxide to decrease the rate of current drift has been successfully implemented with the help of an automated data acquisition and switching system. The system was further tested for a range of duty cycles in order to accurately determine the minimum length of time required to fully reset the drift. Second, a microfluidic based vestibular implant system was tested for its underlying characteristics as a light sensor. A computer controlled tilt platform was then implemented to further test its sensitivity to inclinations and thus it‟s more important role as a tilt sensor. The sensor operates through means of optoelectronics and relies on the signals generated from photodiode arrays as a result of light being incident on them. ISFET results show a significant drop in the overall drift and good linear characteristics. The drift was seen to reset at less than an hour. The photodiodes show ideal I-V comparison between photoconductive and photovoltaic modes of operation with maximum responsivity at 400nm and a shunt resistance of 394 MΩ. Additionally, post-processing of the tilt sensor to incorporate the sensing fluids is outlined. Based on several test and fabrication results, a possible method of sealing the open cavity of the chip using a UV curable epoxy has been discussed.
ContributorsMamun, Samiha (Author) / Christen, Jennifer Blain (Thesis advisor) / Goryll, Michael (Committee member) / Yu, Hongyu (Committee member) / Arizona State University (Publisher)
Created2011
151804-Thumbnail Image.png
Description
The partially-depleted (PD) silicon Metal Semiconductor Field Effect Transistor (MESFET) is becoming more and more attractive for analog and RF applications due to its high breakdown voltage. Compared to conventional CMOS high voltage transistors, the silicon MESFET can be fabricated in commercial standard Silicon-on-Insulator (SOI) CMOS foundries without any change

The partially-depleted (PD) silicon Metal Semiconductor Field Effect Transistor (MESFET) is becoming more and more attractive for analog and RF applications due to its high breakdown voltage. Compared to conventional CMOS high voltage transistors, the silicon MESFET can be fabricated in commercial standard Silicon-on-Insulator (SOI) CMOS foundries without any change to the process. The transition frequency of the device is demonstrated to be 45GHz, which makes the MESFET suitable for applications in high power RF power amplifier designs. Also, high breakdown voltage and low turn-on resistance make it the ideal choice for switches in the switching regulator designs. One of the anticipated applications of the MESFET is for the pass device for a low dropout linear regulator. Conventional NMOS and PMOS linear regulators suffer from high dropout voltage, low bandwidth and poor stability issues. In contrast, the N-MESFET pass transistor can provide an ultra-low dropout voltage and high bandwidth without the need for an external compensation capacitor to ensure stability. In this thesis, the design theory and problems of the conventional linear regulators are discussed. N-MESFET low dropout regulators are evaluated and characterized. The error amplifier used a folded cascode architecture with gain boosting. The source follower topology is utilized as the buffer to sink the gate leakage current from the MESFET. A shunt-feedback transistor is added to reduce the output impedance and provide the current adaptively. Measurement results show that the dropout voltage is less than 150 mV for a 1A load current at 1.8V output. Radiation measurements were done for discrete MESFET and fully integrated LDO regulators, which demonstrate their radiation tolerance ability for aerospace applications.
ContributorsChen, Bo (Author) / Thornton, Trevor (Thesis advisor) / Bakkaloglu, Bertan (Committee member) / Goryll, Michael (Committee member) / Arizona State University (Publisher)
Created2013
136385-Thumbnail Image.png
Description
The Metal Semiconductor Field Effect Transistor (MESFET) has high potential to enter analog and RF applications due to their high breakdown voltage and switching frequency characteristics. These MESFET devices could allow for high voltage analog circuits to be integrated with low voltage digital circuits on a single chip in an

The Metal Semiconductor Field Effect Transistor (MESFET) has high potential to enter analog and RF applications due to their high breakdown voltage and switching frequency characteristics. These MESFET devices could allow for high voltage analog circuits to be integrated with low voltage digital circuits on a single chip in an extremely cost effective way. Higher integration leads to electronics with increased functionality and a smaller finished product. The MESFETs are designed in-house by the research group led by Dr. Trevor Thornton. The layouts are then sent to multi-project wafer (MPW) integrated circuit foundry companies, such as the Metal Oxide Semiconductor Implementation Service (MOSIS) to be fabricated. Once returned, the electrical characteristics of the devices are measured. The MESFET has been implemented in various applications by the research group, including the low dropout linear regulator (LDO) and RF power amplifier. An advantage of the MESFET is that it can function in extreme environments such as space, allowing for complex electrical systems to continue functioning properly where traditional transistors would fail.
ContributorsKam, Jason (Author) / Thornton, Trevor (Thesis director) / Goryll, Michael (Committee member) / Barrett, The Honors College (Contributor) / Electrical Engineering Program (Contributor)
Created2015-05
149494-Thumbnail Image.png
Description
The constant scaling of supply voltages in state-of-the-art CMOS processes has led to severe limitations for many analog circuit applications. Some CMOS processes have addressed this issue by adding high voltage MOSFETs to their process. Although it can be a completely viable solution, it usually requires a changing of the

The constant scaling of supply voltages in state-of-the-art CMOS processes has led to severe limitations for many analog circuit applications. Some CMOS processes have addressed this issue by adding high voltage MOSFETs to their process. Although it can be a completely viable solution, it usually requires a changing of the process flow or adding additional steps, which in turn, leads to an increase in fabrication costs. Si-MESFETs (silicon-metal-semiconductor-field-effect-transistors) from Arizona State University (ASU) on the other hand, have an inherent high voltage capability and can be added to any silicon-on-insulator (SOI) or silicon-on-sapphire (SOS) CMOS process free of cost. This has been proved at five different commercial foundries on technologies ranging from 0.5 to 0.15 μm. Another critical issue facing CMOS processes on insulated substrates is the scaling of the thin silicon channel. Consequently, the future direction of SOI/SOS CMOS transistors may trend away from partially depleted (PD) transistors and towards fully depleted (FD) devices. FD-CMOS are already being implemented in multiple applications due to their very low power capability. Since the FD-CMOS market only figures to grow, it is appropriate that MESFETs also be developed for these processes. The beginning of this thesis will focus on the device aspects of both PD and FD-MESFETs including their layout structure, DC and RF characteristics, and breakdown voltage. The second half will then shift the focus towards implementing both types of MESFETs in an analog circuit application. Aside from their high breakdown ability, MESFETs also feature depletion mode operation, easy to adjust but well controlled threshold voltages, and fT's up to 45 GHz. Those unique characteristics can allow certain designs that were previously difficult to implement or prohibitively expensive using conventional technologies to now be achieved. One such application which benefits is low dropout regulators (LDO). By utilizing an n-channel MESFET as the pass transistor, a LDO featuring very low dropout voltage, fast transient response, and stable operation can be achieved without an external capacitance. With the focus of this thesis being MESFET based LDOs, the device discussion will be mostly tailored towards optimally designing MESFETs for this particular application.
ContributorsLepkowski, William (Author) / Thornton, Trevor (Thesis advisor) / Bakkaloglu, Bertan (Committee member) / Goryll, Michael (Committee member) / Ayyanar, Raja (Committee member) / Arizona State University (Publisher)
Created2010
134797-Thumbnail Image.png
Description
With the progression of different industries moving away from employing secretaries for business professionals and professors, there exists a void in the area of personal assistance. This problem has existing solutions readily available to replace this service, i.e. secretary or personal assistant, tend to range from expensive and useful to

With the progression of different industries moving away from employing secretaries for business professionals and professors, there exists a void in the area of personal assistance. This problem has existing solutions readily available to replace this service, i.e. secretary or personal assistant, tend to range from expensive and useful to inexpensive and not efficient. This leaves a low cost niche into the market of a virtual office assistant or manager to display messages and to help direct people in obtaining contact information. The development of a low cost solution revolves around the software needed to solve the various problems an accessible and user friendly Virtual Interface in which the owner of the Virtual Office Manager/Assistant can communicate to colleagues who are at standby outside of the owner's office and vice versa. This interface will be allowing the owner to describe the status pertaining to their absence or any other message sent to the interface. For example, the status of the owner's work commute can be described with a simple "Running Late" phrase or a message like "Busy come back in 10 minutes". In addition, any individual with an interest to these entries will have the opportunity to respond back because the device will provide contact information. When idle, the device will show supplemental information such as the owner's calendar and name. The scope of this will be the development and testing of solutions to achieve these goals.
ContributorsOffenberger, Spencer Eliot (Author) / Kozicki, Michael (Thesis director) / Goryll, Michael (Committee member) / Electrical Engineering Program (Contributor) / Computer Science and Engineering Program (Contributor) / Barrett, The Honors College (Contributor)
Created2016-12
168665-Thumbnail Image.png
Description
Disordered many-body systems are ubiquitous in condensed matter physics, materials science and biological systems. Examples include amorphous and glassy states of matter, granular materials, and tissues composed of packings of cells in the extra-cellular matrix (ECM). Understanding the collective emergent properties in these systems is crucial to improving the capability

Disordered many-body systems are ubiquitous in condensed matter physics, materials science and biological systems. Examples include amorphous and glassy states of matter, granular materials, and tissues composed of packings of cells in the extra-cellular matrix (ECM). Understanding the collective emergent properties in these systems is crucial to improving the capability for controlling, engineering and optimizing their behaviors, yet it is extremely challenging due to their complexity and disordered nature. The main theme of the thesis is to address this challenge by characterizing and understanding a variety of disordered many-body systems via unique statistical geometrical and topological tools and the state-of-the-art simulation methods. Two major topics of the thesis are modeling ECM-mediated multicellular dynamics and understanding hyperuniformity in 2D material systems. Collective migration is an important mode of cell movement for several biological processes, and it has been the focus of a large number of studies over the past decades. Hyperuniform (HU) state is a critical state in a many-particle system, an exotic property of condensed matter discovered recently. The main focus of this thesis is to study the mechanisms underlying collective cell migration behaviors by developing theoretical/phenomenological models that capture the features of ECM-mediated mechanical communications in vitro and investigate general conditions that can be imposed on hyperuniformity-preserving and hyperuniformity-generating operations, as well as to understand how various novel transport physical properties arise from the unique hyperuniform long-range correlations.
ContributorsZheng, Yu (Author) / Jiao, Yang (Thesis advisor) / Zhuang, Houlong (Committee member) / Beckstein, Oliver (Committee member) / Ros, Robert (Committee member) / Arizona State University (Publisher)
Created2022
171589-Thumbnail Image.png
Description
Interdigitated back contact (IBC) solar cells have achieved the highest single junction silicon wafer-based solar cell power conversion efficiencies reported to date. This thesis is about the fabrication of a high-efficiency silicon heterojunction IBC solar cell for potential use as the bottom cell for a 3-terminal lattice-matched dilute-nitride Ga (In)NP(As)/Si

Interdigitated back contact (IBC) solar cells have achieved the highest single junction silicon wafer-based solar cell power conversion efficiencies reported to date. This thesis is about the fabrication of a high-efficiency silicon heterojunction IBC solar cell for potential use as the bottom cell for a 3-terminal lattice-matched dilute-nitride Ga (In)NP(As)/Si monolithic tandem solar cell. An effective fabrication process has been developed and the process challenges related to open circuit voltage (Voc), series resistance (Rs), and fill factor (FF) are experimentally analyzed. While wet etching, the sample lost the initial passivation, and by changing the etchant solution and passivation process, the voltage at maximum power recovered to an initial value of over 710 mV before metallization. The factors reducing the series resistance loss in IBC cells were also studied. One of these factors was the Indium Tin Oxide (ITO) sputtering parameters, which impact the conductivity of the ITO layer and transport across the a-Si:H/ITO interface. For the standard recipe, the chamber pressure was 3.5 mTorr with no oxygen partial pressure, and the thickness of the ITO layer in contact with the a-Si:H layers, was optimized to 150 nm. The patterning method for the metal contacts and final annealing also change the contact resistance of the base and emitter stack layers. The final annealing step is necessary to recover the sputtering damage; however, the higher the annealing time the higher the final IBC series resistance. The best efficiency achieved was 19.3% (Jsc = 37 mA/cm2, Voc = 691 mV, FF = 71.7%) on 200 µm thick 1-15 Ω-cm n-type CZ C-Si with a designated area of 4 cm2.
ContributorsMoeini Rizi, Mansoure (Author) / Goodnick, Stephen (Thesis advisor) / Honsberg, Christina (Committee member) / Goryll, Michael (Committee member) / Smith, David (Committee member) / Bowden, Stuart (Committee member) / Arizona State University (Publisher)
Created2022
171937-Thumbnail Image.png
Description
Microstructure refinement and alloy additions are considered potential routes to increase high temperature performance of existing metallic superalloys used under extreme conditions. Nanocrystalline (NC) Cu-10at%Ta exhibits such improvements over microstructurally unstable NC metals, leading to enhanced creep behavior compared to its coarse-grained (CG) counterparts. However, the low melting point of

Microstructure refinement and alloy additions are considered potential routes to increase high temperature performance of existing metallic superalloys used under extreme conditions. Nanocrystalline (NC) Cu-10at%Ta exhibits such improvements over microstructurally unstable NC metals, leading to enhanced creep behavior compared to its coarse-grained (CG) counterparts. However, the low melting point of Cu compared to other FCC metals, e.g., Ni, might lead to an early onset of diffusional creep mechanisms. Thus, this research seeks to study the thermo-mechanical behavior and stability of hierarchical (prepared using arc-melting) and NC (prepared by collaborators through powder pressing and annealing) Ni-Y-Zr alloys where Zr is expected to provide solid solution and grain boundary strengthening in hierarchical and NC alloys, respectively, while Ni-Y and Ni-Zr intermetallic precipitates (IMCs) would provide kinetic stability. Hierarchical alloys had microstructures stable up to 1100 °C with ultrafine eutectic of ~300 nm, dendritic arm spacing of ~10 μm, and grain size ~1-2 mm. Room temperature hardness tests along with uniaxial compression performed at 25 and 600 °C revealed that microhardness and yield strength of hierarchical alloys with small amounts of Y (0.5-1wt%) and Zr (1.5-3 wt%) were comparable to Ni-superalloys, due to the hierarchical microstructure and potential presence of nanoscale IMCs. In contrast, NC alloys of the same composition were found to be twice as hard as the hierarchical alloys. Creep tests at 0.5 homologous temperature showed active Coble creep mechanisms in hierarchical alloys at low stresses with creep rates slower than Fe-based superalloys and dislocation creep mechanisms at higher stresses. Creep in NC alloys at lower stresses was only 20 times faster than hierarchical alloys, with the difference in grain size ranging from 10^3 to 10^6 times at the same temperature. These NC alloys showed enhanced creep properties over other NC metals and are expected to have rates equal to or improved over the CG hierarchical alloys with ECAP processing techniques. Lastly, the in-situ wide-angle x-ray scattering (WAXS) measurements during quasi-static and creep tests implied stresses being carried mostly by the matrix before yielding and in the primary creep stage, respectively, while relaxation was observed in Ni5Zr for both hierarchical and NC alloys. Beyond yielding and in the secondary creep stage, lattice strains reached a steady state, thereby, an equilibrium between plastic strain rates was achieved across different phases, so that deformation reaches a saturation state where strain hardening effects are compensated by recovery mechanisms.
ContributorsSharma, Shruti (Author) / Peralta, Pedro (Thesis advisor) / Alford, Terry (Committee member) / Jiao, Yang (Committee member) / Solanki, Kiran (Committee member) / Arizona State University (Publisher)
Created2022
171806-Thumbnail Image.png
Description
In-field characterization of photovoltaics is crucial to understanding performance and degradation mechanisms, subsequently improving overall reliability and lifespans. Current outdoor characterization is often limited by logistical difficulties, variable weather, and requirements to measure during peak production hours. It becomes a challenge to find a characterization technique that is affordable with

In-field characterization of photovoltaics is crucial to understanding performance and degradation mechanisms, subsequently improving overall reliability and lifespans. Current outdoor characterization is often limited by logistical difficulties, variable weather, and requirements to measure during peak production hours. It becomes a challenge to find a characterization technique that is affordable with a low impact on system performance while still providing useful device parameters. For added complexity, this characterization technique must have the ability to scale for implementation in large powerplant applications. This dissertation addresses some of the challenges of outdoor characterization by expanding the knowledge of a well-known indoor technique referred to as Suns-VOC. Suns-VOC provides a pseudo current-voltage curve that is free of any effects from series resistance. Device parameters can be extracted from this pseudo I-V curve, allowing for subsequent degradation analysis. This work introduces how to use Suns-VOC outdoors while normalizing results based on the different effects of environmental conditions. This technique is validated on single-cells, modules, and small arrays with accuracies capable of measuring yearly degradation. An adaptation to Suns-VOC, referred to as Suns-Voltage-Resistor (Suns-VR), is also introduced to complement the results from Suns-VOC. This work can potentially be used to provide a diagnostic tool for outdoor characterization in various applications, including residential, commercial, and industrial PV systems.
ContributorsKillam, Alexander Cameron (Author) / Bowden, Stuart G (Thesis advisor) / Goryll, Michael (Committee member) / Augusto, Andre (Committee member) / Rand, James (Committee member) / Arizona State University (Publisher)
Created2022
168529-Thumbnail Image.png
Description
To keep up with the increasing demand for solar energy, higher efficiencies are necessary while keeping cost at a minimum. The easiest theoretical way to achieve that is using silicon-based multi-junction solar cells. However, there are major challenges in effectively implementing such a system. Much work has been done recently

To keep up with the increasing demand for solar energy, higher efficiencies are necessary while keeping cost at a minimum. The easiest theoretical way to achieve that is using silicon-based multi-junction solar cells. However, there are major challenges in effectively implementing such a system. Much work has been done recently to integrate III-V with Si for multi-junction solar cell purposes. The focus of this paper is to explore GaP-based dilute nitrides as a possible top cell candidate for Si-based multi-junctions. The direct growth of dilute nitrides in a lattice-matched configuration epitaxially in literature is reviewed. The problems associated with such growths are outlined and pathways to mitigate these problems are presented. The need for a GaP buffer layer between the dilute nitride film and Si is established. Defects in GaP/Si system are explored in detail and a study on pit formation during such growth is performed. Effective suppression of pits in GaP surface grown on Si is achieved. Issues facing GaP-based dilute nitrides in terms of material properties are outlined. Review of these challenges is done and some possible future areas of interest to improve material quality are established. Finally, the growth process of dilute nitrides using Molecular Beam Epitaxy tool is explained. Results for GaNP grown on Si pre and post growth treatments are detailed.
ContributorsMurali, Srinath (Author) / Honsberg, Christiana (Thesis advisor) / Goodnick, Stephen (Committee member) / King, Richard (Committee member) / Goryll, Michael (Committee member) / Arizona State University (Publisher)
Created2022