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The rapid advancement of wireless technology has instigated the broad deployment of wireless networks. Different types of networks have been developed, including wireless sensor networks, mobile ad hoc networks, wireless local area networks, and cellular networks. These networks have different structures and applications, and require different control algorithms. The focus

The rapid advancement of wireless technology has instigated the broad deployment of wireless networks. Different types of networks have been developed, including wireless sensor networks, mobile ad hoc networks, wireless local area networks, and cellular networks. These networks have different structures and applications, and require different control algorithms. The focus of this thesis is to design scheduling and power control algorithms in wireless networks, and analyze their performances. In this thesis, we first study the multicast capacity of wireless ad hoc networks. Gupta and Kumar studied the scaling law of the unicast capacity of wireless ad hoc networks. They derived the order of the unicast throughput, as the number of nodes in the network goes to infinity. In our work, we characterize the scaling of the multicast capacity of large-scale MANETs under a delay constraint D. We first derive an upper bound on the multicast throughput, and then propose a lower bound on the multicast capacity by proposing a joint coding-scheduling algorithm that achieves a throughput within logarithmic factor of the upper bound. We then study the power control problem in ad-hoc wireless networks. We propose a distributed power control algorithm based on the Gibbs sampler, and prove that the algorithm is throughput optimal. Finally, we consider the scheduling algorithm in collocated wireless networks with flow-level dynamics. Specifically, we study the delay performance of workload-based scheduling algorithm with SRPT as a tie-breaking rule. We demonstrate the superior flow-level delay performance of the proposed algorithm using simulations.
ContributorsZhou, Shan (Author) / Ying, Lei (Thesis advisor) / Zhang, Yanchao (Committee member) / Zhang, Junshan (Committee member) / Xue, Guoliang (Committee member) / Arizona State University (Publisher)
Created2013
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Electrical neural activity detection and tracking have many applications in medical research and brain computer interface technologies. In this thesis, we focus on the development of advanced signal processing algorithms to track neural activity and on the mapping of these algorithms onto hardware to enable real-time tracking. At the heart

Electrical neural activity detection and tracking have many applications in medical research and brain computer interface technologies. In this thesis, we focus on the development of advanced signal processing algorithms to track neural activity and on the mapping of these algorithms onto hardware to enable real-time tracking. At the heart of these algorithms is particle filtering (PF), a sequential Monte Carlo technique used to estimate the unknown parameters of dynamic systems. First, we analyze the bottlenecks in existing PF algorithms, and we propose a new parallel PF (PPF) algorithm based on the independent Metropolis-Hastings (IMH) algorithm. We show that the proposed PPF-IMH algorithm improves the root mean-squared error (RMSE) estimation performance, and we demonstrate that a parallel implementation of the algorithm results in significant reduction in inter-processor communication. We apply our implementation on a Xilinx Virtex-5 field programmable gate array (FPGA) platform to demonstrate that, for a one-dimensional problem, the PPF-IMH architecture with four processing elements and 1,000 particles can process input samples at 170 kHz by using less than 5% FPGA resources. We also apply the proposed PPF-IMH to waveform-agile sensing to achieve real-time tracking of dynamic targets with high RMSE tracking performance. We next integrate the PPF-IMH algorithm to track the dynamic parameters in neural sensing when the number of neural dipole sources is known. We analyze the computational complexity of a PF based method and propose the use of multiple particle filtering (MPF) to reduce the complexity. We demonstrate the improved performance of MPF using numerical simulations with both synthetic and real data. We also propose an FPGA implementation of the MPF algorithm and show that the implementation supports real-time tracking. For the more realistic scenario of automatically estimating an unknown number of time-varying neural dipole sources, we propose a new approach based on the probability hypothesis density filtering (PHDF) algorithm. The PHDF is implemented using particle filtering (PF-PHDF), and it is applied in a closed-loop to first estimate the number of dipole sources and then their corresponding amplitude, location and orientation parameters. We demonstrate the improved tracking performance of the proposed PF-PHDF algorithm and map it onto a Xilinx Virtex-5 FPGA platform to show its real-time implementation potential. Finally, we propose the use of sensor scheduling and compressive sensing techniques to reduce the number of active sensors, and thus overall power consumption, of electroencephalography (EEG) systems. We propose an efficient sensor scheduling algorithm which adaptively configures EEG sensors at each measurement time interval to reduce the number of sensors needed for accurate tracking. We combine the sensor scheduling method with PF-PHDF and implement the system on an FPGA platform to achieve real-time tracking. We also investigate the sparsity of EEG signals and integrate compressive sensing with PF to estimate neural activity. Simulation results show that both sensor scheduling and compressive sensing based methods achieve comparable tracking performance with significantly reduced number of sensors.
ContributorsMiao, Lifeng (Author) / Chakrabarti, Chaitali (Thesis advisor) / Papandreou-Suppappola, Antonia (Thesis advisor) / Zhang, Junshan (Committee member) / Bliss, Daniel (Committee member) / Kovvali, Narayan (Committee member) / Arizona State University (Publisher)
Created2013
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Description
Voltage Source Converters (VSCs) have been widely used in grid-connected applications with Distributed Energy Resource (DER) and Electric Vehicle (EV) applications. Replacement of traditional thyristors with Silicon/Silicon-Carbide based active switches provides full control capability to the converters and allows bidirectional power flow between the source and active loads. In this

Voltage Source Converters (VSCs) have been widely used in grid-connected applications with Distributed Energy Resource (DER) and Electric Vehicle (EV) applications. Replacement of traditional thyristors with Silicon/Silicon-Carbide based active switches provides full control capability to the converters and allows bidirectional power flow between the source and active loads. In this study, advanced control strategies for DER inverters and EV traction inverters will be explored.Chapter 1 gives a brief introduction to State-of-the-Art of VSC control strategies and summarizes the existing challenges in different applications. Chapter 2 presents multiple advanced control strategies of grid-connected DER inverters. Various grid support functions have been implemented in simulations and hardware experiments under both normal and abnormal operating conditions. Chapter 3 proposes an automated design and optimization process of a robust H-infinity controller to address the stability issue of grid-connected inverters caused by grid impedance variation. The principle of the controller synthesis is to select appropriate weighting functions to shape the systems closed-loop transfer function and to achieve robust stability and robust performance. An optimal controller will be selected by using a 2-Dimensional Pareto Front. Chapter 4 proposes a high-performance 4-layer communication architecture to facilitate the control of a large distribution network with high Photovoltaic (PV) penetration. Multiple strategies have been implemented to address the challenges of coordination between communication and system control and between different communication protocols, which leads to a boost in the communication efficiency and makes the architecture highly scalable, adaptive, and robust. Chapter 5 presents the control strategies of a traditional Modular Multilevel Converter (MMC) and a novel Modular Isolated Multilevel Converter (MIMC) in grid-connected and variable speed drive applications. The proposed MIMC is able to achieve great size reduction for the submodule capacitors since the fundamental and double-line frequency voltage ripple has been cancelled. Chapter 6 shows a detailed hardware and controller design for a 48 V Belt-driven Starter Generator (BSG) inverter using automotive gate driver ICs and microcontroller. The inverter prototype has reached a power density of 333 W/inch3, up to 200 A phase current and 600 Hz output frequency.
ContributorsSi, Yunpeng (Author) / Lei, Qin (Thesis advisor) / Ayyanar, Raja (Committee member) / Vittal, Vijay (Committee member) / Zhang, Junshan (Committee member) / Arizona State University (Publisher)
Created2022