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Description
There is very little in the way of prescriptive procedures to guide designers in tolerance specification. This shortcoming motivated the group at Design Automation Lab to automate tolerancing of mechanical assemblies. GD&T data generated by the Auto-Tolerancing software is semantically represented using a neutral Constraint Tolerance Feature (CTF) graph file

There is very little in the way of prescriptive procedures to guide designers in tolerance specification. This shortcoming motivated the group at Design Automation Lab to automate tolerancing of mechanical assemblies. GD&T data generated by the Auto-Tolerancing software is semantically represented using a neutral Constraint Tolerance Feature (CTF) graph file format that is consistent with the ASME Y14.5 standard and the ISO STEP Part 21 file. The primary objective of this research is to communicate GD&T information from the CTF file to a neutral machine readable format. The latest STEP AP 242 (ISO 10303-242) “Managed model based 3D engineering“ aims to support smart manufacturing by capturing semantic Product Manufacturing Information (PMI) within the 3D model and also helping with long-term archiving of the product information. In line with the recommended practices published by CAx Implementor Forum, this research discusses the implementation of CTF to AP 242 translator. The input geometry available in STEP AP 203 format is pre-processed using STEP-NC DLL and 3D InterOp. While the former is initially used to attach persistent IDs to the topological entities in STEP, the latter retains the IDs during translation to ACIS entities for consumption by other modules in the Auto-tolerancing module. The associativity of GD&T available in CTF file to the input geometry is through persistent IDs. C++ libraries used for the translation to STEP AP 242 is provided by StepTools Inc through the STEP-NC DLL. Finally, the output STEP file is tested using available AP 242 readers and shows full conformance with the STEP standard. Using the output AP 242 file, semantic GDT data can now be automatically consumed by downstream applications such as Computer Aided Process Planning (CAPP), Computer Aided Inspection (CAI), Computer Aided Tolerance Systems (CATS) and Coordinate Measuring Machines (CMM).
ContributorsVenkiteswaran, Adarsh (Author) / Shah, Jami J. (Thesis advisor) / Hardwick, Martin (Committee member) / Davidson, Joseph K. (Committee member) / Arizona State University (Publisher)
Created2016
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Description
Parts are always manufactured with deviations from their nominal geometry due to many reasons such as inherent inaccuracies in the machine tools and environmental conditions. It is a designer job to devise a proper tolerance scheme to allow reasonable freedom to a manufacturer for imperfections without compromising performance. It takes

Parts are always manufactured with deviations from their nominal geometry due to many reasons such as inherent inaccuracies in the machine tools and environmental conditions. It is a designer job to devise a proper tolerance scheme to allow reasonable freedom to a manufacturer for imperfections without compromising performance. It takes years of experience and strong practical knowledge of the device function, manufacturing process and GD&T standards for a designer to create a good tolerance scheme. There is almost no theoretical resource to help designers in GD&T synthesis. As a result, designers often create inconsistent and incomplete tolerance schemes that lead to high assembly scrap rates. Auto-Tolerancing project was started in the Design Automation Lab (DAL) to investigate the degree to which tolerance synthesis can be automated. Tolerance synthesis includes tolerance schema generation (sans tolerance values) and tolerance value allocation. This thesis aims to address the tolerance schema generation. To develop an automated tolerance schema synthesis toolset, to-be-toleranced features need to be identified, required tolerance types should be determined, a scheme for computer representation of the GD&T information need to be developed, sequence of control should be identified, and a procedure for creating datum reference frames (DRFs) should be developed. The first three steps define the architecture of the tolerance schema generation module while the last two steps setup a base to create a proper tolerance scheme with the help of GD&T good practice rules obtained from experts. The GD&T scheme recommended by this module is used by the tolerance value allocation/analysis module to complete the process of automated tolerance synthesis. Various test cases are studied to verify the suitability of this module. The results show that software-generated schemas are proper enough to address the assemblability issues (first order tolerancing). Since this novel technology is at its initial stage of development, performing further researches and case studies will definitely help to improve the software for making more comprehensive tolerance schemas that cover design intent (second order tolerancing) and cost optimization (third order tolerancing).
ContributorsHejazi, Sayed Mohammad (Author) / Shah, Jami J. (Thesis advisor) / Davidson, Joseph K. (Committee member) / Hansford, Dianne (Committee member) / Arizona State University (Publisher)
Created2016