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Description
As the 3rd generation solar cell, quantum dot solar cells are expected to outperform the first 2 generations with higher efficiency and lower manufacture cost. Currently the main problems for QD cells are the low conversion efficiency and stability. This work is trying to improve the reliability as well as

As the 3rd generation solar cell, quantum dot solar cells are expected to outperform the first 2 generations with higher efficiency and lower manufacture cost. Currently the main problems for QD cells are the low conversion efficiency and stability. This work is trying to improve the reliability as well as the device performance by inserting an interlayer between the metal cathode and the active layer. Titanium oxide and a novel nitrogen doped titanium oxide were compared and TiOxNy capped device shown a superior performance and stability to TiOx capped one. A unique light anneal effect on the interfacial layer was discovered first time and proved to be the trigger of the enhancement of both device reliability and efficiency. The efficiency was improved by 300% and the device can retain 73.1% of the efficiency with TiOxNy when normal device completely failed after kept for long time. Photoluminescence indicted an increased charge disassociation rate at TiOxNy interface. External quantum efficiency measurement also inferred a significant performance enhancement in TiOxNy capped device, which resulted in a higher photocurrent. X-ray photoelectron spectrometry was performed to explain the impact of light doping on optical band gap. Atomic force microscopy illustrated the effect of light anneal on quantum dot polymer surface. The particle size is increased and the surface composition is changed after irradiation. The mechanism for performance improvement via a TiOx based interlayer was discussed based on a trap filling model. Then Tunneling AFM was performed to further confirm the reliability of interlayer capped organic photovoltaic devices. As a powerful tool based on SPM technique, tunneling AFM was able to explain the reason for low efficiency in non-capped inverted organic photovoltaic devices. The local injection properties as well as the correspondent topography were compared in organic solar cells with or without TiOx interlayer. The current-voltage characteristics were also tested at a single interested point. A severe short-circuit was discovered in non capped devices and a slight reverse bias leakage current was also revealed in TiOx capped device though tunneling AFM results. The failure reason for low stability in normal devices was also discussed comparing to capped devices.
ContributorsYu, Jialin (Author) / Jabbour, Ghassan E. (Thesis advisor) / Alford, Terry L. (Thesis advisor) / Yu, Hongbin (Committee member) / Arizona State University (Publisher)
Created2011
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Description
Semiconductor nanowires are featured by their unique one-dimensional structure which makes them promising for small scale electronic and photonic device applications. Among them, III-V material nanowires are particularly outstanding due to their good electronic properties. In bulk, these materials reveal electron mobility much higher than conventional silicon based devices, for

Semiconductor nanowires are featured by their unique one-dimensional structure which makes them promising for small scale electronic and photonic device applications. Among them, III-V material nanowires are particularly outstanding due to their good electronic properties. In bulk, these materials reveal electron mobility much higher than conventional silicon based devices, for example at room temperature, InAs field effect transistor (FET) has electron mobility of 40,000 cm2/Vs more than 10 times of Si FET. This makes such materials promising for high speed nanowire FETs. With small bandgap, such as 0.354 eV for InAs and 1.52 eV for GaAs, it does not need high voltage to turn on such devices which leads to low power consumption devices. Another feature of direct bandgap allows their applications of optoelectronic devices such as avalanche photodiodes. However, there are challenges to face up. Due to their large surface to volume ratio, nanowire devices typically are strongly affected by the surface states. Although nanowires can be grown into single crystal structure, people observe crystal defects along the wires which can significantly affect the performance of devices. In this work, FETs made of two types of III-V nanowire, GaAs and InAs, are demonstrated. These nanowires are grown by catalyst-free MOCVD growth method. Vertically nanowires are transferred onto patterned substrates for coordinate calibration. Then electrodes are defined by e-beam lithography followed by deposition of contact metals. Prior to metal deposition, however, the substrates are dipped in ammonium hydroxide solution to remove native oxide layer formed on nanowire surface. Current vs. source-drain voltage with different gate bias are measured at room temperature. GaAs nanowire FETs show photo response while InAs nanowire FETs do not show that. Surface passivation is performed on GaAs FETs by using ammonium surfide solution. The best results on current increase is observed with around 20-30 minutes chemical treatment time. Gate response measurements are performed at room temperature, from which field effect mobility as high as 1490 cm2/Vs is extracted for InAs FETs. One major contributor for this is stacking faults defect existing along nanowires. For InAs FETs, thermal excitations observed from temperature dependent results which leads us to investigate potential barriers.
ContributorsLiang, Hanshuang (Author) / Yu, Hongbin (Thesis advisor) / Ferry, David (Committee member) / Tracy, Clarence (Committee member) / Arizona State University (Publisher)
Created2011
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Description
A numerical study of incremental spin-up and spin-up from rest of a thermally- stratified fluid enclosed within a right circular cylinder with rigid bottom and side walls and stress-free upper surface is presented. Thermally stratified spin-up is a typical example of baroclinity, which is initiated by a sudden increase in

A numerical study of incremental spin-up and spin-up from rest of a thermally- stratified fluid enclosed within a right circular cylinder with rigid bottom and side walls and stress-free upper surface is presented. Thermally stratified spin-up is a typical example of baroclinity, which is initiated by a sudden increase in rotation rate and the tilting of isotherms gives rise to baroclinic source of vorticity. Research by (Smirnov et al. [2010a]) showed the differences in evolution of instabilities when Dirichlet and Neumann thermal boundary conditions were applied at top and bottom walls. Study of parametric variations carried out in this dissertation confirmed the instability patterns observed by them for given aspect ratio and Rossby number values greater than 0.5. Also results reveal that flow maintained axisymmetry and stability for short aspect ratio containers independent of amount of rotational increment imparted. Investigation on vorticity components provides framework for baroclinic vorticity feedback mechanism which plays important role in delayed rise of instabilities when Dirichlet thermal Boundary Conditions are applied.
ContributorsKher, Aditya Deepak (Author) / Chen, Kangping (Thesis advisor) / Huang, Huei-Ping (Committee member) / Herrmann, Marcus (Committee member) / Arizona State University (Publisher)
Created2011
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Description
A workload-aware low-power neuromorphic controller for dynamic power and thermal management in VLSI systems is presented. The neuromorphic controller predicts future workload and temperature values based on the past values and CPU performance counters and preemptively regulates supply voltage and frequency. System-level measurements from stateof-the-art commercial microprocessors are used to

A workload-aware low-power neuromorphic controller for dynamic power and thermal management in VLSI systems is presented. The neuromorphic controller predicts future workload and temperature values based on the past values and CPU performance counters and preemptively regulates supply voltage and frequency. System-level measurements from stateof-the-art commercial microprocessors are used to get workload, temperature and CPU performance counter values. The controller is designed and simulated using circuit-design and synthesis tools. At device-level, on-chip planar inductors suffer from low inductance occupying large chip area. On-chip inductors with integrated magnetic materials are designed, simulated and fabricated to explore performance-efficiency trade offs and explore potential applications such as resonant clocking and on-chip voltage regulation. A system level study is conducted to evaluate the effect of on-chip voltage regulator employing magnetic inductors as the output filter. It is concluded that neuromorphic power controller is beneficial for fine-grained per-core power management in conjunction with on-chip voltage regulators utilizing scaled magnetic inductors.
ContributorsSinha, Saurabh (Author) / Cao, Yu (Thesis advisor) / Bakkaloglu, Bertan (Committee member) / Yu, Hongbin (Committee member) / Christen, Jennifer B. (Committee member) / Arizona State University (Publisher)
Created2011
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Description
Image processing in canals, rivers and other bodies of water has been a very important concern. This research using Image Processing was performed to obtain a photographic evidence of the data of the site which helps in monitoring the conditions of the water body and the surroundings. Images are captured

Image processing in canals, rivers and other bodies of water has been a very important concern. This research using Image Processing was performed to obtain a photographic evidence of the data of the site which helps in monitoring the conditions of the water body and the surroundings. Images are captured using a digital camera and the images are stored onto a datalogger, these images are retrieved using a cellular/ satellite modem. A MATLAB program was designed to obtain the level of water by just entering the file name into to the program, a curve fit model was created to determine the contrast parameters. The contrast parameters were obtained using the data obtained from the gray scale image mainly the mean and variance of the intensity values. The enhanced images are used to determine the level of water by taking pixel intensity plots along the region of interest. The level of water obtained is accurate to less than 2% of the actual level of water observed from the image. High speed imaging in micro channels have various application in industrial field, medical field etc. In medical field it is tested by using blood samples. The experimental procedure proposed determines the flow duration and the defects observed in these channel using a fluid introduced into the micro channel the fluid being water based dye and whole milk. The viscosity of the fluid shows different types of flow patterns and defects in the micro channel. The defects observed vary from a small effect to the flow pattern to an extreme defect in the channel such as obstruction of flow or deformation in the channel. The sample needs to be further analyzed by SEM to get a better insight on the defects.
ContributorsShasedhara, Abhijeet Bangalore (Author) / Lee, Taewoo (Thesis advisor) / Huang, Huei-Ping (Committee member) / Chen, Kangping (Committee member) / Arizona State University (Publisher)
Created2011
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Description
CMOS technology is expected to enter the 10nm regime for future integrated circuits (IC). Such aggressive scaling leads to vastly increased variability, posing a grand challenge to robust IC design. Variations in CMOS are often divided into two types: intrinsic variations and process-induced variations. Intrinsic variations are limited by fundamental

CMOS technology is expected to enter the 10nm regime for future integrated circuits (IC). Such aggressive scaling leads to vastly increased variability, posing a grand challenge to robust IC design. Variations in CMOS are often divided into two types: intrinsic variations and process-induced variations. Intrinsic variations are limited by fundamental physics. They are inherent to CMOS structure, considered as one of the ultimate barriers to the continual scaling of CMOS devices. In this work the three primary intrinsic variations sources are studied, including random dopant fluctuation (RDF), line-edge roughness (LER) and oxide thickness fluctuation (OTF). The research is focused on the modeling and simulation of those variations and their scaling trends. Besides the three variations, a time dependent variation source, Random Telegraph Noise (RTN) is also studied. Different from the other three variations, RTN does not contribute much to the total variation amount, but aggregate the worst case of Vth variations in CMOS. In this work a TCAD based simulation study on RTN is presented, and a new SPICE based simulation method for RTN is proposed for time domain circuit analysis. Process-induced variations arise from the imperfection in silicon fabrication, and vary from foundries to foundries. In this work the layout dependent Vth shift due to Rapid-Thermal Annealing (RTA) are investigated. In this work, we develop joint thermal/TCAD simulation and compact modeling tools to analyze performance variability under various layout pattern densities and RTA conditions. Moreover, we propose a suite of compact models that bridge the underlying RTA process with device parameter change for efficient design optimization.
ContributorsYe, Yun, Ph.D (Author) / Cao, Yu (Thesis advisor) / Yu, Hongbin (Committee member) / Song, Hongjiang (Committee member) / Clark, Lawrence (Committee member) / Arizona State University (Publisher)
Created2011
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Description
Semiconductor nanowires (NWs) are one dimensional materials and have size quantization effect when the diameter is sufficiently small. They can serve as optical wave guides along the length direction and contain optically active gain at the same time. Due to these unique properties, NWs are now very promising and extensively

Semiconductor nanowires (NWs) are one dimensional materials and have size quantization effect when the diameter is sufficiently small. They can serve as optical wave guides along the length direction and contain optically active gain at the same time. Due to these unique properties, NWs are now very promising and extensively studied for nanoscale optoelectronic applications. A systematic and comprehensive optical and microstructural study of several important infrared semiconductor NWs is presented in this thesis, which includes InAs, PbS, InGaAs, erbium chloride silicate and erbium silicate. Micro-photoluminescence (PL) and transmission electron microscope (TEM) were utilized in conjunction to characterize the optical and microstructure of these wires. The focus of this thesis is on optical study of semiconductor NWs in the mid-infrared wavelengths. First, differently structured InAs NWs grown using various methods were characterized and compared. Three main PL peaks which are below, near and above InAs bandgap, respectively, were observed. The octadecylthiol self-assembled monolayer was employed to passivate the surface of InAs NWs to eliminate or reduce the effects of the surface states. The band-edge emission from wurtzite-structured NWs was completely recovered after passivatoin. The passivated NWs showed very good stability in air and under heat. In the second part, mid-infrared optical study was conducted on PbS wires of subwavelength diameter and lasing was demonstrated under optical pumping. The PbS wires were grown on Si substrate using chemical vapor deposition and have a rock-salt cubic structure. Single-mode lasing at the wavelength of ~3000-4000 nm was obtained from single as-grown PbS wire up to the temperature of 115 K. PL characterization was also utilized to demonstrate the highest crystallinity of the vertical arrays of InP and InGaAs/InP composition-graded heterostructure NWs made by a top-down fabrication method. TEM-related measurements were performed to study the crystal structures and elemental compositions of the Er-compound core-shell NWs. The core-shell NWs consist of an orthorhombic-structured erbium chloride silicate shell and a cubic-structured silicon core. These NWs provide unique Si-compatible materials with emission at 1530 nm for optical communications and solid state lasers.
ContributorsSun, Minghua (Author) / Ning, Cun-Zheng (Thesis advisor) / Yu, Hongbin (Committee member) / Carpenter, Ray W. (Committee member) / Johnson, Shane (Committee member) / Arizona State University (Publisher)
Created2011
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Description
A new method of adaptive mesh generation for the computation of fluid flows is investigated. The method utilizes gradients of the flow solution to adapt the size and stretching of elements or volumes in the computational mesh as is commonly done in the conventional Hessian approach. However, in

A new method of adaptive mesh generation for the computation of fluid flows is investigated. The method utilizes gradients of the flow solution to adapt the size and stretching of elements or volumes in the computational mesh as is commonly done in the conventional Hessian approach. However, in the new method, higher-order gradients are used in place of the Hessian. The method is applied to the finite element solution of the incompressible Navier-Stokes equations on model problems. Results indicate that a significant efficiency benefit is realized.
ContributorsShortridge, Randall (Author) / Chen, Kang Ping (Thesis advisor) / Herrmann, Marcus (Thesis advisor) / Wells, Valana (Committee member) / Huang, Huei-Ping (Committee member) / Mittelmann, Hans (Committee member) / Arizona State University (Publisher)
Created2011
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Description
Semiconductor devices are generally analyzed with relatively simple equations or with detailed computer simulations. Most text-books use these simple equations and show device diagrams that are frequently very simplified and occasionally incorrect. For example, the carrier densities near the pinch-off point in MOSFETs and JFETs and the minority carrier density

Semiconductor devices are generally analyzed with relatively simple equations or with detailed computer simulations. Most text-books use these simple equations and show device diagrams that are frequently very simplified and occasionally incorrect. For example, the carrier densities near the pinch-off point in MOSFETs and JFETs and the minority carrier density in the base near the reverse-biased base-collector junction are frequently assumed to be zero or near zero. Also the channel thickness at the pinch-off point is often shown to approach zero. None of these assumptions can be correct. The research in thesis addresses these points. I simulated the carrier densities, potentials, electric fields etc. of MOSFETs, BJTs and JFETs at and near the pinch-off regions to determine exactly what happens there. I also simulated the behavior of the quasi-Fermi levels. For MOSFETs, the channel thickness expands slightly before the pinch-off point and then spreads out quickly in a triangular shape and the space-charge region under the channel actually shrinks as the potential increases from source to drain. For BJTs, with collector-base junction reverse biased, most minority carriers diffuse through the base from emitter to collector very fast, but the minority carrier concentration at the collector-base space-charge region is not zero. For JFETs, the boundaries of the space-charge region are difficult to determine, the channel does not disappear after pinch off, the shape of channel is always tapered, and the carrier concentration in the channel decreases progressively. After simulating traditional sized devices, I also simulated typical nano-scaled devices and show that they behave similarly to large devices. These simulation results provide a more complete understanding of device physics and device operation in those regions usually not addressed in semiconductor device physics books.
ContributorsYang, Xuan (Author) / Schroder, Dieter K. (Thesis advisor) / Vasileska, Dragica (Committee member) / Yu, Hongbin (Committee member) / Arizona State University (Publisher)
Created2011
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Description
The evolution of single hairpin vortices and multiple interacting hairpin vortices are studied in direct numerical simulations of channel flow at Re-tau=395. The purpose of this study is to observe the effects of increased Reynolds number and varying initial conditions on the growth of hairpins and the conditions under which

The evolution of single hairpin vortices and multiple interacting hairpin vortices are studied in direct numerical simulations of channel flow at Re-tau=395. The purpose of this study is to observe the effects of increased Reynolds number and varying initial conditions on the growth of hairpins and the conditions under which single hairpins autogenerate hairpin packets. The hairpin vortices are believed to provide a unified picture of wall turbulence and play an important role in the production of Reynolds shear stress which is directly related to turbulent drag. The structures of the initial three-dimensional vortices are extracted from the two-point spatial correlation of the fully turbulent direct numerical simulation of the velocity field by linear stochastic estimation and embedded in a mean flow having the profile of the fully turbulent flow. The Reynolds number of the present simulation is more than twice that of the Re-tau=180 flow from earlier literature and the conditional events used to define the stochastically estimated single vortex initial conditions include a number of new types of events such as quasi-streamwise vorticity and Q4 events. The effects of parameters like strength, asymmetry and position are evaluated and compared with existing results in the literature. This study then attempts to answer questions concerning how vortex mergers produce larger scale structures, a process that may contribute to the growth of length scale with increasing distance from the wall in turbulent wall flows. Multiple vortex interactions are studied in detail.
ContributorsParthasarathy, Praveen Kumar (Author) / Adrian, Ronald (Thesis advisor) / Huang, Huei-Ping (Committee member) / Herrmann, Marcus (Committee member) / Arizona State University (Publisher)
Created2011