This collection includes both ASU Theses and Dissertations, submitted by graduate students, and the Barrett, Honors College theses submitted by undergraduate students. 

Displaying 1 - 10 of 29
Filtering by

Clear all filters

151457-Thumbnail Image.png
Description
High electron mobility transistors (HEMTs) based on Group III-nitride heterostructures have been characterized by advanced electron microscopy methods including off-axis electron holography, nanoscale chemical analysis, and electrical measurements, as well as other techniques. The dissertation was organized primarily into three topical areas: (1) characterization of near-gate defects in electrically stressed

High electron mobility transistors (HEMTs) based on Group III-nitride heterostructures have been characterized by advanced electron microscopy methods including off-axis electron holography, nanoscale chemical analysis, and electrical measurements, as well as other techniques. The dissertation was organized primarily into three topical areas: (1) characterization of near-gate defects in electrically stressed AlGaN/GaN HEMTs, (2) microstructural and chemical analysis of the gate/buffer interface of AlN/GaN HEMTs, and (3) studies of the impact of laser-liftoff processing on AlGaN/GaN HEMTs. The electrical performance of stressed AlGaN/GaN HEMTs was measured and the devices binned accordingly. Source- and drain-side degraded, undegraded, and unstressed devices were then prepared via focused-ion-beam milling for examination. Defects in the near-gate region were identified and their correlation to electrical measurements analyzed. Increased gate leakage after electrical stressing is typically attributed to "V"-shaped defects at the gate edge. However, strong evidence was found for gate metal diffusion into the barrier layer as another contributing factor. AlN/GaN HEMTs grown on sapphire substrates were found to have high electrical performance which is attributed to the AlN barrier layer, and robust ohmic and gate contact processes. TEM analysis identified oxidation at the gate metal/AlN buffer layer interface. This thin a-oxide gate insulator was further characterized by energy-dispersive x-ray spectroscopy and energy-filtered TEM. Attributed to this previously unidentified layer, high reverse gate bias up to −30 V was demonstrated and drain-induced gate leakage was suppressed to values of less than 10−6 A/mm. In addition, extrinsic gm and ft * LG were improved to the highest reported values for AlN/GaN HEMTs fabricated on sapphire substrates. Laser-liftoff (LLO) processing was used to separate the active layers from sapphire substrates for several GaN-based HEMT devices, including AlGaN/GaN and InAlN/GaN heterostructures. Warpage of the LLO samples resulted from relaxation of the as-grown strain and strain arising from dielectric and metal depositions, and this strain was quantified by both Newton's rings and Raman spectroscopy methods. TEM analysis demonstrated that the LLO processing produced no detrimental effects on the quality of the epitaxial layers. TEM micrographs showed no evidence of either damage to the ~2 μm GaN epilayer generated threading defects.
ContributorsJohnson, Michael R. (Author) / Mccartney, Martha R (Thesis advisor) / Smith, David J. (Committee member) / Goodnick, Stephen (Committee member) / Shumway, John (Committee member) / Chen, Tingyong (Committee member) / Arizona State University (Publisher)
Created2012
152663-Thumbnail Image.png
Description
Increasing the conversion efficiencies of photovoltaic (PV) cells beyond the single junction theoretical limit is the driving force behind much of third generation solar cell research. Over the last half century, the experimental conversion efficiency of both single junction and tandem solar cells has plateaued as manufacturers and researchers have

Increasing the conversion efficiencies of photovoltaic (PV) cells beyond the single junction theoretical limit is the driving force behind much of third generation solar cell research. Over the last half century, the experimental conversion efficiency of both single junction and tandem solar cells has plateaued as manufacturers and researchers have optimized various materials and structures. While existing materials and technologies have remarkably good conversion efficiencies, they are approaching their own limits. For example, tandem solar cells are currently well developed commercially but further improvements through increasing the number of junctions struggle with various issues related to material interfacial defects. Thus, there is a need for novel theoretical and experimental approaches leading to new third generation cell structures. Multiple exciton generation (MEG) and intermediate band (IB) solar cells have been proposed as third generation alternatives and theoretical modeling suggests they can surpass the detailed balance efficiency limits of single junction and tandem solar cells. MEG or IB solar cell has a variety of advantages enabling the use of low bandgap materials. Integrating MEG and IB with other cell types to make novel solar cells (such as MEG with tandem, IB with tandem or MEG with IB) potentially offers improvements by employing multi-physics effects in one device. This hybrid solar cell should improve the properties of conventional solar cells with a reduced number of junction, increased light-generated current and extended material selections. These multi-physics effects in hybrid solar cells can be achieved through the use of nanostructures taking advantage of the carrier confinement while using existing solar cell materials with excellent characteristics. This reduces the additional cost to develop novel materials and structures. In this dissertation, the author develops thermodynamic models for several novel types of solar cells and uses these models to optimize and compare their properties to those of existing PV cells. The results demonstrate multiple advantages from combining MEG and IB technology with existing solar cell structures.
ContributorsLee, Jongwon (Author) / Honsberg, C. (Christiana B.) (Thesis advisor) / Bowden, Stuart (Committee member) / Roedel, Ronald (Committee member) / Goodnick, Stephen (Committee member) / Schroder, Dieter (Committee member) / Arizona State University (Publisher)
Created2014
152460-Thumbnail Image.png
Description
New technologies enable the exploration of space, high-fidelity defense systems, lighting fast intercontinental communication systems as well as medical technologies that extend and improve patient lives. The basis for these technologies is high reliability electronics devised to meet stringent design goals and to operate consistently for many years deployed in

New technologies enable the exploration of space, high-fidelity defense systems, lighting fast intercontinental communication systems as well as medical technologies that extend and improve patient lives. The basis for these technologies is high reliability electronics devised to meet stringent design goals and to operate consistently for many years deployed in the field. An on-going concern for engineers is the consequences of ionizing radiation exposure, specifically total dose effects. For many of the different applications, there is a likelihood of exposure to radiation, which can result in device degradation and potentially failure. While the total dose effects and the resulting degradation are a well-studied field and methodologies to help mitigate degradation have been developed, there is still a need for simulation techniques to help designers understand total dose effects within their design. To that end, the work presented here details simulation techniques to analyze as well as predict the total dose response of a circuit. In this dissertation the total dose effects are broken into two sub-categories, intra-device and inter-device effects in CMOS technology. Intra-device effects degrade the performance of both n-channel and p-channel transistors, while inter-device effects result in loss of device isolation. In this work, multiple case studies are presented for which total dose degradation is of concern. Through the simulation techniques, the individual device and circuit responses are modeled post-irradiation. The use of these simulation techniques by circuit designers allow predictive simulation of total dose effects, allowing focused design changes to be implemented to increase radiation tolerance of high reliability electronics.
ContributorsSchlenvogt, Garrett (Author) / Barnaby, Hugh (Thesis advisor) / Goodnick, Stephen (Committee member) / Vasileska, Dragica (Committee member) / Holbert, Keith E. (Committee member) / Arizona State University (Publisher)
Created2014
153449-Thumbnail Image.png
Description
In this thesis, a novel silica nanosphere (SNS) lithography technique has been developed to offer a fast, cost-effective, and large area applicable nano-lithography approach. The SNS can be easily deposited with a simple spin-coating process after introducing a N,N-dimethyl-formamide (DMF) solvent which can produce a highly close packed SNS monolayer

In this thesis, a novel silica nanosphere (SNS) lithography technique has been developed to offer a fast, cost-effective, and large area applicable nano-lithography approach. The SNS can be easily deposited with a simple spin-coating process after introducing a N,N-dimethyl-formamide (DMF) solvent which can produce a highly close packed SNS monolayer over large silicon (Si) surface area, since DMF offers greatly improved wetting, capillary and convective forces in addition to slow solvent evaporation rate. Since the period and dimension of the surface pattern can be conveniently changed and controlled by introducing a desired size of SNS, and additional SNS size reduction with dry etching process, using SNS for lithography provides a highly effective nano-lithography approach for periodically arrayed nano-/micro-scale surface patterns with a desired dimension and period. Various Si nanostructures (i.e., nanopillar, nanotip, inverted pyramid, nanohole) are successfully fabricated with the SNS nano-lithography technique by using different etching technique like anisotropic alkaline solution (i.e., KOH) etching, reactive-ion etching (RIE), and metal-assisted chemical etching (MaCE).

In this research, computational optical modeling is also introduced to design the Si nanostructure, specifically nanopillars (NPs) with a desired period and dimension. The optical properties of Si NP are calculated with two different optical modeling techniques, which are the rigorous coupled wave analysis (RCWA) and finite-difference time-domain (FDTD) methods. By using these two different optical modeling techniques, the optical properties of Si NPs with different periods and dimensions have been investigated to design ideal Si NP which can be potentially used for thin c-Si solar cell applications. From the results of the computational and experimental work, it was observed that low aspect ratio Si NPs fabricated in a periodic hexagonal array can provide highly enhanced light absorption for the target spectral range (600 ~ 1100nm), which is attributed to (1) the effective confinement of resonant scattering within the Si NP and (2) increased high order diffraction of transmitted light providing an extended absorption length. From the research, therefore, it is successfully demonstrated that the nano-fabrication process with SNS lithography can offer enhanced lithographical accuracy to fabricate desired Si nanostructures which can realize enhanced light absorption for thin Si solar cell.
ContributorsChoi, JeaYoung (Author) / Honsberg, Christiana (Thesis advisor) / Alford, Terry (Thesis advisor) / Goodnick, Stephen (Committee member) / Arizona State University (Publisher)
Created2015
150289-Thumbnail Image.png
Description
A primary motivation of research in photovoltaic technology is to obtain higher efficiency photovoltaic devices at reduced cost of production so that solar electricity can be cost competitive. The majority of photovoltaic technologies are based on p-n junction, with efficiency potential being much lower than the thermodynamic limits of individual

A primary motivation of research in photovoltaic technology is to obtain higher efficiency photovoltaic devices at reduced cost of production so that solar electricity can be cost competitive. The majority of photovoltaic technologies are based on p-n junction, with efficiency potential being much lower than the thermodynamic limits of individual technologies and thereby providing substantial scope for further improvements in efficiency. The thesis explores photovoltaic devices using new physical processes that rely on thin layers and are capable of attaining the thermodynamic limit of photovoltaic technology. Silicon heterostructure is one of the candidate technologies in which thin films induce a minority carrier collecting junction in silicon and the devices can achieve efficiency close to the thermodynamic limits of silicon technology. The thesis proposes and experimentally establishes a new theory explaining the operation of silicon heterostructure solar cells. The theory will assist in identifying the optimum properties of thin film materials for silicon heterostructure and help in design and characterization of the devices, along with aiding in developing new devices based on this technology. The efficiency potential of silicon heterostructure is constrained by the thermodynamic limit (31%) of single junction solar cell and is considerably lower than the limit of photovoltaic conversion (~ 80 %). A further improvement in photovoltaic conversion efficiency is possible by implementing a multiple quasi-fermi level system (MQFL). A MQFL allows the absorption of sub band gap photons with current being extracted at a higher band-gap, thereby allowing to overcome the efficiency limit of single junction devices. A MQFL can be realized either by thin epitaxial layers of alternating higher and lower band gap material with nearly lattice matched (quantum well) or highly lattice mismatched (quantum dot) structure. The thesis identifies the material combination for quantum well structure and calculates the absorption coefficient of a MQFl based on quantum well. GaAsSb (barrier)/InAs(dot) was identified as a candidate material for MQFL using quantum dot. The thesis explains the growth mechanism of GaAsSb and the optimization of GaAsSb and GaAs heterointerface.
ContributorsGhosha, Kuṇāla (Author) / Bowden, Stuart (Thesis advisor) / Honsberg, Christiana (Thesis advisor) / Vasileska, Dragica (Committee member) / Goodnick, Stephen (Committee member) / Arizona State University (Publisher)
Created2011
150154-Thumbnail Image.png
Description
As existing solar cell technologies come closer to their theoretical efficiency, new concepts that overcome the Shockley-Queisser limit and exceed 50% efficiency need to be explored. New materials systems are often investigated to achieve this, but the use of existing solar cell materials in advanced concept approaches is compelling for

As existing solar cell technologies come closer to their theoretical efficiency, new concepts that overcome the Shockley-Queisser limit and exceed 50% efficiency need to be explored. New materials systems are often investigated to achieve this, but the use of existing solar cell materials in advanced concept approaches is compelling for multiple theoretical and practical reasons. In order to include advanced concept approaches into existing materials, nanostructures are used as they alter the physical properties of these materials. To explore advanced nanostructured concepts with existing materials such as III-V alloys, silicon and/or silicon/germanium and associated alloys, fundamental aspects of using these materials in advanced concept nanostructured solar cells must be understood. Chief among these is the determination and predication of optimum electronic band structures, including effects such as strain on the band structure, and the material's opto-electronic properties. Nanostructures have a large impact on band structure and electronic properties through quantum confinement. An additional large effect is the change in band structure due to elastic strain caused by lattice mismatch between the barrier and nanostructured (usually self-assembled QDs) materials. To develop a material model for advanced concept solar cells, the band structure is calculated for single as well as vertical array of quantum dots with the realistic effects such as strain, associated with the epitaxial growth of these materials. The results show significant effect of strain in band structure. More importantly, the band diagram of a vertical array of QDs with different spacer layer thickness show significant change in band offsets, especially for heavy and light hole valence bands when the spacer layer thickness is reduced. These results, ultimately, have significance to develop a material model for advance concept solar cells that use the QD nanostructures as absorbing medium. The band structure calculations serve as the basis for multiple other calculations. Chief among these is that the model allows the design of a practical QD advanced concept solar cell, which meets key design criteria such as a negligible valence band offset between the QD/barrier materials and close to optimum band gaps, resulting in the predication of optimum material combinations.
ContributorsDahal, Som Nath (Author) / Honsberg, Christiana (Thesis advisor) / Goodnick, Stephen (Committee member) / Roedel, Ronald (Committee member) / Ponce, Fernando (Committee member) / Arizona State University (Publisher)
Created2011
150248-Thumbnail Image.png
Description
In very small electronic devices the alternate capture and emission of carriers at an individual defect site located at the interface of Si:SiO2 of a MOSFET generates discrete switching in the device conductance referred to as a random telegraph signal (RTS) or random telegraph noise (RTN). In this research work,

In very small electronic devices the alternate capture and emission of carriers at an individual defect site located at the interface of Si:SiO2 of a MOSFET generates discrete switching in the device conductance referred to as a random telegraph signal (RTS) or random telegraph noise (RTN). In this research work, the integration of random defects positioned across the channel at the Si:SiO2 interface from source end to the drain end in the presence of different random dopant distributions are used to conduct Ensemble Monte-Carlo ( EMC ) based numerical simulation of key device performance metrics for 45 nm gate length MOSFET device. The two main performance parameters that affect RTS based reliability measurements are percentage change in threshold voltage and percentage change in drain current fluctuation in the saturation region. It has been observed as a result of the simulation that changes in both and values moderately decrease as the defect position is gradually moved from source end to the drain end of the channel. Precise analytical device physics based model needs to be developed to explain and assess the EMC simulation based higher VT fluctuations as experienced for trap positions at the source side. A new analytical model has been developed that simultaneously takes account of dopant number variations in the channel and depletion region underneath and carrier mobility fluctuations resulting from fluctuations in surface potential barriers. Comparisons of this new analytical model along with existing analytical models are shown to correlate with 3D EMC simulation based model for assessment of VT fluctuations percentage induced by a single interface trap. With scaling of devices beyond 32 nm node, halo doping at the source and drain are routinely incorporated to combat the threshold voltage roll-off that takes place with effective channel length reduction. As a final study on this regard, 3D EMC simulation method based computations of threshold voltage fluctuations have been performed for varying source and drain halo pocket length to illustrate the threshold voltage fluctuations related reliability problems that have been aggravated by trap positions near the source at the interface compared to conventional 45 nm MOSFET.
ContributorsAshraf, Nabil Shovon (Author) / Vasileska, Dragica (Thesis advisor) / Schroder, Dieter (Committee member) / Goodnick, Stephen (Committee member) / Goryll, Michael (Committee member) / Arizona State University (Publisher)
Created2011
149996-Thumbnail Image.png
Description
One of the challenges in future semiconductor device design is excessive rise of power dissipation and device temperatures. With the introduction of new geometrically confined device structures like SOI, FinFET, nanowires and continuous incorporation of new materials with poor thermal conductivities in the device active region, the device thermal problem

One of the challenges in future semiconductor device design is excessive rise of power dissipation and device temperatures. With the introduction of new geometrically confined device structures like SOI, FinFET, nanowires and continuous incorporation of new materials with poor thermal conductivities in the device active region, the device thermal problem is expected to become more challenging in coming years. This work examines the degradation in the ON-current due to self-heating effects in 10 nm channel length silicon nanowire transistors. As part of this dissertation, a 3D electrothermal device simulator is developed that self-consistently solves electron Boltzmann transport equation with 3D energy balance equations for both the acoustic and the optical phonons. This device simulator predicts temperature variations and other physical and electrical parameters across the device for different bias and boundary conditions. The simulation results show insignificant current degradation for nanowire self-heating because of pronounced velocity overshoot effect. In addition, this work explores the role of various placement of the source and drain contacts on the magnitude of self-heating effect in nanowire transistors. This work also investigates the simultaneous influence of self-heating and random charge effects on the magnitude of the ON current for both positively and negatively charged single charges. This research suggests that the self-heating effects affect the ON-current in two ways: (1) by lowering the barrier at the source end of the channel, thus allowing more carriers to go through, and (2) via the screening effect of the Coulomb potential. To examine the effect of temperature dependent thermal conductivity of thin silicon films in nanowire transistors, Selberherr's thermal conductivity model is used in the device simulator. The simulations results show larger current degradation because of self-heating due to decreased thermal conductivity . Crystallographic direction dependent thermal conductivity is also included in the device simulations. Larger degradation is observed in the current along the [100] direction when compared to the [110] direction which is in agreement with the values for the thermal conductivity tensor provided by Zlatan Aksamija.
ContributorsHossain, Arif (Author) / Vasileska, Dragica (Thesis advisor) / Ahmed, Shaikh (Committee member) / Bakkaloglu, Bertan (Committee member) / Goodnick, Stephen (Committee member) / Arizona State University (Publisher)
Created2011
156012-Thumbnail Image.png
Description
Thin-film modules of all technologies often suffer from performance degradation over time. Some of the performance changes are reversible and some are not, which makes deployment, testing, and energy-yield prediction more challenging. The most commonly alleged causes of instability in CdTe device, such as “migration of Cu,” have been investigated

Thin-film modules of all technologies often suffer from performance degradation over time. Some of the performance changes are reversible and some are not, which makes deployment, testing, and energy-yield prediction more challenging. The most commonly alleged causes of instability in CdTe device, such as “migration of Cu,” have been investigated rigorously over the past fifteen years. As all defects, intrinsic or extrinsic, interact with the electrical potential and free carriers so that charged defects may drift in the electric field and changing ionization state with excess free carriers. Such complexity of interactions in CdTe makes understanding of temporal changes in device performance even more challenging. The goal of the work in this dissertation is, thus, to eliminate the ambiguity between the observed performance changes under stress and their physical root cause by enabling a depth of modeling that takes account of diffusion and drift at the atomistic level coupled to the electronic subsystem responsible for a PV device’s function. The 1D Unified Solver, developed as part of this effort, enables us to analyze PV devices at a greater depth.

In this dissertation, the implementation of a drift-diffusion model defect migration simulator, development of an implicit reaction scheme for total mass conservation, and a couple of other numerical schemes to improve the overall flexibility and robustness of this coupled Unified Solver is discussed. Preliminary results on Cu (with or without Cl-treatment) annealing simulations in both single-crystal CdTe wafer and poly-crystalline CdTe devices show promising agreement to experimental findings, providing a new perspective in the research of improving doping concentration hence the open-circuit voltage of CdTe technology. Furthermore, on the reliability side, in agreement of previous experimental reports, simulation results suggest possibility of Cu depletion in short-circuited cells stressed at elevated temperature. The developed solver also successfully demonstrated that mobile donor migration can be used to explain solar cell performance changes under different stress conditions.
ContributorsGuo, Da (Author) / Vasileska, Dragica (Thesis advisor) / Sankin, Igor (Committee member) / Goodnick, Stephen (Committee member) / Bertoni, Mariana (Committee member) / Arizona State University (Publisher)
Created2017
156609-Thumbnail Image.png
Description
Achieving high efficiency in solar cells requires optimal photovoltaics materials for light absorption and as with any electrical device—high-quality contacts. Essentially, the contacts separate the charge carriers—holes at one terminal and electrons at the other—extracting them to an external circuit. For this purpose, the development of passivating and carrier-selective contacts

Achieving high efficiency in solar cells requires optimal photovoltaics materials for light absorption and as with any electrical device—high-quality contacts. Essentially, the contacts separate the charge carriers—holes at one terminal and electrons at the other—extracting them to an external circuit. For this purpose, the development of passivating and carrier-selective contacts that enable low interface defect density and efficient carrier transport is critical for making high-efficiency solar cells. The recent record-efficiency n-type silicon cells with hydrogenated amorphous silicon (a-Si:H) contacts have demonstrated the usefulness of passivating and carrier-selective contacts. However, the use of a-Si:H contacts should not be limited in just n-type silicon cells.

In the present work, a-Si:H contacts for crystalline silicon and cadmium telluride (CdTe) solar cells are developed. First, hydrogen-plasma-processsed a-Si:H contacts are used in n-type Czochralski silicon cell fabrication. Hydrogen plasma treatment is used to increase the Si-H bond density of a-Si:H films and decrease the dangling bond density at the interface, which leads to better interface passivation and device performance, and wider temperature-processing window of n-type silicon cells under full spectrum (300–1200 nm) illumination. In addition, thickness-varied a-Si:H contacts are studied for n-type silicon cells under the infrared spectrum (700–1200 nm) illumination, which are prepared for silicon-based tandem applications.

Second, the a-Si:H contacts are applied to commercial-grade p-type silicon cells, which have much lower bulk carrier lifetimes than the n-type silicon cells. The approach is using gettering and bulk hydrogenation to improve the p-type silicon bulk quality, and then applying a-Si:H contacts to enable excellent surface passivation and carrier transport. This leads to an open-circuit voltage of 707 mV in p-type Czochralski silicon cells, and of 702 mV, the world-record open-circuit voltage in p-type multi-crystalline silicon cells.

Finally, CdTe cells with p-type a-Si:H hole-selective contacts are studied. As a proof of concept, p-type a-Si:H contacts enable achieving the highest reported open-circuit voltages (1.1 V) in mono-crystalline CdTe devices. A comparative study of applying p-type a-Si:H contacts in poly-crystalline CdTe solar cells is performed, resulting in absolute voltage gain of 53 mV over using the standard tellurium contacts.
ContributorsShi, Jianwei (Author) / Holman, Zachary (Thesis advisor) / Bowden, Stuart (Committee member) / Bertoni, Mariana (Committee member) / Goodnick, Stephen (Committee member) / Arizona State University (Publisher)
Created2018