This collection includes both ASU Theses and Dissertations, submitted by graduate students, and the Barrett, Honors College theses submitted by undergraduate students. 

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Radiation-induced gain degradation in bipolar devices is considered to be the primary threat to linear bipolar circuits operating in the space environment. The damage is primarily caused by charged particles trapped in the Earth's magnetosphere, the solar wind, and cosmic rays. This constant radiation exposure leads to early end-of-life expectancies

Radiation-induced gain degradation in bipolar devices is considered to be the primary threat to linear bipolar circuits operating in the space environment. The damage is primarily caused by charged particles trapped in the Earth's magnetosphere, the solar wind, and cosmic rays. This constant radiation exposure leads to early end-of-life expectancies for many electronic parts. Exposure to ionizing radiation increases the density of oxide and interfacial defects in bipolar oxides leading to an increase in base current in bipolar junction transistors. Radiation-induced excess base current is the primary cause of current gain degradation. Analysis of base current response can enable the measurement of defects generated by radiation exposure. In addition to radiation, the space environment is also characterized by extreme temperature fluctuations. Temperature, like radiation, also has a very strong impact on base current. Thus, a technique for separating the effects of radiation from thermal effects is necessary in order to accurately measure radiation-induced damage in space. This thesis focuses on the extraction of radiation damage in lateral PNP bipolar junction transistors and the space environment. It also describes the measurement techniques used and provides a quantitative analysis methodology for separating radiation and thermal effects on the bipolar base current.
ContributorsCampola, Michael J (Author) / Barnaby, Hugh J (Thesis advisor) / Holbert, Keith E. (Committee member) / Vasileska, Dragica (Committee member) / Arizona State University (Publisher)
Created2011
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Description
High-k dielectrics have been employed in the metal-oxide semiconductor field effect transistors (MOSFETs) since 45 nm technology node. In this MOSFET industry, Moore’s law projects the feature size of MOSFET scales half within every 18 months. Such scaling down theory has not only led to the physical limit of manufacturing

High-k dielectrics have been employed in the metal-oxide semiconductor field effect transistors (MOSFETs) since 45 nm technology node. In this MOSFET industry, Moore’s law projects the feature size of MOSFET scales half within every 18 months. Such scaling down theory has not only led to the physical limit of manufacturing but also raised the reliability issues in MOSFETs. After the incorporation of HfO2 based high-k dielectrics, the stacked oxides based gate insulator is facing rather challenging reliability issues due to the vulnerable HfO2 layer, ultra-thin interfacial SiO2 layer, and even messy interface between SiO2 and HfO2. Bias temperature instabilities (BTI), hot channel electrons injections (HCI), stress-induced leakage current (SILC), and time dependent dielectric breakdown (TDDB) are the four most prominent reliability challenges impacting the lifetime of the chips under use.

In order to fully understand the origins that could potentially challenge the reliability of the MOSFETs the defects induced aging and breakdown of the high-k dielectrics have been profoundly investigated here. BTI aging has been investigated to be related to charging effects from the bulk oxide traps and generations of Si-H bonds related interface traps. CVS and RVS induced dielectric breakdown studies have been performed and investigated. The breakdown process is regarded to be related to oxygen vacancies generations triggered by hot hole injections from anode. Post breakdown conduction study in the RRAM devices have shown irreversible characteristics of the dielectrics, although the resistance could be switched into high resistance state.
ContributorsFang, Runchen (Author) / Barnaby, Hugh J (Thesis advisor) / Kozicki, Michael N (Thesis advisor) / Vasileska, Dragica (Committee member) / Thornton, Trevor J (Committee member) / Arizona State University (Publisher)
Created2018
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Description
Implantable medical device technology is commonly used by doctors for disease management, aiding to improve patient quality of life. However, it is possible for these devices to be exposed to ionizing radiation during various medical therapeutic and diagnostic activities while implanted. This commands that these devices remain fully operational during,

Implantable medical device technology is commonly used by doctors for disease management, aiding to improve patient quality of life. However, it is possible for these devices to be exposed to ionizing radiation during various medical therapeutic and diagnostic activities while implanted. This commands that these devices remain fully operational during, and long after, radiation exposure. Many implantable medical devices employ standard commercial complementary metal-oxide-semiconductor (CMOS) processes for integrated circuit (IC) development, which have been shown to degrade with radiation exposure. This necessitates that device manufacturers study the effects of ionizing radiation on their products, and work to mitigate those effects to maintain a high standard of reliability. Mitigation can be completed through targeted radiation hardening by design (RHBD) techniques as not to infringe on the device operational specifications. This thesis details a complete radiation analysis methodology that can be implemented to examine the effects of ionizing radiation on an IC as part of RHBD efforts. The methodology is put into practice to determine the failure mechanism in a charge pump circuit, common in many of today's implantable pacemaker designs, as a case study. Charge pump irradiation data shows a reduction of circuit output voltage with applied dose. Through testing of individual test devices, the response is identified as parasitic inter-device leakage caused by trapped oxide charge buildup in the isolation oxides. A library of compact models is generated to represent isolation oxide parasitics based on test structure data along with 2-Dimensional structure simulation results. The original charge pump schematic is then back-annotated with transistors representative of the parasitic. Inclusion of the parasitic devices in schematic allows for simulation of the entire circuit, accounting for possible parasitic devices activated by radiation exposure. By selecting a compact model for the parasitics generated at a specific dose, the compete circuit response is then simulated at the defined dose. The reduction of circuit output voltage with dose is then re-created in a radiation-enabled simulation validating the analysis methodology.
ContributorsSchlenvogt, Garrett (Author) / Barnaby, Hugh J (Thesis advisor) / Goodnick, Stephen (Committee member) / Vasileska, Dragica (Committee member) / Arizona State University (Publisher)
Created2010