Theses and Dissertations
This collection includes both ASU Theses and Dissertations, submitted by graduate students, and the Barrett, Honors College theses submitted by undergraduate students.
Displaying 1 - 10 of 130
Description
There is a lack of music therapy services for college students who have problems with depression and/or anxiety. Even among universities and colleges that offer music therapy degrees, there are no known programs offering music therapy to the institution's students. Female college students are particularly vulnerable to depression and anxiety symptoms compared to their male counterparts. Many students who experience mental health problems do not receive treatment, because of lack of knowledge, lack of services, or refusal of treatment. Music therapy is proposed as a reliable and valid complement or even an alternative to traditional counseling and pharmacotherapy because of the appeal of music to young women and the potential for a music therapy group to help isolated students form supportive networks. The present study recruited 14 female university students to participate in a randomized controlled trial of short-term group music therapy to address symptoms of depression and anxiety. The students were randomly divided into either the treatment group or the control group. Over 4 weeks, each group completed surveys related to depression and anxiety. Results indicate that the treatment group's depression and anxiety scores gradually decreased over the span of the treatment protocol. The control group showed either maintenance or slight worsening of depression and anxiety scores. Although none of the results were statistically significant, the general trend indicates that group music therapy was beneficial for the students. A qualitative analysis was also conducted for the treatment group. Common themes were financial concerns, relationship problems, loneliness, and time management/academic stress. All participants indicated that they benefited from the sessions. The group progressed in its cohesion and the participants bonded to the extent that they formed a supportive network which lasted beyond the end of the protocol. The results of this study are by no means conclusive, but do indicate that colleges with music therapy degree programs should consider adding music therapy services for their general student bodies.
ContributorsAshton, Barbara (Author) / Crowe, Barbara J. (Thesis advisor) / Rio, Robin (Committee member) / Davis, Mary (Committee member) / Arizona State University (Publisher)
Created2013
Description
ABSTRACT This work seeks to develop a practical solution for short range ultrasonic communications and produce an integrated array of acoustic transmitters on a flexible substrate. This is done using flexible thin film transistor (TFT) and micro electromechanical systems (MEMS). The goal is to develop a flexible system capable of communicating in the ultrasonic frequency range at a distance of 10 - 100 meters. This requires a great deal of innovation on the part of the FDC team developing the TFT driving circuitry and the MEMS team adapting the technology for fabrication on a flexible substrate. The technologies required for this research are independently developed. The TFT development is driven primarily by research into flexible displays. The MEMS development is driving by research in biosensors and micro actuators. This project involves the integration of TFT flexible circuit capabilities with MEMS micro actuators in the novel area of flexible acoustic transmitter arrays. This thesis focuses on the design, testing and analysis of the circuit components required for this project.
ContributorsDaugherty, Robin (Author) / Allee, David R. (Thesis advisor) / Chae, Junseok (Thesis advisor) / Aberle, James T (Committee member) / Vasileska, Dragica (Committee member) / Arizona State University (Publisher)
Created2012
Description
Switch mode DC/DC converters are suited for battery powered applications, due to their high efficiency, which help in conserving the battery lifetime. Fixed Frequency PWM based converters, which are generally used for these applications offer good voltage regulation, low ripple and excellent efficiency at high load currents. However at light load currents, fixed frequency PWM converters suffer from poor efficiencies The PFM control offers higher efficiency at light loads at the cost of a higher ripple. The PWM has a poor efficiency at light loads but good voltage ripple characteristics, due to a high switching frequency. To get the best of both control modes, both loops are used together with the control switched from one loop to another based on the load current. Such architectures are referred to as hybrid converters. While transition from PFM to PWM loop can be made by estimating the average load current, transition from PFM to PWM requires voltage or peak current sensing. This theses implements a hysteretic PFM solution for a synchronous buck converter with external MOSFET's, to achieve efficiencies of about 80% at light loads. As the PFM loop operates independently of the PWM loop, a transition circuit for automatically transitioning from PFM to PWM is implemented. The transition circuit is implemented digitally without needing any external voltage or current sensing circuit.
ContributorsVivek, Parasuram (Author) / Bakkaloglu, Bertan (Thesis advisor) / Ogras, Umit Y. (Committee member) / Song, Hongjiang (Committee member) / Arizona State University (Publisher)
Created2014
Description
ABSTRACT The D flip flop acts as a sequencing element while designing any pipelined system. Radiation Hardening by Design (RHBD) allows hardened circuits to be fabricated on commercially available CMOS manufacturing process. Recently, single event transients (SET's) have become as important as single event upset (SEU) in radiation hardened high speed digital designs. A novel temporal pulse based RHBD flip-flop design is presented. Temporally delayed pulses produced by a radiation hardened pulse generator design samples the data in three redundant pulse latches. The proposed RHBD flip-flop has been statistically designed and fabricated on 90 nm TSMC LP process. Detailed simulations of the flip-flop operation in both normal and radiation environments are presented. Spatial separation of critical nodes for the physical design of the flip-flop is carried out for mitigating multi-node charge collection upsets. The proposed flip-flop is also used in commercial CAD flows for high performance chip designs. The proposed flip-flop is used in the design and auto-place-route (APR) of an advanced encryption system and the metrics analyzed.
ContributorsKumar, Sushil (Author) / Clark, Lawrence (Thesis advisor) / Bakkaloglu, Bertan (Committee member) / Ogras, Umit Y. (Committee member) / Arizona State University (Publisher)
Created2014
Description
Non-volatile memories (NVM) are widely used in modern electronic devices due to their non-volatility, low static power consumption and high storage density. While Flash memories are the dominant NVM technology, resistive memories such as phase change access memory (PRAM) and spin torque transfer random access memory (STT-MRAM) are gaining ground. All these technologies suffer from reliability degradation due to process variations, structural limits and material property shift. To address the reliability concerns of these NVM technologies, multi-level low cost solutions are proposed for each of them. My approach consists of first building a comprehensive error model. Next the error characteristics are exploited to develop low cost multi-level strategies to compensate for the errors. For instance, for NAND Flash memory, I first characterize errors due to threshold voltage variations as a function of the number of program/erase cycles. Next a flexible product code is designed to migrate to a stronger ECC scheme as program/erase cycles increases. An adaptive data refresh scheme is also proposed to improve memory reliability with low energy cost for applications with different data update frequencies. For PRAM, soft errors and hard errors models are built based on shifts in the resistance distributions. Next I developed a multi-level error control approach involving bit interleaving and subblock flipping at the architecture level, threshold resistance tuning at the circuit level and programming current profile tuning at the device level. This approach helped reduce the error rate significantly so that it was now sufficient to use a low cost ECC scheme to satisfy the memory reliability constraint. I also studied the reliability of a PRAM+DRAM hybrid memory system and analyzed the tradeoffs between memory performance, programming energy and lifetime. For STT-MRAM, I first developed an error model based on process variations. I developed a multi-level approach to reduce the error rates that consisted of increasing the W/L ratio of the access transistor, increasing the voltage difference across the memory cell and adjusting the current profile during write operation. This approach enabled use of a low cost BCH based ECC scheme to achieve very low block failure rates.
ContributorsYang, Chengen (Author) / Chakrabarti, Chaitali (Thesis advisor) / Cao, Yu (Committee member) / Ogras, Umit Y. (Committee member) / Bakkaloglu, Bertan (Committee member) / Arizona State University (Publisher)
Created2014
Description
New technologies enable the exploration of space, high-fidelity defense systems, lighting fast intercontinental communication systems as well as medical technologies that extend and improve patient lives. The basis for these technologies is high reliability electronics devised to meet stringent design goals and to operate consistently for many years deployed in the field. An on-going concern for engineers is the consequences of ionizing radiation exposure, specifically total dose effects. For many of the different applications, there is a likelihood of exposure to radiation, which can result in device degradation and potentially failure. While the total dose effects and the resulting degradation are a well-studied field and methodologies to help mitigate degradation have been developed, there is still a need for simulation techniques to help designers understand total dose effects within their design. To that end, the work presented here details simulation techniques to analyze as well as predict the total dose response of a circuit. In this dissertation the total dose effects are broken into two sub-categories, intra-device and inter-device effects in CMOS technology. Intra-device effects degrade the performance of both n-channel and p-channel transistors, while inter-device effects result in loss of device isolation. In this work, multiple case studies are presented for which total dose degradation is of concern. Through the simulation techniques, the individual device and circuit responses are modeled post-irradiation. The use of these simulation techniques by circuit designers allow predictive simulation of total dose effects, allowing focused design changes to be implemented to increase radiation tolerance of high reliability electronics.
ContributorsSchlenvogt, Garrett (Author) / Barnaby, Hugh (Thesis advisor) / Goodnick, Stephen (Committee member) / Vasileska, Dragica (Committee member) / Holbert, Keith E. (Committee member) / Arizona State University (Publisher)
Created2014
Description
Silicon solar cells with heterojunction carrier collectors based on a-Si/c-Si heterojunction (SHJ) have a potential to overcome the limitations of the conventional diffused junction solar cells and become the next industry standard manufacturing technology of solar cells. A brand feature of SHJ technology is ultrapassivated surfaces with already demonstrated 750 mV open circuit voltages (Voc) and 24.7% efficiency on large area solar cell. Despite very good results achieved in research and development, large volume manufacturing of high efficiency SHJ cells remains a fundamental challenge. The main objectives of this work were to develop a SHJ solar cell fabrication flow using industry compatible tools and processes in a pilot production environment, study the interactions between the used fabrication steps, identify the minimum set of optimization parameters and characterization techniques needed to achieve 20% baseline efficiency, and analyze the losses of power in fabricated SHJ cells by numerical and analytical modeling. This manuscript presents a detailed description of a SHJ solar cell fabrication flow developed at ASU Solar Power Laboratory (SPL) which allows large area solar cells with >750 mV Voc. SHJ cells on 135 um thick 153 cm2 area wafers with 19.5% efficiency were fabricated. Passivation quality of (i)a-Si:H film, bulk conductivity of doped a-Si films, bulk conductivity of ITO, transmission of ITO and the thickness of all films were identified as the minimum set of optimization parameters necessary to set up a baseline high efficiency SHJ fabrication flow. The preparation of randomly textured wafers to minimize the concentration of surface impurities and to avoid epitaxial growth of a-Si films was found to be a key challenge in achieving a repeatable and uniform passivation. This work resolved this issue by using a multi-step cleaning process based on sequential oxidation in nitric/acetic acids, Piranha and RCA-b solutions. The developed process allowed state of the art surface passivation with perfect repeatability and negligible reflectance losses. Two additional studies demonstrated 750 mV local Voc on 50 micron thick SHJ solar cell and < 1 cm/s effective surface recombination velocity on n-type wafers passivated by a-Si/SiO2/SiNx stack.
ContributorsHerasimenka, Stanislau Yur'yevich (Author) / Honsberg, C. (Christiana B.) (Thesis advisor) / Bowden, Stuart G (Thesis advisor) / Tracy, Clarence (Committee member) / Vasileska, Dragica (Committee member) / Holman, Zachary (Committee member) / Sinton, Ron (Committee member) / Arizona State University (Publisher)
Created2013
Description
Zinc oxide (ZnO), a naturally n-type semiconductor has been identified as a promising candidate to replace indium tin oxide (ITO) as the transparent electrode in solar cells, because of its wide bandgap (3.37 eV), abundant source materials and suitable refractive index (2.0 at 600 nm). Spray deposition is a convenient and low cost technique for large area and uniform deposition of semiconductor thin films. In particular, it provides an easier way to dope the film by simply adding the dopant precursor into the starting solution. In order to reduce the resistivity of undoped ZnO, many works have been done by doping in the ZnO with either group IIIA elements or VIIA elements using spray pyrolysis. However, the resistivity is still too high to meet TCO's resistivity requirement. In the present work, a novel co-spray deposition technique is developed to bypass a fundamental limitation in the conventional spray deposition technique, i.e. the deposition of metal oxides from incompatible precursors in the starting solution. With this technique, ZnO films codoped with one cationic dopant, Al, Cr, or Fe, and an anionic dopant, F, have been successfully synthesized, in which F is incompatible with all these three cationic dopants. Two starting solutions were prepared and co-sprayed through two separate spray heads. One solution contained only the F precursor, NH 4F. The second solution contained the Zn and one cationic dopant precursors, Zn(O 2CCH 3) 2 and AlCl 3, CrCl 3, or FeCl 3. The deposition was carried out at 500 °C; on soda-lime glass in air. Compared to singly-doped ZnO thin films, codoped ZnO samples showed better electrical properties. Besides, a minimum sheet resistance, 55.4 Ω/sq, was obtained for Al and F codoped ZnO films after vacuum annealing at 400 °C;, which was lower than singly-doped ZnO with either Al or F. The transmittance for the Al and F codoped ZnO samples was above 90% in the visible range. This co-spray deposition technique provides a simple and cost-effective way to synthesize metal oxides from incompatible precursors with improved properties.
ContributorsZhou, Bin (Author) / Tao, Meng (Thesis advisor) / Goryll, Michael (Committee member) / Vasileska, Dragica (Committee member) / Yu, Hongbin (Committee member) / Arizona State University (Publisher)
Created2013
Description
Sometimes difficult life events challenge our existing resources in such a way that routinized responses are inadequate to handle the challenge. Some individuals will persist in habitual, automatic behavior, regardless of environmental cues that indicate a mismatch between coping strategy and the demands of the stressor. Other individuals will marshal adaptive resources to construct new courses of action and reconceptualize the problem, associated goals and/or values. A mixed methods approach was used to describe and operationalize cognitive shift, a relatively unexplored construct in existing literature. The study was conducted using secondary data from a parent multi-year cross-sectional study of resilience with eight hundred mid-aged adults from the Phoenix metro area. Semi-structured telephone interviews were analyzed using a purposive sample (n=136) chosen by type of life event. Participants' beliefs, assumptions, and experiences were examined to understand how they shaped adaptation to adversity. An adaptive mechanism, "cognitive shift," was theorized as the transition from automatic coping to effortful cognitive processes aimed at novel resolution of issues. Aims included understanding when and how cognitive shift emerges and manifests. Cognitive shift was scored as a binary variable and triangulated through correlational and logistic regression analyses. Interaction effects revealed that positive personality attributes influence cognitive shift most when people suffered early adversity. This finding indicates that a certain complexity, self-awareness and flexibility of mind may lead to a greater capacity to find meaning in adversity. This work bridges an acknowledged gap in literature and provides new insights into resilience.
ContributorsRivers, Crystal T (Author) / Zautra, Alex (Thesis advisor) / Davis, Mary (Committee member) / Kurpius, Sharon (Committee member) / Arizona State University (Publisher)
Created2014
Description
The research objective is fully differential op-amp with common mode feedback, which are applied in filter, band gap, Analog Digital Converter (ADC) and so on as a fundamental component in analog circuit. Having modeled various defect and analyzed corresponding probability, defect library could be built after reduced defect simulation.Based on the resolution of microscope scan tool, all these defects are categorized into four groups of defects by both function and location, bias circuit defect, first stage amplifier defect, output stage defect and common mode feedback defect, separately. Each fault result is attributed to one of these four region defects.Therefore, analog testing algorithm and automotive tool could be generated to assist testing engineers to meet the demand of large numbers of chips.
ContributorsLu, Zhijian (Author) / Ozev, Sule (Thesis advisor) / Kiaei, Sayfe (Committee member) / Ogras, Umit Y. (Committee member) / Arizona State University (Publisher)
Created2014