Theses and Dissertations
This collection includes both ASU Theses and Dissertations, submitted by graduate students, and the Barrett, Honors College theses submitted by undergraduate students.
Displaying 1 - 10 of 129
Description
In recent years we have witnessed a shift towards multi-processor system-on-chips (MPSoCs) to address the demands of embedded devices (such as cell phones, GPS devices, luxury car features, etc.). Highly optimized MPSoCs are well-suited to tackle the complex application demands desired by the end user customer. These MPSoCs incorporate a constellation of heterogeneous processing elements (PEs) (general purpose PEs and application-specific integrated circuits (ASICS)). A typical MPSoC will be composed of a application processor, such as an ARM Coretex-A9 with cache coherent memory hierarchy, and several application sub-systems. Each of these sub-systems are composed of highly optimized instruction processors, graphics/DSP processors, and custom hardware accelerators. Typically, these sub-systems utilize scratchpad memories (SPM) rather than support cache coherency. The overall architecture is an integration of the various sub-systems through a high bandwidth system-level interconnect (such as a Network-on-Chip (NoC)). The shift to MPSoCs has been fueled by three major factors: demand for high performance, the use of component libraries, and short design turn around time. As customers continue to desire more and more complex applications on their embedded devices the performance demand for these devices continues to increase. Designers have turned to using MPSoCs to address this demand. By using pre-made IP libraries designers can quickly piece together a MPSoC that will meet the application demands of the end user with minimal time spent designing new hardware. Additionally, the use of MPSoCs allows designers to generate new devices very quickly and thus reducing the time to market. In this work, a complete MPSoC synthesis design flow is presented. We first present a technique \cite{leary1_intro} to address the synthesis of the interconnect architecture (particularly Network-on-Chip (NoC)). We then address the synthesis of the memory architecture of a MPSoC sub-system \cite{leary2_intro}. Lastly, we present a co-synthesis technique to generate the functional and memory architectures simultaneously. The validity and quality of each synthesis technique is demonstrated through extensive experimentation.
ContributorsLeary, Glenn (Author) / Chatha, Karamvir S (Thesis advisor) / Vrudhula, Sarma (Committee member) / Shrivastava, Aviral (Committee member) / Beraha, Rudy (Committee member) / Arizona State University (Publisher)
Created2013
Description
There is a lack of music therapy services for college students who have problems with depression and/or anxiety. Even among universities and colleges that offer music therapy degrees, there are no known programs offering music therapy to the institution's students. Female college students are particularly vulnerable to depression and anxiety symptoms compared to their male counterparts. Many students who experience mental health problems do not receive treatment, because of lack of knowledge, lack of services, or refusal of treatment. Music therapy is proposed as a reliable and valid complement or even an alternative to traditional counseling and pharmacotherapy because of the appeal of music to young women and the potential for a music therapy group to help isolated students form supportive networks. The present study recruited 14 female university students to participate in a randomized controlled trial of short-term group music therapy to address symptoms of depression and anxiety. The students were randomly divided into either the treatment group or the control group. Over 4 weeks, each group completed surveys related to depression and anxiety. Results indicate that the treatment group's depression and anxiety scores gradually decreased over the span of the treatment protocol. The control group showed either maintenance or slight worsening of depression and anxiety scores. Although none of the results were statistically significant, the general trend indicates that group music therapy was beneficial for the students. A qualitative analysis was also conducted for the treatment group. Common themes were financial concerns, relationship problems, loneliness, and time management/academic stress. All participants indicated that they benefited from the sessions. The group progressed in its cohesion and the participants bonded to the extent that they formed a supportive network which lasted beyond the end of the protocol. The results of this study are by no means conclusive, but do indicate that colleges with music therapy degree programs should consider adding music therapy services for their general student bodies.
ContributorsAshton, Barbara (Author) / Crowe, Barbara J. (Thesis advisor) / Rio, Robin (Committee member) / Davis, Mary (Committee member) / Arizona State University (Publisher)
Created2013
Description
Using data from an eight-year longitudinal study of 214 children's social and emotional development, I conducted three studies to (1) examine patterns of agreement for internalizing (INT) and externalizing (EXT) symptomatology among different informants (mothers, fathers, teachers, and adolescents) using a recently developed structural equation modeling approach for multi-trait, multi-method data; (2) examine the developmental trajectories for INT and EXT and predict individual differences in symptom development using temperament and parenting variables; and (3) describe patterns of INT and EXT co-occurrence and predict these patterns from temperament and parenting. In Study 1, longitudinal invariance was established for mothers', fathers' and teachers' reports over a six-year period. Sex, age, and SES did not substantially moderate agreement among informants, although both sex and age were differentially related to symptomatology depending on the informant. Agreement among teachers and mothers, but not among mothers and fathers, differed by domain of symptomatology, and was greater for EXT than for INT. In Study 2, latent profile analysis, a person-centered analytic approach, did not provide easily interpretable patterns of symptom development, a failure that is likely the result of the relatively modest sample size. Latent growth curve models, an alternative analytic approach, did provide good fit to the data. Temperament and parenting variables were examined as predictors of the latent growth parameters in these models. Although there was little prediction of the slope, effortful control was negatively related to overall levels of EXT, whereas impulsivity and anger were positively related. Mutually responsive orientation, a measure of the parent-child relationship, was a more consistent predictor of EXT than was parental warmth. Furthermore, the relation between mutually responsive orientation and EXT was partially mediated by inhibitory control. Across informants, there were few consistent predictors of INT. In Study 3, latent profile analysis was used to classify individuals into different patterns of INT and EXT co-occurrence. In these models, a similar class structure was identified for mothers and for teachers. When temperament and parenting were examined as predictors of co-occurring symptomatology, few significant interactions were found and results largely replicated prior findings from this data set using arbitrary symptom groups.
ContributorsSulik, Michael John (Author) / Eisenberg, Nancy (Thesis advisor) / Spinrad, Tracy L (Thesis advisor) / Lemery-Chalfant, Kathryn (Committee member) / Wolchik, Sharlene A (Committee member) / Arizona State University (Publisher)
Created2013
Description
In this thesis we deal with the problem of temporal logic robustness estimation. We present a dynamic programming algorithm for the robust estimation problem of Metric Temporal Logic (MTL) formulas regarding a finite trace of time stated sequence. This algorithm not only tests if the MTL specification is satisfied by the given input which is a finite system trajectory, but also quantifies to what extend does the sequence satisfies or violates the MTL specification. The implementation of the algorithm is the DP-TALIRO toolbox for MATLAB. Currently it is used as the temporal logic robust computing engine of S-TALIRO which is a tool for MATLAB searching for trajectories of minimal robustness in Simulink/ Stateflow. DP-TALIRO is expected to have near linear running time and constant memory requirement depending on the structure of the MTL formula. DP-TALIRO toolbox also integrates new features not supported in its ancestor FW-TALIRO such as parameter replacement, most related iteration and most related predicate. A derivative of DP-TALIRO which is DP-T-TALIRO is also addressed in this thesis which applies dynamic programming algorithm for time robustness computation. We test the running time of DP-TALIRO and compare it with FW-TALIRO. Finally, we present an application where DP-TALIRO is used as the robustness computation core of S-TALIRO for a parameter estimation problem.
ContributorsYang, Hengyi (Author) / Fainekos, Georgios (Thesis advisor) / Sarjoughian, Hessam S. (Committee member) / Shrivastava, Aviral (Committee member) / Arizona State University (Publisher)
Created2013
Description
Sometimes difficult life events challenge our existing resources in such a way that routinized responses are inadequate to handle the challenge. Some individuals will persist in habitual, automatic behavior, regardless of environmental cues that indicate a mismatch between coping strategy and the demands of the stressor. Other individuals will marshal adaptive resources to construct new courses of action and reconceptualize the problem, associated goals and/or values. A mixed methods approach was used to describe and operationalize cognitive shift, a relatively unexplored construct in existing literature. The study was conducted using secondary data from a parent multi-year cross-sectional study of resilience with eight hundred mid-aged adults from the Phoenix metro area. Semi-structured telephone interviews were analyzed using a purposive sample (n=136) chosen by type of life event. Participants' beliefs, assumptions, and experiences were examined to understand how they shaped adaptation to adversity. An adaptive mechanism, "cognitive shift," was theorized as the transition from automatic coping to effortful cognitive processes aimed at novel resolution of issues. Aims included understanding when and how cognitive shift emerges and manifests. Cognitive shift was scored as a binary variable and triangulated through correlational and logistic regression analyses. Interaction effects revealed that positive personality attributes influence cognitive shift most when people suffered early adversity. This finding indicates that a certain complexity, self-awareness and flexibility of mind may lead to a greater capacity to find meaning in adversity. This work bridges an acknowledged gap in literature and provides new insights into resilience.
ContributorsRivers, Crystal T (Author) / Zautra, Alex (Thesis advisor) / Davis, Mary (Committee member) / Kurpius, Sharon (Committee member) / Arizona State University (Publisher)
Created2014
Description
Software has a great impact on the energy efficiency of any computing system--it can manage the components of a system efficiently or inefficiently. The impact of software is amplified in the context of a wearable computing system used for activity recognition. The design space this platform opens up is immense and encompasses sensors, feature calculations, activity classification algorithms, sleep schedules, and transmission protocols. Design choices in each of these areas impact energy use, overall accuracy, and usefulness of the system. This thesis explores methods software can influence the trade-off between energy consumption and system accuracy. In general the more energy a system consumes the more accurate will be. We explore how finding the transitions between human activities is able to reduce the energy consumption of such systems without reducing much accuracy. We introduce the Log-likelihood Ratio Test as a method to detect transitions, and explore how choices of sensor, feature calculations, and parameters concerning time segmentation affect the accuracy of this method. We discovered an approximate 5X increase in energy efficiency could be achieved with only a 5% decrease in accuracy. We also address how a system's sleep mode, in which the processor enters a low-power state and sensors are turned off, affects a wearable computing platform that does activity recognition. We discuss the energy trade-offs in each stage of the activity recognition process. We find that careful analysis of these parameters can result in great increases in energy efficiency if small compromises in overall accuracy can be tolerated. We call this the ``Great Compromise.'' We found a 6X increase in efficiency with a 7% decrease in accuracy. We then consider how wireless transmission of data affects the overall energy efficiency of a wearable computing platform. We find that design decisions such as feature calculations and grouping size have a great impact on the energy consumption of the system because of the amount of data that is stored and transmitted. For example, storing and transmitting vector-based features such as FFT or DCT do not compress the signal and would use more energy than storing and transmitting the raw signal. The effect of grouping size on energy consumption depends on the feature. For scalar features energy consumption is proportional in the inverse of grouping size, so it's reduced as grouping size goes up. For features that depend on the grouping size, such as FFT, energy increases with the logarithm of grouping size, so energy consumption increases slowly as grouping size increases. We find that compressing data through activity classification and transition detection significantly reduces energy consumption and that the energy consumed for the classification overhead is negligible compared to the energy savings from data compression. We provide mathematical models of energy usage and data generation, and test our ideas using a mobile computing platform, the Texas Instruments Chronos watch.
ContributorsBoyd, Jeffrey Michael (Author) / Sundaram, Hari (Thesis advisor) / Li, Baoxin (Thesis advisor) / Shrivastava, Aviral (Committee member) / Turaga, Pavan (Committee member) / Arizona State University (Publisher)
Created2014
Description
Low-income Mexican American women face significant risk for poor health during the postpartum period. Chronic stressors are theorized to negatively impact mental and physical health outcomes. However, physiological factors associated with increased self-regulatory capacity, such as resting heart rate variability, may buffer the impact of stress. In a sample of 322 low-income Mexican American women (mother age 18-42; 84% Spanish-speaking; modal family income $10,000-$15,000), the interactive influence of resting heart rate variability and three chronic prenatal stressors (daily hassles, negative life events, economic stress) on maternal cortisol output, depressive symptoms, and self-rated health at 12 weeks postpartum was assessed. The hypothesized interactive effects between resting heart rate variability and the chronic prenatal stressors on the health outcomes were not supported by the data. However, results showed that a higher number of prenatal daily hassles was associated with increased postpartum depressive symptoms, and a higher number of prenatal negative life events was associated with lower postpartum cortisol output. These results suggest that elevated chronic stress during the prenatal period may increase risk for poor health during the postpartum period.
ContributorsJewell, Shannon Linda (Author) / Luecken, Linda J. (Thesis advisor) / Lemery-Chalfant, Kathryn (Committee member) / Perez, Marisol (Committee member) / Arizona State University (Publisher)
Created2015
Description
The current study delineated the developmental trajectories of early childhood externalizing and internalizing symptoms reported by mothers and fathers, and examined the role of the 18-month observed parenting quality × Respiratory Sinus Arrhythmia
(RSA) interaction in predicting these trajectories. Child sex was tested as a covariate and moderator. It was found that children's low baseline RSA or high RSA reactivity , in comparison to high baseline RSA or low RSA reactivity , was more reactive as a function
of early parenting quality when predicting the development of early childhood problem symptoms. Differential patterns of the interaction between parenting quality and RSA were detected for mothers' and fathers' reports. Mother-reported models showed a diathesis-stress pattern, whereas the father-reported model showed a vantage-sensitivity pattern, especially for internalizing symptoms. This may imply the potential benefit of fathers' active engagement in children's early development. In addition, the effect of the parenting quality × RSA interaction in predicting the mother-reported models was found
to be further moderated by child sex. Specifically, the parenting quality × baseline RSA interaction was significantly predictive of girls' 54-month internalizing, and the parenting quality × RSA reactivity interaction significantly predicted boys' internalizing slope. Girls with low baseline RSA or boys with high RSA reactivity were vulnerable to the less positive parenting, exhibiting high levels of 54-month internalizing symptoms or slow decline in internalizing over time, respectively. Future research directions were discussed in terms of integrating the measures of SNS and PNS in psychopathology study,
exploring the mechanisms underlying the sex difference in parenting quality × RSA interaction, and comparing the findings of children's typical and atypical development.
(RSA) interaction in predicting these trajectories. Child sex was tested as a covariate and moderator. It was found that children's low baseline RSA or high RSA reactivity , in comparison to high baseline RSA or low RSA reactivity , was more reactive as a function
of early parenting quality when predicting the development of early childhood problem symptoms. Differential patterns of the interaction between parenting quality and RSA were detected for mothers' and fathers' reports. Mother-reported models showed a diathesis-stress pattern, whereas the father-reported model showed a vantage-sensitivity pattern, especially for internalizing symptoms. This may imply the potential benefit of fathers' active engagement in children's early development. In addition, the effect of the parenting quality × RSA interaction in predicting the mother-reported models was found
to be further moderated by child sex. Specifically, the parenting quality × baseline RSA interaction was significantly predictive of girls' 54-month internalizing, and the parenting quality × RSA reactivity interaction significantly predicted boys' internalizing slope. Girls with low baseline RSA or boys with high RSA reactivity were vulnerable to the less positive parenting, exhibiting high levels of 54-month internalizing symptoms or slow decline in internalizing over time, respectively. Future research directions were discussed in terms of integrating the measures of SNS and PNS in psychopathology study,
exploring the mechanisms underlying the sex difference in parenting quality × RSA interaction, and comparing the findings of children's typical and atypical development.
ContributorsLi, Yi (Author) / Eisenberg, Nancy (Thesis advisor) / Spinrad, Tracy (Thesis advisor) / Lemery-Chalfant, Kathryn (Committee member) / Wilkens, Natalie (Committee member) / Arizona State University (Publisher)
Created2014
Description
Stream processing has emerged as an important model of computation especially in the context of multimedia and communication sub-systems of embedded System-on-Chip (SoC) architectures. The dataflow nature of streaming applications allows them to be most naturally expressed as a set of kernels iteratively operating on continuous streams of data. The kernels are computationally intensive and are mainly characterized by real-time constraints that demand high throughput and data bandwidth with limited global data reuse. Conventional architectures fail to meet these demands due to their poorly matched execution models and the overheads associated with instruction and data movements.
This work presents StreamWorks, a multi-core embedded architecture for energy-efficient stream computing. The basic processing element in the StreamWorks architecture is the StreamEngine (SE) which is responsible for iteratively executing a stream kernel. SE introduces an instruction locking mechanism that exploits the iterative nature of the kernels and enables fine-grain instruction reuse. Each instruction in a SE is locked to a Reservation Station (RS) and revitalizes itself after execution; thus never retiring from the RS. The entire kernel is hosted in RS Banks (RSBs) close to functional units for energy-efficient instruction delivery. The dataflow semantics of stream kernels are captured by a context-aware dataflow execution mode that efficiently exploits the Instruction Level Parallelism (ILP) and Data-level parallelism (DLP) within stream kernels.
Multiple SEs are grouped together to form a StreamCluster (SC) that communicate via a local interconnect. A novel software FIFO virtualization technique with split-join functionality is proposed for efficient and scalable stream communication across SEs. The proposed communication mechanism exploits the Task-level parallelism (TLP) of the stream application. The performance and scalability of the communication mechanism is evaluated against the existing data movement schemes for scratchpad based multi-core architectures. Further, overlay schemes and architectural support are proposed that allow hosting any number of kernels on the StreamWorks architecture. The proposed oevrlay schemes for code management supports kernel(context) switching for the most common use cases and can be adapted for any multi-core architecture that use software managed local memories.
The performance and energy-efficiency of the StreamWorks architecture is evaluated for stream kernel and application benchmarks by implementing the architecture in 45nm TSMC and comparison with a low power RISC core and a contemporary accelerator.
This work presents StreamWorks, a multi-core embedded architecture for energy-efficient stream computing. The basic processing element in the StreamWorks architecture is the StreamEngine (SE) which is responsible for iteratively executing a stream kernel. SE introduces an instruction locking mechanism that exploits the iterative nature of the kernels and enables fine-grain instruction reuse. Each instruction in a SE is locked to a Reservation Station (RS) and revitalizes itself after execution; thus never retiring from the RS. The entire kernel is hosted in RS Banks (RSBs) close to functional units for energy-efficient instruction delivery. The dataflow semantics of stream kernels are captured by a context-aware dataflow execution mode that efficiently exploits the Instruction Level Parallelism (ILP) and Data-level parallelism (DLP) within stream kernels.
Multiple SEs are grouped together to form a StreamCluster (SC) that communicate via a local interconnect. A novel software FIFO virtualization technique with split-join functionality is proposed for efficient and scalable stream communication across SEs. The proposed communication mechanism exploits the Task-level parallelism (TLP) of the stream application. The performance and scalability of the communication mechanism is evaluated against the existing data movement schemes for scratchpad based multi-core architectures. Further, overlay schemes and architectural support are proposed that allow hosting any number of kernels on the StreamWorks architecture. The proposed oevrlay schemes for code management supports kernel(context) switching for the most common use cases and can be adapted for any multi-core architecture that use software managed local memories.
The performance and energy-efficiency of the StreamWorks architecture is evaluated for stream kernel and application benchmarks by implementing the architecture in 45nm TSMC and comparison with a low power RISC core and a contemporary accelerator.
ContributorsPanda, Amrit (Author) / Chatha, Karam S. (Thesis advisor) / Wu, Carole-Jean (Thesis advisor) / Chakrabarti, Chaitali (Committee member) / Shrivastava, Aviral (Committee member) / Arizona State University (Publisher)
Created2014
Description
A benchmark suite that is representative of the programs a processor typically executes is necessary to understand a processor's performance or energy consumption characteristics. The first contribution of this work addresses this need for mobile platforms with MobileBench, a selection of representative smartphone applications. In smartphones, like any other portable computing systems, energy is a limited resource. Based on the energy characterization of a commercial widely-used smartphone, application cores are found to consume a significant part of the total energy consumption of the device. With this insight, the subsequent part of this thesis focuses on the portion of energy that is spent to move data from the memory system to the application core's internal registers. The primary motivation for this work comes from the relatively higher power consumption associated with a data movement instruction compared to that of an arithmetic instruction. The data movement energy cost is worsened esp. in a System on Chip (SoC) because the amount of data received and exchanged in a SoC based smartphone increases at an explosive rate. A detailed investigation is performed to quantify the impact of data movement
on the overall energy consumption of a smartphone device. To aid this study, microbenchmarks that generate desired data movement patterns between different levels of the memory hierarchy are designed. Energy costs of data movement are then computed by measuring the instantaneous power consumption of the device when the micro benchmarks are executed. This work makes an extensive use of hardware performance counters to validate the memory access behavior of microbenchmarks and to characterize the energy consumed in moving data. Finally, the calculated energy costs of data movement are used to characterize the portion of energy that MobileBench applications spend in moving data. The results of this study show that a significant 35% of the total device energy is spent in data movement alone. Energy is an increasingly important criteria in the context of designing architectures for future smartphones and this thesis offers insights into data movement energy consumption.
on the overall energy consumption of a smartphone device. To aid this study, microbenchmarks that generate desired data movement patterns between different levels of the memory hierarchy are designed. Energy costs of data movement are then computed by measuring the instantaneous power consumption of the device when the micro benchmarks are executed. This work makes an extensive use of hardware performance counters to validate the memory access behavior of microbenchmarks and to characterize the energy consumed in moving data. Finally, the calculated energy costs of data movement are used to characterize the portion of energy that MobileBench applications spend in moving data. The results of this study show that a significant 35% of the total device energy is spent in data movement alone. Energy is an increasingly important criteria in the context of designing architectures for future smartphones and this thesis offers insights into data movement energy consumption.
ContributorsPandiyan, Dhinakaran (Author) / Wu, Carole-Jean (Thesis advisor) / Shrivastava, Aviral (Committee member) / Lee, Yann-Hang (Committee member) / Arizona State University (Publisher)
Created2014