Theses and Dissertations
This collection includes both ASU Theses and Dissertations, submitted by graduate students, and the Barrett, Honors College theses submitted by undergraduate students.
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- Creators: Ayyanar, Raja
Description
As residential photovoltaic (PV) systems become more and more common and widespread, their system architectures are being developed to maximize power extraction while keeping the cost of associated electronics to a minimum. An architecture that has become popular in recent years is the "DC optimizer" architecture, wherein one DC-DC converter is connected to the output of each PV module. The DC optimizer architecture has the advantage of performing maximum power-point tracking (MPPT) at the module level, without the high cost of using an inverter on each module (the "microinverter" architecture). This work details the design of a proposed DC optimizer. The design incorporates a series-input parallel-output topology to implement MPPT at the sub-module level. This topology has some advantages over the more common series-output DC optimizer, including relaxed requirements for the system's inverter. An autonomous control scheme is proposed for the series-connected converters, so that no external control signals are needed for the system to operate, other than sunlight. The DC optimizer in this work is designed with an emphasis on efficiency, and to that end it uses GaN FETs and an active clamp technique to reduce switching and conduction losses. As with any parallel-output converter, phase interleaving is essential to minimize output RMS current losses. This work proposes a novel phase-locked loop (PLL) technique to achieve interleaving among the series-input converters.
ContributorsLuster, Daniel (Author) / Ayyanar, Raja (Thesis advisor) / Bakkaloglu, Bertan (Committee member) / Kiaei, Sayfe (Committee member) / Arizona State University (Publisher)
Created2014
Description
With the rapid expansion of the photovoltaic industry over the last decade, there has been a huge demand in the PV installations in the residential sector. This thesis focuses on the analysis and implementation of a dc-dc boost converter at photovoltaic sub-module level. The thesis also analyses the various topologies like switched capacitors and extended duty ratio which can be practically implemented in the photovoltaic panels. The results obtained in this work have concentrated on the use of novel strategies to substitute the use of central dc-dc converter used in PV module string connection. The implementation of distributed MPPT at the PV sub-module level is also an integral part of this thesis. Using extensive PLECS simulations, this thesis came to the conclusion that with the design of a proper compensation at the dc interconnection of a series or parallel PV Module Integrated Converter string, the central dc-dc converter can be substituted. The dc-ac interconnection voltage remains regulated at all irradiance level even without a dc-dc central converter at the string end. The foundation work for the hardware implementation has also been carried out. Design of parameters for future hardware implementation has also been presented in detail in this thesis.
ContributorsSen, Sourav (Author) / Ayyanar, Raja (Thesis advisor) / Kiaei, Sayfe (Committee member) / Bakkaloglu, Bertan (Committee member) / Arizona State University (Publisher)
Created2012
Description
Presently, hard-switching buck/boost converters are dominantly used for automotive applications. Automotive applications have stringent system requirements for dc-dc converters, such as wide input voltage range and limited EMI noise emission. High switching frequency of the dc-dc converters is much desired in automotive applications for avoiding AM band interference and for compact size. However, hard switching buck converter is not suitable at high frequency operation because of its low efficiency. In addition, buck converter has high EMI noise due to its hard-switching. Therefore, soft-switching topologies are considered in this thesis work to improve the performance of the dc-dc converters.
Many soft-switching topologies are reviewed but none of them is well suited for the given automotive applications. Two soft-switching PWM converters are proposed in this work. For low power automotive POL applications, a new active-clamp buck converter is proposed. Comprehensive analysis of this converter is presented. A 2.2 MHz, 25 W active-clamp buck converter prototype with Si MOSFETs was designed and built. The experimental results verify the operation of the converter. For 12 V to 5 V conversion, the Si based prototype achieves a peak efficiency of 89.7%. To further improve the efficiency, GaN FETs are used and an optimized SR turn-off delay is employed. Then, a peak efficiency of 93.22% is achieved. The EMI test result shows significantly improved EMI performance of the proposed active-clamp buck converter. Last, large- and small-signal models of the proposed converter are derived and verified by simulation.
For automotive dual voltage system, a new bidirectional zero-voltage-transition (ZVT) converter with coupled-inductor is proposed in this work. With the coupled-inductor, the current to realize zero-voltage-switching (ZVS) of main switches is much reduced and the core loss is minimized. Detailed analysis and design considerations for the proposed converter are presented. A 1 MHz, 250 W prototype is designed and constructed. The experimental results verify the operation. Peak efficiencies of 93.98% and 92.99% are achieved in buck mode and boost mode, respectively. Significant efficiency improvement is achieved from the efficiency comparison between the hard-switching buck converter and the proposed ZVT converter with coupled-inductor.
Many soft-switching topologies are reviewed but none of them is well suited for the given automotive applications. Two soft-switching PWM converters are proposed in this work. For low power automotive POL applications, a new active-clamp buck converter is proposed. Comprehensive analysis of this converter is presented. A 2.2 MHz, 25 W active-clamp buck converter prototype with Si MOSFETs was designed and built. The experimental results verify the operation of the converter. For 12 V to 5 V conversion, the Si based prototype achieves a peak efficiency of 89.7%. To further improve the efficiency, GaN FETs are used and an optimized SR turn-off delay is employed. Then, a peak efficiency of 93.22% is achieved. The EMI test result shows significantly improved EMI performance of the proposed active-clamp buck converter. Last, large- and small-signal models of the proposed converter are derived and verified by simulation.
For automotive dual voltage system, a new bidirectional zero-voltage-transition (ZVT) converter with coupled-inductor is proposed in this work. With the coupled-inductor, the current to realize zero-voltage-switching (ZVS) of main switches is much reduced and the core loss is minimized. Detailed analysis and design considerations for the proposed converter are presented. A 1 MHz, 250 W prototype is designed and constructed. The experimental results verify the operation. Peak efficiencies of 93.98% and 92.99% are achieved in buck mode and boost mode, respectively. Significant efficiency improvement is achieved from the efficiency comparison between the hard-switching buck converter and the proposed ZVT converter with coupled-inductor.
ContributorsNan, Chenhao (Author) / Ayyanar, Raja (Thesis advisor) / Bakkaloglu, Bertan (Committee member) / Karady, George G. (Committee member) / Qin, Jiangchao (Committee member) / Arizona State University (Publisher)
Created2016
Description
The constant scaling of supply voltages in state-of-the-art CMOS processes has led to severe limitations for many analog circuit applications. Some CMOS processes have addressed this issue by adding high voltage MOSFETs to their process. Although it can be a completely viable solution, it usually requires a changing of the process flow or adding additional steps, which in turn, leads to an increase in fabrication costs. Si-MESFETs (silicon-metal-semiconductor-field-effect-transistors) from Arizona State University (ASU) on the other hand, have an inherent high voltage capability and can be added to any silicon-on-insulator (SOI) or silicon-on-sapphire (SOS) CMOS process free of cost. This has been proved at five different commercial foundries on technologies ranging from 0.5 to 0.15 μm. Another critical issue facing CMOS processes on insulated substrates is the scaling of the thin silicon channel. Consequently, the future direction of SOI/SOS CMOS transistors may trend away from partially depleted (PD) transistors and towards fully depleted (FD) devices. FD-CMOS are already being implemented in multiple applications due to their very low power capability. Since the FD-CMOS market only figures to grow, it is appropriate that MESFETs also be developed for these processes. The beginning of this thesis will focus on the device aspects of both PD and FD-MESFETs including their layout structure, DC and RF characteristics, and breakdown voltage. The second half will then shift the focus towards implementing both types of MESFETs in an analog circuit application. Aside from their high breakdown ability, MESFETs also feature depletion mode operation, easy to adjust but well controlled threshold voltages, and fT's up to 45 GHz. Those unique characteristics can allow certain designs that were previously difficult to implement or prohibitively expensive using conventional technologies to now be achieved. One such application which benefits is low dropout regulators (LDO). By utilizing an n-channel MESFET as the pass transistor, a LDO featuring very low dropout voltage, fast transient response, and stable operation can be achieved without an external capacitance. With the focus of this thesis being MESFET based LDOs, the device discussion will be mostly tailored towards optimally designing MESFETs for this particular application.
ContributorsLepkowski, William (Author) / Thornton, Trevor (Thesis advisor) / Bakkaloglu, Bertan (Committee member) / Goryll, Michael (Committee member) / Ayyanar, Raja (Committee member) / Arizona State University (Publisher)
Created2010
Description
DC-DC converters are widely employed to interface one voltage level with another through step-up or step-down operation. In recent years, step-up DC-DC converters have been a key component in harnessing energy through renewable sources by providing an interface to integrate low voltage systems to DC-AC converters or microgrids. They find increasing applications in battery and fuel cell electric vehicles which can benefit from high and variable DC link voltage. It is important to optimize these converters for higher efficiency while achieving high gain and high power density. Non-isolated DC-DC converters are an attractive option due to the reduced complexity of magnetic design, smaller size, and lower cost. However, in these topologies, achieving a very high gain along with high efficiency has been a challenge. This work encompasses different non-isolated high gain DC-DC converters for electric vehicle and renewable energy applications. The converter topologies proposed in this work can easily achieve a conversion ratio above 20 with lower voltage and current stress across devices. For applications requiring wide input or output voltage range, different control schemes, as well as modified converter configurations, are proposed. Moreover, the converter performance is optimized by employing wide band-gap devices-based hardware prototypes. It enables higher switching frequency operation with lower switching losses. In recent times, multiple soft-switching techniques have been introduced which enable higher switching frequency operation by minimizing the switching loss. This work also discusses different soft-switching mechanisms for the high conversion ratio converter and the proposed mechanism improves the converter efficiency significantly while reducing the inductor size. Further, a novel electric vehicle traction architecture with low voltage battery and multi-input high gain DC-DC converter is introduced in this work. The proposed architecture with multiple 48 V battery packs and integrated, multi-input, high conversion ratio DC-DC converters, can reduce the maximum voltage in the vehicle during emergencies to 48 V, mitigate cell balancing issues in battery, and provide a wide variable DC link voltage. The implementation of high conversion ratio converter in multiple configurations for the proposed architecture has been discussed in detail and the proposed converter operation is validated experimentally through a scaled hardware prototype.
ContributorsGupta, Ankul (Author) / Ayyanar, Raja (Thesis advisor) / Lei, Qin (Committee member) / Bakkaloglu, Bertan (Committee member) / Ranjram, Mike (Committee member) / Arizona State University (Publisher)
Created2022