This collection includes both ASU Theses and Dissertations, submitted by graduate students, and the Barrett, Honors College theses submitted by undergraduate students. 

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Description
Process variations have become increasingly important for scaled technologies starting at 45nm. The increased variations are primarily due to random dopant fluctuations, line-edge roughness and oxide thickness fluctuation. These variations greatly impact all aspects of circuit performance and pose a grand challenge to future robust IC design. To improve robustness,

Process variations have become increasingly important for scaled technologies starting at 45nm. The increased variations are primarily due to random dopant fluctuations, line-edge roughness and oxide thickness fluctuation. These variations greatly impact all aspects of circuit performance and pose a grand challenge to future robust IC design. To improve robustness, efficient methodology is required that considers effect of variations in the design flow. Analyzing timing variability of complex circuits with HSPICE simulations is very time consuming. This thesis proposes an analytical model to predict variability in CMOS circuits that is quick and accurate. There are several analytical models to estimate nominal delay performance but very little work has been done to accurately model delay variability. The proposed model is comprehensive and estimates nominal delay and variability as a function of transistor width, load capacitance and transition time. First, models are developed for library gates and the accuracy of the models is verified with HSPICE simulations for 45nm and 32nm technology nodes. The difference between predicted and simulated σ/μ for the library gates is less than 1%. Next, the accuracy of the model for nominal delay is verified for larger circuits including ISCAS'85 benchmark circuits. The model predicted results are within 4% error of HSPICE simulated results and take a small fraction of the time, for 45nm technology. Delay variability is analyzed for various paths and it is observed that non-critical paths can become critical because of Vth variation. Variability on shortest paths show that rate of hold violations increase enormously with increasing Vth variation.
ContributorsGummalla, Samatha (Author) / Chakrabarti, Chaitali (Thesis advisor) / Cao, Yu (Thesis advisor) / Bakkaloglu, Bertan (Committee member) / Arizona State University (Publisher)
Created2011
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Description
Residue number systems have gained significant importance in the field of high-speed digital signal processing due to their carry-free nature and speed-up provided by parallelism. The critical aspect in the application of RNS is the selection of the moduli set and the design of the conversion units. There have been

Residue number systems have gained significant importance in the field of high-speed digital signal processing due to their carry-free nature and speed-up provided by parallelism. The critical aspect in the application of RNS is the selection of the moduli set and the design of the conversion units. There have been several RNS moduli sets proposed for the implementation of digital filters. However, some are unbalanced and some do not provide the required dynamic range. This thesis addresses the drawbacks of existing RNS moduli sets and proposes a new moduli set for efficient implementation of FIR filters. An efficient VLSI implementation model has been derived for the design of a reverse converter from RNS to the conventional two's complement representation. This model facilitates the realization of a reverse converter for better performance with less hardware complexity when compared with the reverse converter designs of the existing balanced 4-moduli sets. Experimental results comparing multiply and accumulate units using RNS that are implemented using the proposed four-moduli set with the state-of-the-art balanced four-moduli sets, show large improvements in area (46%) and power (43%) reduction for various dynamic ranges. RNS FIR filters using the proposed moduli-set and existing balanced 4-moduli set are implemented in RTL and compared for chip area and power and observed 20% improvements. This thesis also presents threshold logic implementation of the reverse converter.
ContributorsChalivendra, Gayathri (Author) / Vrudhula, Sarma (Thesis advisor) / Shrivastava, Aviral (Committee member) / Bakkaloglu, Bertan (Committee member) / Arizona State University (Publisher)
Created2011
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Description
In this thesis, a Built-in Self Test (BiST) based testing solution is proposed to measure linear and non-linear impairments in the RF Transmitter path using analytical approach. Design issues and challenges with the impairments modeling and extraction in transmitter path are discussed. Transmitter is modeled for I/Q gain & phase

In this thesis, a Built-in Self Test (BiST) based testing solution is proposed to measure linear and non-linear impairments in the RF Transmitter path using analytical approach. Design issues and challenges with the impairments modeling and extraction in transmitter path are discussed. Transmitter is modeled for I/Q gain & phase mismatch, system non-linearity and DC offset using Matlab. BiST architecture includes a peak detector which includes a self mode mixer and 200 MHz filter. Self Mode mixing operation with filtering removes the high frequency signal contents and allows performing analysis on baseband frequency signals. Transmitter impairments were calculated using spectral analysis of output from the BiST circuitry using an analytical method. Matlab was used to simulate the system with known test impairments and impairment values from simulations were calculated based on system modeling in Mathematica. Simulated data is in good correlation with input test data along with very fast test time and high accuracy. The key contribution of the work is that, system impairments are extracted from transmitter response at baseband frequency using envelope detector hence eliminating the need of expensive high frequency ATE (Automated Test Equipments).
ContributorsGoyal, Nitin (Author) / Ozev, Sule (Thesis advisor) / Duman, Tolga (Committee member) / Bakkaloglu, Bertan (Committee member) / Arizona State University (Publisher)
Created2011
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Description
Increasing demand for high strength powder metallurgy (PM) steels has resulted in the development of dual phase PM steels. In this work, the effects of thermal aging on the microstructure and mechanical behavior of dual phase precipitation hardened powder metallurgy (PM) stainless steels of varying ferrite-martensite content were examined. Quantitative

Increasing demand for high strength powder metallurgy (PM) steels has resulted in the development of dual phase PM steels. In this work, the effects of thermal aging on the microstructure and mechanical behavior of dual phase precipitation hardened powder metallurgy (PM) stainless steels of varying ferrite-martensite content were examined. Quantitative analyses of the inherent porosity and phase fractions were conducted on the steels and no significant differences were noted with respect to aging temperature. Tensile strength, yield strength, and elongation to fracture all increased with increasing aging temperature reaching maxima at 538oC in most cases. Increased strength and decreased ductility were observed in steels of higher martensite content. Nanoindentation of the individual microconstituents was employed to obtain a fundamental understanding of the strengthening contributions. Both the ferrite and martensite hardness values increased with aging temperature and exhibited similar maxima to the bulk tensile properties. Due to the complex non-uniform stresses and strains associated with conventional nanoindentation, micropillar compression has become an attractive method to probe local mechanical behavior while limiting strain gradients and contributions from surrounding features. In this study, micropillars of ferrite and martensite were fabricated by focused ion beam (FIB) milling of dual phase precipitation hardened powder metallurgy (PM) stainless steels. Compression testing was conducted using a nanoindenter equipped with a flat punch indenter. The stress-strain curves of the individual microconstituents were calculated from the load-displacement curves less the extraneous displacements of the system. Using a rule of mixtures approach in conjunction with porosity corrections, the mechanical properties of ferrite and martensite were combined for comparison to tensile tests of the bulk material, and reasonable agreement was found for the ultimate tensile strength. Micropillar compression experiments of both as sintered and thermally aged material allowed for investigation of the effect of thermal aging.
ContributorsStewart, Jennifer (Author) / Chawla, Nikhilesh (Thesis advisor) / Jiang, Hanqing (Committee member) / Krause, Stephen (Committee member) / Arizona State University (Publisher)
Created2011
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Description
In recent years, the field of nanomedicine has progressed at an astonishing rate, particularly with respect to applications in cancer treatment and molecular imaging. Although organic systems have been the frontrunners, inorganic systems have also begun to show promise, especially those based upon silica and magnetic nanoparticles (NPs). Many of

In recent years, the field of nanomedicine has progressed at an astonishing rate, particularly with respect to applications in cancer treatment and molecular imaging. Although organic systems have been the frontrunners, inorganic systems have also begun to show promise, especially those based upon silica and magnetic nanoparticles (NPs). Many of these systems are being designed for simultaneous therapeutic and diagnostic capabilities, thus coining the term, theranostics. A unique class of inorganic systems that shows great promise as theranostics is that of layered double hydroxides (LDH). By synthesis of a core/shell structures, e.g. a gold nanoparticle (NP) core and LDH shell, the multifunctional theranostic may be developed without a drastic increase in the structural complexity. To demonstrate initial proof-of-concept of a potential (inorganic) theranostic platform, a Au-core/LDH-shell nanovector has been synthesized and characterized. The LDH shell was heterogeneously nucleated and grown on the surface of silica coated gold NPs via a coprecipitation method. Polyethylene glycol (PEG) was introduced in the initial synthesis steps to improve crystallinity and colloidal stability. Additionally, during synthesis, fluorescein isothiocyanate (FITC) was intercalated into the interlayer spacing of the LDH. In contrast to the PEG stabilization, a post synthesis citric acid treatment was used as a method to control the size and short-term stability. The heterogeneous core-shell system was characterized with scanning electron microscopy (SEM), energy dispersive x-ray spectroscopy (EDX), dynamic light scattering (DLS), and powder x-ray diffraction (PXRD). A preliminary in vitro study carried out with the assistance of Dr. Kaushal Rege's group at Arizona State University was to demonstrate the endocytosis capability of homogeneously-grown LDH NPs. The DLS measurements of the core-shell NPs indicated an average particle size of 212nm. The PXRD analysis showed that PEG greatly improved the crystallinity of the system while simultaneously preventing aggregation of the NPs. The preliminary in vitro fluorescence microscopy revealed a moderate uptake of homogeneous LDH NPs into the cells.
ContributorsRearick, Colton (Author) / Dey, Sandwip K (Thesis advisor) / Krause, Stephen (Committee member) / Ramakrishna, B (Committee member) / Arizona State University (Publisher)
Created2011
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Description
This thesis discusses the use of low temperature microwave anneal as an alternative technique to recrystallize materials damaged or amorphized due to implantation techniques. The work focuses on the annealing of high-Z doped Si wafers that are incapable of attaining high temperatures required for recrystallizing the damaged implanted layers by

This thesis discusses the use of low temperature microwave anneal as an alternative technique to recrystallize materials damaged or amorphized due to implantation techniques. The work focuses on the annealing of high-Z doped Si wafers that are incapable of attaining high temperatures required for recrystallizing the damaged implanted layers by microwave absorption The increasing necessity for quicker and more efficient processing techniques motivates study of the use of a single frequency applicator microwave cavity along with a Fe2O3 infused SiC-alumina susceptor/applicator as an alternative post implantation process. Arsenic implanted Si samples of different dopant concentrations and implantation energies were studied pre and post microwave annealing. A set of as-implanted Si samples were also used to assess the effect of inactive dopants against presence of electrically active dopants on the recrystallization mechanisms. The extent of damage repair and Si recrystallization of the damage caused by arsenic and Si implantation of Si is determined by cross-section transmission electron microscopy and Raman spectroscopy. Dopant activation is evaluated for the As implanted Si by sheet resistance measurements. For the same, secondary ion mass spectroscopy analysis is used to compare the extent of diffusion that results from such microwave annealing with that experienced when using conventional rapid thermal annealing (RTA). Results show that compared to susceptor assisted microwave annealing, RTA caused undesired dopant diffusion. The SiC-alumina susceptor plays a predominant role in supplying heat to the Si substrate, and acts as an assistor that helps a high-Z dopant like arsenic to absorb the microwave energy using a microwave loss mechanism which is a combination of ionic and dipole losses. Comparisons of annealing of the samples were done with and without the use of the susceptor, and confirm the role played by the susceptor, since the samples donot recrystallize when the surface heating mechanism provided by the susceptor is not incorporated. Variable frequency microwave annealing was also performed over the as-implanted Si samples for durations and temperatures higher than the single frequency microwave anneal, but only partial recrystallization of the damaged layer was achieved.
ContributorsVemuri, Rajitha (Author) / Alford, Terry L. (Thesis advisor) / Theodore, David (Committee member) / Krause, Stephen (Committee member) / Arizona State University (Publisher)
Created2011
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Description
Negative bias temperature instability (NBTI) and channel hot carrier (CHC) are important reliability issues impacting analog circuit performance and lifetime. Compact reliability models and efficient simulation methods are essential for circuit level reliability prediction. This work proposes a set of compact models of NBTI and CHC effects for analog and

Negative bias temperature instability (NBTI) and channel hot carrier (CHC) are important reliability issues impacting analog circuit performance and lifetime. Compact reliability models and efficient simulation methods are essential for circuit level reliability prediction. This work proposes a set of compact models of NBTI and CHC effects for analog and mixed-signal circuit, and a direct prediction method which is different from conventional simulation methods. This method is applied in circuit benchmarks and evaluated. This work helps with improving efficiency and accuracy of circuit aging prediction.
ContributorsZheng, Rui (Author) / Cao, Yu (Thesis advisor) / Yu, Hongyu (Committee member) / Bakkaloglu, Bertan (Committee member) / Arizona State University (Publisher)
Created2011
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Description
ABSTRACT To meet stringent market demands, manufacturers must produce Radio Frequency (RF) transceivers that provide wireless communication between electronic components used in consumer products at extremely low cost. Semiconductor manufacturers are in a steady race to increase integration levels through advanced system-on-chip (SoC) technology. The testing costs of these devices

ABSTRACT To meet stringent market demands, manufacturers must produce Radio Frequency (RF) transceivers that provide wireless communication between electronic components used in consumer products at extremely low cost. Semiconductor manufacturers are in a steady race to increase integration levels through advanced system-on-chip (SoC) technology. The testing costs of these devices tend to increase with higher integration levels. As the integration levels increase and the devices get faster, the need for high-calibre low cost test equipment become highly dominant. However testing the overall system becomes harder and more expensive. Traditionally, the transceiver system is tested in two steps utilizing high-calibre RF instrumentation and mixed-signal testers, with separate measurement setups for transmitter and receiver paths. Impairments in the RF front-end, such as the I/Q gain and phase imbalance and nonlinearity, severely affect the performance of the device. The transceiver needs to be characterized in terms of these impairments in order to guarantee good performance and specification requirements. The motivation factor for this thesis is to come up with a low cost and computationally simple extraction technique of these impairments. In the proposed extraction technique, the mapping between transmitter input signals and receiver output signals are used to extract the impairment and nonlinearity parameters. This is done with the help of detailed mathematical modeling of the transceiver. While the overall behavior is nonlinear, both linear and nonlinear models to be used under different test setups are developed. A two step extraction technique has been proposed in this work. The extraction of system parameters is performed by using the mathematical model developed along with a genetic algorithm implemented in MATLAB. The technique yields good extraction results with reasonable error. It uses simple mathematical operation which makes the extraction fast and computationally simple when compared to other existing techniques such as traditional two step dedicated approach, Nonlinear Solver (NLS) approach, etc. It employs frequency domain analysis of low frequency input and output signals, over cumbersome time domain computations. Thus a test method, including detailed behavioral modeling of the transceiver, appropriate test signal design along with a simple algorithm for extraction is presented.
ContributorsSreenivassan, Aiswariya (Author) / Ozev, Sule (Thesis advisor) / Kiaei, Sayfe (Committee member) / Bakkaloglu, Bertan (Committee member) / Arizona State University (Publisher)
Created2011
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Description
The partially-depleted (PD) silicon Metal Semiconductor Field Effect Transistor (MESFET) is becoming more and more attractive for analog and RF applications due to its high breakdown voltage. Compared to conventional CMOS high voltage transistors, the silicon MESFET can be fabricated in commercial standard Silicon-on-Insulator (SOI) CMOS foundries without any change

The partially-depleted (PD) silicon Metal Semiconductor Field Effect Transistor (MESFET) is becoming more and more attractive for analog and RF applications due to its high breakdown voltage. Compared to conventional CMOS high voltage transistors, the silicon MESFET can be fabricated in commercial standard Silicon-on-Insulator (SOI) CMOS foundries without any change to the process. The transition frequency of the device is demonstrated to be 45GHz, which makes the MESFET suitable for applications in high power RF power amplifier designs. Also, high breakdown voltage and low turn-on resistance make it the ideal choice for switches in the switching regulator designs. One of the anticipated applications of the MESFET is for the pass device for a low dropout linear regulator. Conventional NMOS and PMOS linear regulators suffer from high dropout voltage, low bandwidth and poor stability issues. In contrast, the N-MESFET pass transistor can provide an ultra-low dropout voltage and high bandwidth without the need for an external compensation capacitor to ensure stability. In this thesis, the design theory and problems of the conventional linear regulators are discussed. N-MESFET low dropout regulators are evaluated and characterized. The error amplifier used a folded cascode architecture with gain boosting. The source follower topology is utilized as the buffer to sink the gate leakage current from the MESFET. A shunt-feedback transistor is added to reduce the output impedance and provide the current adaptively. Measurement results show that the dropout voltage is less than 150 mV for a 1A load current at 1.8V output. Radiation measurements were done for discrete MESFET and fully integrated LDO regulators, which demonstrate their radiation tolerance ability for aerospace applications.
ContributorsChen, Bo (Author) / Thornton, Trevor (Thesis advisor) / Bakkaloglu, Bertan (Committee member) / Goryll, Michael (Committee member) / Arizona State University (Publisher)
Created2013
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Description
III-Nitride nanostructures have been an active area of research recently due to their ability to tune their optoelectronic properties. Thus far work has been done on InGaN quantum dots, nanowires, nanopillars, amongst other structures, but this research reports the creation of a new type of InGaN nanostructure, nanorings. Hexagonal InGaN

III-Nitride nanostructures have been an active area of research recently due to their ability to tune their optoelectronic properties. Thus far work has been done on InGaN quantum dots, nanowires, nanopillars, amongst other structures, but this research reports the creation of a new type of InGaN nanostructure, nanorings. Hexagonal InGaN nanorings were formed using Metal Organic Chemical Vapor Deposition through droplet epitaxy. The nanorings were thoroughly analyzed using x-ray diffraction, photoluminescence, electron microscopy, electron diffraction, and atomic force microscopy. Nanorings with high indium incorporation were achieved with indium content up to 50% that was then controlled using the growth time, temperature, In/Ga ratio and III/N ratio. The analysis showed that the nanoring shape is able to incorporate more indium than other nanostructures, due to the relaxing mechanism involved in the formation of the nanoring. The ideal conditions were determined to be growth of 30 second droplets with a growth time of 1 minute 30 seconds at 770 C to achieve the most well developed rings with the highest indium concentration.
ContributorsZaidi, Zohair (Author) / Mahajan, Subhash (Thesis advisor) / O'Connell, Michael J (Committee member) / Krause, Stephen (Committee member) / Arizona State University (Publisher)
Created2012