Theses and Dissertations
This collection includes both ASU Theses and Dissertations, submitted by graduate students, and the Barrett, Honors College theses submitted by undergraduate students.
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- Creators: Goodnick, Stephen
Description
Wide Bandgap (WBG) semiconductor materials are shaping day-to-day technologyby introducing powerful and more energy responsible devices. These materials have
opened the door for building basic semiconductor devices which are superior in terms of
handling high voltages, high currents, power, and temperature which is not possible using
conventional silicon technology. As the research continues in the field of WBG based
devices, there is a potential chance that the power electronics industry can save billions of
dollars deploying energy-efficient circuits in high power conversion electronics. Diamond,
silicon carbide and gallium nitride are the top three contenders among which diamond can
significantly outmatch others in a variety of properties. However, diamond technology is
still in its early phase of development and there are challenges involved in many aspects of
processing a successful integrated circuit. The work done in this research addresses three
major aspects of problems related to diamond technology. In the first part, the applicability
of compact modeling and Technology Computer-Aided Design (TCAD) modeling
technique for diamond Schottky p-i-n diodes has been demonstrated. The compact model
accurately predicts AC, DC and nonlinear behavior of the diode required for fast circuit
simulation. Secondly, achieving low resistance ohmic contact onto n-type diamond is one
of the major issues that is still an open research problem as it determines the performance
of high-power RF circuits and switching losses in power converters circuits. So, another
portion of this thesis demonstrates the achievement of very low resistance ohmic contact
(~ 10-4 Ω⋅cm2) onto n-type diamond using nano crystalline carbon interface layer. Using
the developed TCAD and compact models for low resistance contacts, circuit level
predictions show improvements in RF performance. Lastly, an initial study of breakdown
characteristics of diamond and cubic boron nitride heterostructure is presented. This study
serves as a first step for making future transistors using diamond and cubic boron nitride –
a very less explored material system in literature yet promising for extreme circuit
applications involving high power and temperature.
ContributorsJHA, VISHAL (Author) / Thornton, Trevor (Thesis advisor) / Goodnick, Stephen (Committee member) / Nemanich, Robert (Committee member) / Alford, Terry (Committee member) / Hoque, Mazhar (Committee member) / Arizona State University (Publisher)
Created2023
Description
This work demonstrates a capable reverse pulse deposition methodology to influence gap fill behavior inside microvia along with a uniform deposit in the fine line patterned regions for substrate packaging applications. Interconnect circuitry in IC substrate packages comprises of stacked microvia that varies in depth from 20µm to 100µm with an aspect ratio of 0.5 to 1.5 and fine line patterns defined by photolithography. Photolithography defined pattern regions incorporate a wide variety of feature sizes including large circular pad structures with diameter of 20µm - 200µm, fine traces with varying widths of 3µm - 30µm and additional planar regions to define a IC substrate package. Electrodeposition of copper is performed to establish the desired circuit. Electrodeposition of copper in IC substrate applications holds certain unique challenges in that they require a low cost manufacturing process that enables a void-free gap fill inside the microvia along with uniform deposition of copper on exposed patterned regions. Deposition time scales to establish the desired metal thickness for such packages could range from several minutes to few hours. This work showcases a reverse pulse electrodeposition methodology that achieves void-free gap fill inside the microvia and uniform plating in FLS (Fine Lines and Spaces) regions with significantly higher deposition rates than traditional approaches. In order to achieve this capability, systematic experimental and simulation studies were performed. A strong correlation of independent parameters that govern the electrodeposition process such as bath temperature, reverse pulse plating parameters and the ratio of electrolyte concentrations is shown to the deposition kinetics and deposition uniformity in fine patterned regions and gap fill rate inside the microvia. Additionally, insight into the physics of via fill process is presented with secondary and tertiary current simulation efforts. Such efforts lead to show “smart” control of deposition rate at the top and bottom of via to avoid void formation. Finally, a parametric effect on grain size and the ensuing copper metallurgical characteristics of bulk copper is also shown to enable high reliability substrate packages for the IC packaging industry.
ContributorsGanesan, Kousik (Author) / Tasooji, Amaneh (Thesis advisor) / Manepalli, Rahul (Committee member) / Alford, Terry (Committee member) / Chan, Candace (Committee member) / Arizona State University (Publisher)
Created2018