Theses and Dissertations
This collection includes both ASU Theses and Dissertations, submitted by graduate students, and the Barrett, Honors College theses submitted by undergraduate students.
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Description
In this research, our goal was to fabricate Josephson junctions that can be stably processed at 300°C or higher. With the purpose of integrating Josephson junction fabrication with the current semiconductor circuit fabrication process, back-end process temperatures (>350 °C) will be a key for producing large scale junction circuits reliably, which requires the junctions to be more thermally stable than current Nb/Al-AlOx/Nb junctions. Based on thermodynamics, Hf was chosen to produce thermally stable Nb/Hf-HfOx/Nb superconductor tunnel Josephson junctions that can be grown or processed at elevated temperatures. Also elevated synthesis temperatures improve the structural and electrical properties of Nb electrode layers that could potentially improve junction device performance. The refractory nature of Hf, HfO2 and Nb allow for the formation of flat, abrupt and thermally-stable interfaces. But the current Al-based barrier will have problems when using with high-temperature grown and high-quality Nb. So our work is aimed at using Nb grown at elevated temperatures to fabricate thermally stable Josephson tunnel junctions. As a junction barrier metal, Hf was studied and compared with the traditional Al-barrier material. We have proved that Hf-HfOx is a good barrier candidate for high-temperature synthesized Josephson junction. Hf deposited at 500 °C on Nb forms flat and chemically abrupt interfaces. Nb/Hf-HfOx/Nb Josephson junctions were synthesized, fabricated and characterized with different oxidizing conditions. The results of materials characterization and junction electrical measurements are reported and analyzed. We have improved the annealing stability of Nb junctions and also used high-quality Nb grown at 500 °C as the bottom electrode successfully. Adding a buffer layer or multiple oxidation steps improves the annealing stability of Josephson junctions. We also have attempted to use the Atomic Layer Deposition (ALD) method for the growth of Hf oxide as the junction barrier and got tunneling results.
ContributorsHuang, Mengchu, 1987- (Author) / Newman, Nathan (Thesis advisor) / Rowell, John M. (Committee member) / Singh, Rakesh K. (Committee member) / Chamberlin, Ralph (Committee member) / Wang, Robert (Committee member) / Arizona State University (Publisher)
Created2013
Description
Diamond transistors are promising as high-power and high-frequency devices having higher efficiencies than conventional transistors. Diamond possesses superior electronic properties, such as a high bandgap (5.47 eV), high breakdown voltage (>10 MV cm−1 ), high electron and hole mobilities [4500 and 3800 cm2 V−1 · s−1, respectively], high electron and hole saturation velocities (1.5 × 107 and 1.05 × 107 cm s−1, respectively), and high thermal conductivity [22 W cm−1 · K−1], compared to conventional semiconductors. Reportedly, the diamond field-effect transistors (FETs) have shown transition frequencies (fT) of 45 and 70 GHz, maximum oscillation frequency (fmax) of 120 GHz, and radiofrequency (RF) power densities of 2.1 and 3.8 W mm−1 at 1 GHz. A two-dimensional-hole-gas (2DHG) surface channel forms on H-diamond by transfer doping from adsorbates/dielectrics in contact with H-diamond surface. However, prior studies indicate that charge transfer at the dielectric/ H-diamond interface could result in relatively low mobility attributed to interface scattering from the transferred negative charge to acceptor region. H-terminated diamond exhibits a negative electron affinity (NEA) of -1.1 to -1.3 eV, which is crucial to enable charge transfer doping. To overcome these limitations modulation doping, that is, selective doping, that leads to spatial separation of the MoO3 acceptor layer from the hole channel on H-diamond has been proposed. Molybdenum oxide (MoO3) was used as dielectric as it has electron affinity of 5.9eV and could align its conduction band minimum (CBM) below the valence band maximum (VBM) of H-terminated diamond. The band alignment provides the driving potential for charge transfer. Hafnium oxide (HfO2) was used as interfacial layer since it is a high-k oxide insulator (∼25), having large Eg (5.6 eV), high critical breakdown field, and high thermal stability. This study presents photoemission measurements of the electronic band alignments of the MoO3/HfO2/H-diamond layer structure to gain insight into the driving potential for the negative charge transfer and the location of the negative charges near the interface, in the HfO2 layer or in the MoO3 layer. The diamond hole concentration, mobility, and sheet resistance were characterized for MoO3/HfO2/H-Diamond with HfO2 layers of 0, 2 and 4 nm thickness.
ContributorsDeshmukh, Aditya Vilasrao (Author) / Nemanich, Robert J. (Thesis advisor) / Alford, Terry (Committee member) / Yang, Sui (Committee member) / Arizona State University (Publisher)
Created2024
Description
Wide bandgap semiconductors are of much current interest due to their superior electrical properties. This dissertation describes electron microscopy characterization of GaN-on-GaN structures for high-power vertical device applications. Unintentionally-doped (UID) GaN layers grown homoepitaxially via metal-organic chemical vapor deposition on freestanding GaN substrates, were subjected to dry etching, and layers of UID-GaN/p-GaN were over-grown. The as-grown and regrown heterostructures were examined in cross-section using transmission electron microscopy (TEM). Two different etching treatments, fast-etch-only and multiple etches with decreasing power, were employed. The fast-etch-only devices showed GaN-on-GaN interface at etched location, and low device breakdown voltages were measured (~ 45-95V). In comparison, no interfaces were visible after multiple etching steps, and the corresponding breakdown voltages were much higher (~1200-1270V). These results emphasized importance of optimizing surface etching techniques for avoiding degraded device performance.
The morphology of GaN-on-GaN devices after reverse-bias electrical stressing to breakdown was investigated. All failed devices had irreversible structural damage, showing large surface craters (~15-35 microns deep) with lengthy surface cracks. Cross-sectional TEM of failed devices showed high densities of threading dislocations (TDs) around the cracks and near crater surfaces. Progressive ion-milling across damaged devices revealed high densities of TDs and the presence of voids beneath cracks: these features were not observed in unstressed devices. The morphology of GaN substrates grown by hydride vapor-phase epitaxy (HVPE) and by ammonothermal methods were correlated with reverse-bias results. HVPE substrates showed arrays of surface features when observed by X-ray topography (XRT). All fabricated devices that overlapped with these features had typical reverse-bias voltages less than 100V at a leakage current limit of 10-6 A. In contrast, devices not overlapping with such features reached voltages greater than 300V. After etching, HVPE substrate surfaces showed defect clusters and macro-pits, whereas XRT images of ammonothermal substrate revealed no visible features. However, some devices fabricated on ammonothermal substrate failed at low voltages. Devices on HVPE and ammonothermal substrates with low breakdown voltages showed crater-like surface damage and revealed TDs (~25µm deep) and voids; such features were not observed in devices reaching higher voltages. These results should assist in developing protocols to fabricate reliable high-voltage devices.
ContributorsPeri, Prudhvi Ram (Author) / Smith, David J. (Thesis advisor) / Alford, Terry (Committee member) / Mccartney, Martha R (Committee member) / Nemanich, Robert (Committee member) / Zhao, Yuji (Committee member) / Arizona State University (Publisher)
Created2021