Theses and Dissertations
This collection includes both ASU Theses and Dissertations, submitted by graduate students, and the Barrett, Honors College theses submitted by undergraduate students.
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- All Subjects: Semiconductors
Description
In semiconductor physics, many properties or phenomena of materials can be brought to light through certain changes in the materials. Having a tool to define new material properties so as to highlight certain phenomena greatly increases the ability to understand that phenomena. The generalized Monte Carlo tool allows the user to do that by keeping every parameter used to define a material, within the non-parabolic band approximation, a variable in the control of the user. A material is defined by defining its valleys, energies, valley effective masses and their directions. The types of scattering to be included can also be chosen. The non-parabolic band structure model is used. With the deployment of the generalized Monte Carlo tool onto www.nanoHUB.org the tool will be available to users around the world. This makes it a very useful educational tool that can be incorporated into curriculums. The tool is integrated with Rappture, to allow user-friendly access of the tool. The user can freely define a material in an easy systematic way without having to worry about the coding involved. The output results are automatically graphed and since the code incorporates an analytic band structure model, it is relatively fast. The versatility of the tool has been investigated and has produced results closely matching the experimental values for some common materials. The tool has been uploaded onto www.nanoHUB.org by integrating it with the Rappture interface. By using Rappture as the user interface, one can easily make changes to the current parameter sets to obtain even more accurate results.
ContributorsHathwar, Raghuraj (Author) / Vasileska, Dragica (Thesis advisor) / Goodnick, Stephen M (Committee member) / Saraniti, Marco (Committee member) / Arizona State University (Publisher)
Created2011
Description
The goal of this research work is to develop an understanding as well as modelling thermal effects in Si based nano-scale devices using a multiscale simulator tool. This tool has been developed within the research group at Arizona State University led by Professor Dr. Dragica Vasileska. Another research group, headed by Professor Dr. Thornton, also at Arizona State University, provided support with software tools, by not only laying out the physical experimental device, but also provided experimental data to verify the correctness and accuracy of the developed simulation tool. The tool consists of three separate but conjoined modules at different scales of representation. 1) A particle based, ensemble Monte Carlo (MC) simulation tool, which, in the long-time (electronic motion) limit, solves the Boltzmann transport equation (BTE) for electrons, coupled with an iterative solution to a two-dimensional (2D) Poisson’s equation, at the base device level. 2) Another device level thermal modeling tool which solves the energy balance equations accounting for carrier-phonon and phonon-phonon interactions and is integrated with the MC tool. 3) Lastly, a commercial technology computer aided design (TCAD) software, Silvaco is employed to incorporate the results from the above two tools to a circuit level, common-source dual-transistor circuit, where one of the devices acts a heater and the other as a sensor, to study the impacts of thermal heating. The results from this tool are fed back to the previous device level tools to iterate on, until a stable, unified electro-thermal equilibrium/result is obtained. This coupled electro-thermal approach was originally developed for an individual n-channel MOSFET (NMOS) device by Prof. Katerina Raleva and was extended to allow for multiple devices in tandem, thereby providing a platform for better and more accurate modeling of device behavior, analyzing circuit performance, and understanding thermal effects. Simulating this dual device circuit and analyzing the extracted voltage transfer and output characteristics verifies the efficacy of this methodology as the results obtained from this multi-scale, electro-thermal simulator tool, are found to be in good general agreement with the experimental data.
ContributorsQazi, Suleman Sami (Author) / Vasileska, Dragica (Thesis advisor) / Goodnick, Stephen M (Committee member) / Thornton, Trevor J (Committee member) / Ferry, David K (Committee member) / Arizona State University (Publisher)
Created2021
Description
Diamond transistors are promising as high-power and high-frequency devices having higher efficiencies than conventional transistors. Diamond possesses superior electronic properties, such as a high bandgap (5.47 eV), high breakdown voltage (>10 MV cm−1 ), high electron and hole mobilities [4500 and 3800 cm2 V−1 · s−1, respectively], high electron and hole saturation velocities (1.5 × 107 and 1.05 × 107 cm s−1, respectively), and high thermal conductivity [22 W cm−1 · K−1], compared to conventional semiconductors. Reportedly, the diamond field-effect transistors (FETs) have shown transition frequencies (fT) of 45 and 70 GHz, maximum oscillation frequency (fmax) of 120 GHz, and radiofrequency (RF) power densities of 2.1 and 3.8 W mm−1 at 1 GHz. A two-dimensional-hole-gas (2DHG) surface channel forms on H-diamond by transfer doping from adsorbates/dielectrics in contact with H-diamond surface. However, prior studies indicate that charge transfer at the dielectric/ H-diamond interface could result in relatively low mobility attributed to interface scattering from the transferred negative charge to acceptor region. H-terminated diamond exhibits a negative electron affinity (NEA) of -1.1 to -1.3 eV, which is crucial to enable charge transfer doping. To overcome these limitations modulation doping, that is, selective doping, that leads to spatial separation of the MoO3 acceptor layer from the hole channel on H-diamond has been proposed. Molybdenum oxide (MoO3) was used as dielectric as it has electron affinity of 5.9eV and could align its conduction band minimum (CBM) below the valence band maximum (VBM) of H-terminated diamond. The band alignment provides the driving potential for charge transfer. Hafnium oxide (HfO2) was used as interfacial layer since it is a high-k oxide insulator (∼25), having large Eg (5.6 eV), high critical breakdown field, and high thermal stability. This study presents photoemission measurements of the electronic band alignments of the MoO3/HfO2/H-diamond layer structure to gain insight into the driving potential for the negative charge transfer and the location of the negative charges near the interface, in the HfO2 layer or in the MoO3 layer. The diamond hole concentration, mobility, and sheet resistance were characterized for MoO3/HfO2/H-Diamond with HfO2 layers of 0, 2 and 4 nm thickness.
ContributorsDeshmukh, Aditya Vilasrao (Author) / Nemanich, Robert J. (Thesis advisor) / Alford, Terry (Committee member) / Yang, Sui (Committee member) / Arizona State University (Publisher)
Created2024
Description
Wide bandgap semiconductors are of much current interest due to their superior electrical properties. This dissertation describes electron microscopy characterization of GaN-on-GaN structures for high-power vertical device applications. Unintentionally-doped (UID) GaN layers grown homoepitaxially via metal-organic chemical vapor deposition on freestanding GaN substrates, were subjected to dry etching, and layers of UID-GaN/p-GaN were over-grown. The as-grown and regrown heterostructures were examined in cross-section using transmission electron microscopy (TEM). Two different etching treatments, fast-etch-only and multiple etches with decreasing power, were employed. The fast-etch-only devices showed GaN-on-GaN interface at etched location, and low device breakdown voltages were measured (~ 45-95V). In comparison, no interfaces were visible after multiple etching steps, and the corresponding breakdown voltages were much higher (~1200-1270V). These results emphasized importance of optimizing surface etching techniques for avoiding degraded device performance.
The morphology of GaN-on-GaN devices after reverse-bias electrical stressing to breakdown was investigated. All failed devices had irreversible structural damage, showing large surface craters (~15-35 microns deep) with lengthy surface cracks. Cross-sectional TEM of failed devices showed high densities of threading dislocations (TDs) around the cracks and near crater surfaces. Progressive ion-milling across damaged devices revealed high densities of TDs and the presence of voids beneath cracks: these features were not observed in unstressed devices. The morphology of GaN substrates grown by hydride vapor-phase epitaxy (HVPE) and by ammonothermal methods were correlated with reverse-bias results. HVPE substrates showed arrays of surface features when observed by X-ray topography (XRT). All fabricated devices that overlapped with these features had typical reverse-bias voltages less than 100V at a leakage current limit of 10-6 A. In contrast, devices not overlapping with such features reached voltages greater than 300V. After etching, HVPE substrate surfaces showed defect clusters and macro-pits, whereas XRT images of ammonothermal substrate revealed no visible features. However, some devices fabricated on ammonothermal substrate failed at low voltages. Devices on HVPE and ammonothermal substrates with low breakdown voltages showed crater-like surface damage and revealed TDs (~25µm deep) and voids; such features were not observed in devices reaching higher voltages. These results should assist in developing protocols to fabricate reliable high-voltage devices.
ContributorsPeri, Prudhvi Ram (Author) / Smith, David J. (Thesis advisor) / Alford, Terry (Committee member) / Mccartney, Martha R (Committee member) / Nemanich, Robert (Committee member) / Zhao, Yuji (Committee member) / Arizona State University (Publisher)
Created2021