ASU Electronic Theses and Dissertations
This collection includes most of the ASU Theses and Dissertations from 2011 to present. ASU Theses and Dissertations are available in downloadable PDF format; however, a small percentage of items are under embargo. Information about the dissertations/theses includes degree information, committee members, an abstract, supporting data or media.
In addition to the electronic theses found in the ASU Digital Repository, ASU Theses and Dissertations can be found in the ASU Library Catalog.
Dissertations and Theses granted by Arizona State University are archived and made available through a joint effort of the ASU Graduate College and the ASU Libraries. For more information or questions about this collection contact or visit the Digital Repository ETD Library Guide or contact the ASU Graduate College at gradformat@asu.edu.
Displaying 1 - 10 of 65
Description
Recently, the use of zinc oxide (ZnO) nanowires as an interphase in composite materials has been demonstrated to increase the interfacial shear strength between carbon fiber and an epoxy matrix. In this research work, the strong adhesion between ZnO and carbon fiber is investigated to elucidate the interactions at the interface that result in high interfacial strength. First, molecular dynamics (MD) simulations are performed to calculate the adhesive energy between bare carbon and ZnO. Since the carbon fiber surface has oxygen functional groups, these were modeled and MD simulations showed the preference of ketones to strongly interact with ZnO, however, this was not observed in the case of hydroxyls and carboxylic acid. It was also found that the ketone molecules ability to change orientation facilitated the interactions with the ZnO surface. Experimentally, the atomic force microscope (AFM) was used to measure the adhesive energy between ZnO and carbon through a liftoff test by employing highly oriented pyrolytic graphite (HOPG) substrate and a ZnO covered AFM tip. Oxygen functionalization of the HOPG surface shows the increase of adhesive energy. Additionally, the surface of ZnO was modified to hold a negative charge, which demonstrated an increase in the adhesive energy. This increase in adhesion resulted from increased induction forces given the relatively high polarizability of HOPG and the preservation of the charge on ZnO surface. It was found that the additional negative charge can be preserved on the ZnO surface because there is an energy barrier since carbon and ZnO form a Schottky contact. Other materials with the same ionic properties of ZnO but with higher polarizability also demonstrated good adhesion to carbon. This result substantiates that their induced interaction can be facilitated not only by the polarizability of carbon but by any of the materials at the interface. The versatility to modify the magnitude of the induced interaction between carbon and an ionic material provides a new route to create interfaces with controlled interfacial strength.
ContributorsGalan Vera, Magdian Ulises (Author) / Sodano, Henry A (Thesis advisor) / Jiang, Hanqing (Committee member) / Solanki, Kiran (Committee member) / Oswald, Jay (Committee member) / Speyer, Gil (Committee member) / Arizona State University (Publisher)
Created2013
Description
Micro Electro Mechanical Systems (MEMS) is one of the fastest growing field in silicon industry. Low cost production is key for any company to improve their market share. MEMS testing is challenging since input to test a MEMS device require physical stimulus like acceleration, pressure etc. Also, MEMS device vary with process and requires calibration to make them reliable. This increases test cost and testing time. This challenge can be overcome by combining electrical stimulus based testing along with statistical analysis on MEMS response for electrical stimulus and also limited physical stimulus response data. This thesis proposes electrical stimulus based built in self test(BIST) which can be used to get MEMS data and later this data can be used for statistical analysis. A capacitive MEMS accelerometer is considered to test this BIST approach. This BIST circuit overhead is less and utilizes most of the standard readout circuit. This thesis discusses accelerometer response for electrical stimulus and BIST architecture. As a part of this BIST circuit, a second order sigma delta modulator has been designed. This modulator has a sampling frequency of 1MHz and bandwidth of 6KHz. SNDR of 60dB is achieved with 1Vpp differential input signal and 3.3V supply
ContributorsKundur, Vinay (Author) / Bakkaloglu, Bertan (Committee member) / Ozev, Sule (Committee member) / Kiaei, Sayfe (Committee member) / Arizona State University (Publisher)
Created2013
Description
Aluminum alloys and their composites are attractive materials for applications requiring high strength-to-weight ratios and reasonable cost. Many of these applications, such as those in the aerospace industry, undergo fatigue loading. An understanding of the microstructural damage that occurs in these materials is critical in assessing their fatigue resistance. Two distinct experimental studies were performed to further the understanding of fatigue damage mechanisms in aluminum alloys and their composites, specifically fracture and plasticity. Fatigue resistance of metal matrix composites (MMCs) depends on many aspects of composite microstructure. Fatigue crack growth behavior is particularly dependent on the reinforcement characteristics and matrix microstructure. The goal of this work was to obtain a fundamental understanding of fatigue crack growth behavior in SiC particle-reinforced 2080 Al alloy composites. In situ X-ray synchrotron tomography was performed on two samples at low (R=0.1) and at high (R=0.6) R-ratios. The resulting reconstructed images were used to obtain three-dimensional (3D) rendering of the particles and fatigue crack. Behaviors of the particles and crack, as well as their interaction, were analyzed and quantified. Four-dimensional (4D) visual representations were constructed to aid in the overall understanding of damage evolution. During fatigue crack growth in ductile materials, a plastic zone is created in the region surrounding the crack tip. Knowledge of the plastic zone is important for the understanding of fatigue crack formation as well as subsequent growth behavior. The goal of this work was to quantify the 3D size and shape of the plastic zone in 7075 Al alloys. X-ray synchrotron tomography and Laue microdiffraction were used to non-destructively characterize the volume surrounding a fatigue crack tip. The precise 3D crack profile was segmented from the reconstructed tomography data. Depth-resolved Laue patterns were obtained using differential-aperture X-ray structural microscopy (DAXM), from which peak-broadening characteristics were quantified. Plasticity, as determined by the broadening of diffracted peaks, was mapped in 3D. Two-dimensional (2D) maps of plasticity were directly compared to the corresponding tomography slices. A 3D representation of the plastic zone surrounding the fatigue crack was generated by superimposing the mapped plasticity on the 3D crack profile.
ContributorsHruby, Peter (Author) / Chawla, Nikhilesh (Thesis advisor) / Solanki, Kiran (Committee member) / Liu, Yongming (Committee member) / Arizona State University (Publisher)
Created2014
Description
The design and development of analog/mixed-signal (AMS) integrated circuits (ICs) is becoming increasingly expensive, complex, and lengthy. Rapid prototyping and emulation of analog ICs will be significant in the design and testing of complex analog systems. A new approach, Programmable ANalog Device Array (PANDA) that maps any AMS design problem to a transistor-level programmable hardware, is proposed. This approach enables fast system level validation and a reduction in post-Silicon bugs, minimizing design risk and cost. The unique features of the approach include 1) transistor-level programmability that emulates each transistor behavior in an analog design, achieving very fine granularity of reconfiguration; 2) programmable switches that are treated as a design component during analog transistor emulating, and optimized with the reconfiguration matrix; 3) compensation of AC performance degradation through boosting the bias current. Based on these principles, a digitally controlled PANDA platform is designed at 45nm node that can map AMS modules across 22nm to 90nm technology nodes. A systematic emulation approach to map any analog transistor to 45nm PANDA cell is proposed, which achieves transistor level matching accuracy of less than 5% for ID and less than 10% for Rout and Gm. Circuit level analog metrics of a voltage-controlled oscillator (VCO) emulated by PANDA, match to those of the original designs in 22nm and 90nm nodes with less than a 5% error. Several other 90nm and 22nm analog blocks are successfully emulated by the 45nm PANDA platform, including a folded-cascode operational amplifier and a sample-and-hold module (S/H). Further capabilities of PANDA are demonstrated by the first full-chip silicon of PANDA which is implemented on 65nm process This system consists of a 24×25 cell array, reconfigurable interconnect and configuration memory. The voltage and current reference circuits, op amps and a VCO with a phase interpolation circuit are emulated by PANDA.
ContributorsSuh, Jounghyuk (Author) / Bakkaloglu, Bertan (Thesis advisor) / Cao, Yu (Committee member) / Ozev, Sule (Committee member) / Kozicki, Michael (Committee member) / Arizona State University (Publisher)
Created2013
Description
Mobile platforms are becoming highly heterogeneous by combining a powerful multiprocessor system-on-chip (MpSoC) with numerous resources including display, memory, power management IC (PMIC), battery and wireless modems into a compact package. Furthermore, the MpSoC itself is a heterogeneous resource that integrates many processing elements such as CPU cores, GPU, video, image, and audio processors. As a result, optimization approaches targeting mobile computing needs to consider the platform at various levels of granularity.
Platform energy consumption and responsiveness are two major considerations for mobile systems since they determine the battery life and user satisfaction, respectively. In this work, the models for power consumption, response time, and energy consumption of heterogeneous mobile platforms are presented. Then, these models are used to optimize the energy consumption of baseline platforms under power, response time, and temperature constraints with and without introducing new resources. It is shown, the optimal design choices depend on dynamic power management algorithm, and adding new resources is more energy efficient than scaling existing resources alone. The framework is verified through actual experiments on Qualcomm Snapdragon 800 based tablet MDP/T. Furthermore, usage of the framework at both design and runtime optimization is also presented.
Platform energy consumption and responsiveness are two major considerations for mobile systems since they determine the battery life and user satisfaction, respectively. In this work, the models for power consumption, response time, and energy consumption of heterogeneous mobile platforms are presented. Then, these models are used to optimize the energy consumption of baseline platforms under power, response time, and temperature constraints with and without introducing new resources. It is shown, the optimal design choices depend on dynamic power management algorithm, and adding new resources is more energy efficient than scaling existing resources alone. The framework is verified through actual experiments on Qualcomm Snapdragon 800 based tablet MDP/T. Furthermore, usage of the framework at both design and runtime optimization is also presented.
ContributorsGupta, Ujjwala (Author) / Ogras, Umit Y. (Thesis advisor) / Ozev, Sule (Committee member) / Chakrabarti, Chaitali (Committee member) / Arizona State University (Publisher)
Created2014
Description
High speed current-steering DACs with high linearity are needed in today's applications such as wired and wireless communications, instrumentation, radar, and other direct digital synthesis (DDS) applications. However, a trade-off exists between the speed and resolution of Nyquist rate current-steering DACs. As the resolution increases, more transistor area is required to meet matching requirements for optimal linearity and thus, the overall speed of the DAC is limited.
In this thesis work, a 12-bit current-steering DAC was designed with current sources scaled below the required matching size to decrease the area and increase the overall speed of the DAC. By scaling the current sources, however, errors due to random mismatch between current sources will arise and additional calibration hardware is necessary to ensure 12-bit linearity. This work presents how to implement a self-calibration DAC that works to fix amplitude errors while maintaining a lower overall area. Additionally, the DAC designed in this thesis investigates the implementation feasibility of a data-interleaved architecture. Data interleaving can increase the total bandwidth of the DACs by 2 with an increase in SQNR by an additional 3 dB.
The final results show that the calibration method can effectively improve the linearity of the DAC. The DAC is able to run up to 400 MSPS frequencies with a 75 dB SFDR performance and above 87 dB SFDR performance at update rates of 200 MSPS.
In this thesis work, a 12-bit current-steering DAC was designed with current sources scaled below the required matching size to decrease the area and increase the overall speed of the DAC. By scaling the current sources, however, errors due to random mismatch between current sources will arise and additional calibration hardware is necessary to ensure 12-bit linearity. This work presents how to implement a self-calibration DAC that works to fix amplitude errors while maintaining a lower overall area. Additionally, the DAC designed in this thesis investigates the implementation feasibility of a data-interleaved architecture. Data interleaving can increase the total bandwidth of the DACs by 2 with an increase in SQNR by an additional 3 dB.
The final results show that the calibration method can effectively improve the linearity of the DAC. The DAC is able to run up to 400 MSPS frequencies with a 75 dB SFDR performance and above 87 dB SFDR performance at update rates of 200 MSPS.
ContributorsJankunas, Benjamin (Author) / Bakkaloglu, Bertan (Thesis advisor) / Kitchen, Jennifer (Committee member) / Ozev, Sule (Committee member) / Arizona State University (Publisher)
Created2014
Description
Fission products in nuclear fuel pellets can affect fuel performance as they change the fuel chemistry and structure. The behavior of the fission products and their release mechanisms are important to the operation of a power reactor. Research has shown that fission product release can occur through grain boundary (GB) at low burnups. Early fission gas release models, which assumed spherical grains with no effect of GB diffusion, did not capture the early stage of the release behavior well. In order to understand the phenomenon at low burnup and how it leads to the later release mechanism, a microstructurally explicit model is needed. This dissertation conducted finite element simulations of the transport behavior using 3-D microstructurally explicit models. It looks into the effects of GB character, with emphases on conditions that can lead to enhanced effective diffusion. Moreover, the relationship between temperature and fission product transport is coupled to reflect the high temperature environment.
The modeling work began with 3-D microstructure reconstruction for three uranium oxide samples with different oxygen stoichiometry: UO2.00 UO2.06 and UO2.14. The 3-D models were created based on the real microstructure of depleted UO2 samples characterized by Electron Backscattering Diffraction (EBSD) combined with serial sectioning. Mathematical equations on fission gas diffusion and heat conduction were studied and derived to simulate the fission gas transport under GB effect. Verification models showed that 2-D elements can be used to model GBs to reduce the number of elements. The effect of each variable, including fuel stoichiometry, temperature, GB diffusion, triple junction diffusion and GB thermal resistance, is verified, and they are coupled in multi-physics simulations to study the transport of fission gas at different radial location of a fuel pellet. It was demonstrated that the microstructural model can be used to incorporate the effect of different physics to study fission gas transport. The results suggested that the GB effect is the most significant at the edge of fuel pellet where the temperature is the lowest. In the high temperature region, the increase in bulk diffusivity due to excess oxygen diminished the effect of GB diffusion.
The modeling work began with 3-D microstructure reconstruction for three uranium oxide samples with different oxygen stoichiometry: UO2.00 UO2.06 and UO2.14. The 3-D models were created based on the real microstructure of depleted UO2 samples characterized by Electron Backscattering Diffraction (EBSD) combined with serial sectioning. Mathematical equations on fission gas diffusion and heat conduction were studied and derived to simulate the fission gas transport under GB effect. Verification models showed that 2-D elements can be used to model GBs to reduce the number of elements. The effect of each variable, including fuel stoichiometry, temperature, GB diffusion, triple junction diffusion and GB thermal resistance, is verified, and they are coupled in multi-physics simulations to study the transport of fission gas at different radial location of a fuel pellet. It was demonstrated that the microstructural model can be used to incorporate the effect of different physics to study fission gas transport. The results suggested that the GB effect is the most significant at the edge of fuel pellet where the temperature is the lowest. In the high temperature region, the increase in bulk diffusivity due to excess oxygen diminished the effect of GB diffusion.
ContributorsLim, Harn Chyi (Author) / Peralta, Pedro (Thesis advisor) / Jiang, Hanqing (Committee member) / Solanki, Kiran (Committee member) / Arizona State University (Publisher)
Created2014
Description
The United States Department of Energy (DOE) has always held the safety and reliability of the nation's nuclear reactor fleet as a top priority. Continual improvements and advancements in nuclear fuels have been instrumental in maximizing energy generation from nuclear power plants and minimizing waste. One aspect of the DOE Fuel Cycle Research and Development Advanced Fuels Campaign is to improve the mechanical properties of uranium dioxide (UO2) for nuclear fuel applications.
In an effort to improve the performance of UO2, by increasing the fracture toughness and ductility, small quantities of oxide materials have been added to samples to act as dopants. The different dopants used in this study are: titanium dioxide, yttrium oxide, aluminum oxide, silicon dioxide, and chromium oxide. The effects of the individual dopants and some dopant combinations on the microstructure and mechanical properties are determined using indentation fracture experiments in tandem with scanning electron microscopy. Indentation fracture experiments are carried out at room temperature and at temperatures between 450 °C and 1160 °C.
The results of this work find that doping with aluminosilicate produces the largest favorable change in the mechanical properties of UO2. This sample exhibits an increase in fracture toughness at room temperature without showing a change in yield strength at elevated temperatures. The results also show that doping with Al2O3 and TiO2 produce stronger samples and it is hypothesized that this is a result of the sample containing dopant-rich secondary phase particles.
In an effort to improve the performance of UO2, by increasing the fracture toughness and ductility, small quantities of oxide materials have been added to samples to act as dopants. The different dopants used in this study are: titanium dioxide, yttrium oxide, aluminum oxide, silicon dioxide, and chromium oxide. The effects of the individual dopants and some dopant combinations on the microstructure and mechanical properties are determined using indentation fracture experiments in tandem with scanning electron microscopy. Indentation fracture experiments are carried out at room temperature and at temperatures between 450 °C and 1160 °C.
The results of this work find that doping with aluminosilicate produces the largest favorable change in the mechanical properties of UO2. This sample exhibits an increase in fracture toughness at room temperature without showing a change in yield strength at elevated temperatures. The results also show that doping with Al2O3 and TiO2 produce stronger samples and it is hypothesized that this is a result of the sample containing dopant-rich secondary phase particles.
ContributorsMcDonald, Robert (Author) / Peralta, Pedro (Thesis advisor) / Rajagopalan, Jagannathan (Committee member) / Solanki, Kiran (Committee member) / Arizona State University (Publisher)
Created2014
Description
Current sensing ability is one of the most desirable features of contemporary current or voltage mode controlled DC-DC converters. Current sensing can be used for over load protection, multi-stage converter load balancing, current-mode control, multi-phase converter current-sharing, load independent control, power efficiency improvement etc. There are handful existing approaches for current sensing such as external resistor sensing, triode mode current mirroring, observer sensing, Hall-Effect sensors, transformers, DC Resistance (DCR) sensing, Gm-C filter sensing etc. However, each method has one or more issues that prevent them from being successfully applied in DC-DC converter, e.g. low accuracy, discontinuous sensing nature, high sensitivity to switching noise, high cost, requirement of known external power filter components, bulky size, etc. In this dissertation, an offset-independent inductor Built-In Self Test (BIST) architecture is proposed which is able to measure the inductor inductance and DCR. The measured DCR enables the proposed continuous, lossless, average current sensing scheme. A digital Voltage Mode Control (VMC) DC-DC buck converter with the inductor BIST and current sensing architecture is designed, fabricated, and experimentally tested. The average measurement errors for inductance, DCR and current sensing are 2.1%, 3.6%, and 1.5% respectively. For the 3.5mm by 3.5mm die area, inductor BIST and current sensing circuits including related pins only consume 5.2% of the die area. BIST mode draws 40mA current for a maximum time period of 200us upon start-up and the continuous current sensing consumes about 400uA quiescent current. This buck converter utilizes an adaptive compensator. It could update compensator internally so that the overall system has a proper loop response for large range inductance and load current. Next, a digital Average Current Mode Control (ACMC) DC-DC buck converter with the proposed average current sensing circuits is designed and tested. To reduce chip area and power consumption, a 9 bits hybrid Digital Pulse Width Modulator (DPWM) which uses a Mixed-mode DLL (MDLL) is also proposed. The DC-DC converter has a maximum of 12V input, 1-11 V output range, and a maximum of 3W output power. The maximum error of one least significant bit (LSB) delay of the proposed DPWM is less than 1%.
ContributorsLiu, Tao (Author) / Bakkaloglu, Bertan (Thesis advisor) / Ozev, Sule (Committee member) / Vermeire, Bert (Committee member) / Cao, Yu (Committee member) / Arizona State University (Publisher)
Created2011
Description
Pulse Density Modulation- (PDM-) based class-D amplifiers can reduce non-linearity and tonal content due to carrier signal in Pulse Width Modulation - (PWM-) based amplifiers. However, their low-voltage analog implementations also require a linear- loop filter and a quantizer. A PDM-based class-D audio amplifier using a frequency-domain quantization is presented in this paper. The digital-intensive frequency domain approach achieves high linearity under low-supply regimes. An analog comparator and a single-bit quantizer are replaced with a Current-Controlled Oscillator- (ICO-) based frequency discriminator. By using the ICO as a phase integrator, a third-order noise shaping is achieved using only two analog integrators. A single-loop, singlebit class-D audio amplifier is presented with an H-bridge switching power stage, which is designed and fabricated on a 0.18 um CMOS process, with 6 layers of metal achieving a total harmonic distortion plus noise (THD+N) of 0.065% and a peak power efficiency of 80% while driving a 4-ohms loudspeaker load. The amplifier can deliver the output power of 280 mW.
ContributorsLee, Junghan (Author) / Bakkaloglu, Bertan (Thesis advisor) / Kiaei, Sayfe (Committee member) / Ozev, Sule (Committee member) / Song, Hongjiang (Committee member) / Arizona State University (Publisher)
Created2011