ASU Electronic Theses and Dissertations
This collection includes most of the ASU Theses and Dissertations from 2011 to present. ASU Theses and Dissertations are available in downloadable PDF format; however, a small percentage of items are under embargo. Information about the dissertations/theses includes degree information, committee members, an abstract, supporting data or media.
In addition to the electronic theses found in the ASU Digital Repository, ASU Theses and Dissertations can be found in the ASU Library Catalog.
Dissertations and Theses granted by Arizona State University are archived and made available through a joint effort of the ASU Graduate College and the ASU Libraries. For more information or questions about this collection contact or visit the Digital Repository ETD Library Guide or contact the ASU Graduate College at gradformat@asu.edu.
Displaying 1 - 10 of 92
Description
Wind measurements are fundamental inputs for the evaluation of potential energy yield and performance of wind farms. Three-dimensional scanning coherent Doppler lidar (CDL) may provide a new basis for wind farm site selection, design, and control. In this research, CDL measurements obtained from multiple wind energy developments are analyzed and a novel wind farm control approach has been modeled. The possibility of using lidar measurements to more fully characterize the wind field is discussed, specifically, terrain effects, spatial variation of winds, power density, and the effect of shear at different layers within the rotor swept area. Various vector retrieval methods have been applied to the lidar data, and results are presented on an elevated terrain-following surface at hub height. The vector retrieval estimates are compared with tower measurements, after interpolation to the appropriate level. CDL data is used to estimate the spatial power density at hub height. Since CDL can measure winds at different vertical levels, an approach for estimating wind power density over the wind turbine rotor-swept area is explored. Sample optimized layouts of wind farm using lidar data and global optimization algorithms, accounting for wake interaction effects, have been explored. An approach to evaluate spatial wind speed and direction estimates from a standard nested Coupled Ocean and Atmosphere Mesoscale Prediction System (COAMPS) model and CDL is presented. The magnitude of spatial difference between observations and simulation for wind energy assessment is researched. Diurnal effects and ramp events as estimated by CDL and COAMPS were inter-compared. Novel wind farm control based on incoming winds and direction input from CDL's is developed. Both yaw and pitch control using scanning CDL for efficient wind farm control is analyzed. The wind farm control optimizes power production and reduces loads on wind turbines for various lidar wind speed and direction inputs, accounting for wind farm wake losses and wind speed evolution. Several wind farm control configurations were developed, for enhanced integrability into the electrical grid. Finally, the value proposition of CDL for a wind farm development, based on uncertainty reduction and return of investment is analyzed.
ContributorsKrishnamurthy, Raghavendra (Author) / Calhoun, Ronald J (Thesis advisor) / Chen, Kangping (Committee member) / Huang, Huei-Ping (Committee member) / Fraser, Matthew (Committee member) / Phelan, Patrick (Committee member) / Arizona State University (Publisher)
Created2013
Description
Micro Electro Mechanical Systems (MEMS) is one of the fastest growing field in silicon industry. Low cost production is key for any company to improve their market share. MEMS testing is challenging since input to test a MEMS device require physical stimulus like acceleration, pressure etc. Also, MEMS device vary with process and requires calibration to make them reliable. This increases test cost and testing time. This challenge can be overcome by combining electrical stimulus based testing along with statistical analysis on MEMS response for electrical stimulus and also limited physical stimulus response data. This thesis proposes electrical stimulus based built in self test(BIST) which can be used to get MEMS data and later this data can be used for statistical analysis. A capacitive MEMS accelerometer is considered to test this BIST approach. This BIST circuit overhead is less and utilizes most of the standard readout circuit. This thesis discusses accelerometer response for electrical stimulus and BIST architecture. As a part of this BIST circuit, a second order sigma delta modulator has been designed. This modulator has a sampling frequency of 1MHz and bandwidth of 6KHz. SNDR of 60dB is achieved with 1Vpp differential input signal and 3.3V supply
ContributorsKundur, Vinay (Author) / Bakkaloglu, Bertan (Committee member) / Ozev, Sule (Committee member) / Kiaei, Sayfe (Committee member) / Arizona State University (Publisher)
Created2013
Description
This thesis outlines the development of a vector retrieval technique, based on data assimilation, for a coherent Doppler LIDAR (Light Detection and Ranging). A detailed analysis of the Optimal Interpolation (OI) technique for vector retrieval is presented. Through several modifications to the OI technique, it is shown that the modified technique results in significant improvement in velocity retrieval accuracy. These modifications include changes to innovation covariance portioning, covariance binning, and analysis increment calculation. It is observed that the modified technique is able to make retrievals with better accuracy, preserves local information better, and compares well with tower measurements. In order to study the error of representativeness and vector retrieval error, a lidar simulator was constructed. Using the lidar simulator a thorough sensitivity analysis of the lidar measurement process and vector retrieval is carried out. The error of representativeness as a function of scales of motion and sensitivity of vector retrieval to look angle is quantified. Using the modified OI technique, study of nocturnal flow in Owens' Valley, CA was carried out to identify and understand uncharacteristic events on the night of March 27th 2006. Observations from 1030 UTC to 1230 UTC (0230 hr local time to 0430 hr local time) on March 27 2006 are presented. Lidar observations show complex and uncharacteristic flows such as sudden bursts of westerly cross-valley wind mixing with the dominant up-valley wind. Model results from Coupled Ocean/Atmosphere Mesoscale Prediction System (COAMPS®) and other in-situ instrumentations are used to corroborate and complement these observations. The modified OI technique is used to identify uncharacteristic and extreme flow events at a wind development site. Estimates of turbulence and shear from this technique are compared to tower measurements. A formulation for equivalent wind speed in the presence of variations in wind speed and direction, combined with shear is developed and used to determine wind energy content in presence of turbulence.
ContributorsChoukulkar, Aditya (Author) / Calhoun, Ronald (Thesis advisor) / Mahalov, Alex (Committee member) / Kostelich, Eric (Committee member) / Huang, Huei-Ping (Committee member) / Phelan, Patrick (Committee member) / Arizona State University (Publisher)
Created2013
Description
The design and development of analog/mixed-signal (AMS) integrated circuits (ICs) is becoming increasingly expensive, complex, and lengthy. Rapid prototyping and emulation of analog ICs will be significant in the design and testing of complex analog systems. A new approach, Programmable ANalog Device Array (PANDA) that maps any AMS design problem to a transistor-level programmable hardware, is proposed. This approach enables fast system level validation and a reduction in post-Silicon bugs, minimizing design risk and cost. The unique features of the approach include 1) transistor-level programmability that emulates each transistor behavior in an analog design, achieving very fine granularity of reconfiguration; 2) programmable switches that are treated as a design component during analog transistor emulating, and optimized with the reconfiguration matrix; 3) compensation of AC performance degradation through boosting the bias current. Based on these principles, a digitally controlled PANDA platform is designed at 45nm node that can map AMS modules across 22nm to 90nm technology nodes. A systematic emulation approach to map any analog transistor to 45nm PANDA cell is proposed, which achieves transistor level matching accuracy of less than 5% for ID and less than 10% for Rout and Gm. Circuit level analog metrics of a voltage-controlled oscillator (VCO) emulated by PANDA, match to those of the original designs in 22nm and 90nm nodes with less than a 5% error. Several other 90nm and 22nm analog blocks are successfully emulated by the 45nm PANDA platform, including a folded-cascode operational amplifier and a sample-and-hold module (S/H). Further capabilities of PANDA are demonstrated by the first full-chip silicon of PANDA which is implemented on 65nm process This system consists of a 24×25 cell array, reconfigurable interconnect and configuration memory. The voltage and current reference circuits, op amps and a VCO with a phase interpolation circuit are emulated by PANDA.
ContributorsSuh, Jounghyuk (Author) / Bakkaloglu, Bertan (Thesis advisor) / Cao, Yu (Committee member) / Ozev, Sule (Committee member) / Kozicki, Michael (Committee member) / Arizona State University (Publisher)
Created2013
Description
Multi-touch tablets and smart phones are now widely used in both workplace and consumer settings. Interacting with these devices requires hand and arm movements that are potentially complex and poorly understood. Experimental studies have revealed differences in performance that could potentially be associated with injury risk. However, underlying causes for performance differences are often difficult to identify. For example, many patterns of muscle activity can potentially result in similar behavioral output. Muscle activity is one factor contributing to forces in tissues that could contribute to injury. However, experimental measurements of muscle activity and force for humans are extremely challenging. Models of the musculoskeletal system can be used to make specific estimates of neuromuscular coordination and musculoskeletal forces. However, existing models cannot easily be used to describe complex, multi-finger gestures such as those used for multi-touch human computer interaction (HCI) tasks. We therefore seek to develop a dynamic musculoskeletal simulation capable of estimating internal musculoskeletal loading during multi-touch tasks involving multi digits of the hand, and use the simulation to better understand complex multi-touch and gestural movements, and potentially guide the design of technologies the reduce injury risk. To accomplish these, we focused on three specific tasks. First, we aimed at determining the optimal index finger muscle attachment points within the context of the established, validated OpenSim arm model using measured moment arm data taken from the literature. Second, we aimed at deriving moment arm values from experimentally-measured muscle attachments and using these values to determine muscle-tendon paths for both extrinsic and intrinsic muscles of middle, ring and little fingers. Finally, we aimed at exploring differences in hand muscle activation patterns during zooming and rotating tasks on the tablet computer in twelve subjects. Towards this end, our musculoskeletal hand model will help better address the neuromuscular coordination, safe gesture performance and internal loadings for multi-touch applications.
ContributorsYi, Chong-hwan (Author) / Jindrich, Devin L. (Thesis advisor) / Artemiadis, Panagiotis K. (Thesis advisor) / Phelan, Patrick (Committee member) / Santos, Veronica J. (Committee member) / Huang, Huei-Ping (Committee member) / Arizona State University (Publisher)
Created2014
Description
Mobile platforms are becoming highly heterogeneous by combining a powerful multiprocessor system-on-chip (MpSoC) with numerous resources including display, memory, power management IC (PMIC), battery and wireless modems into a compact package. Furthermore, the MpSoC itself is a heterogeneous resource that integrates many processing elements such as CPU cores, GPU, video, image, and audio processors. As a result, optimization approaches targeting mobile computing needs to consider the platform at various levels of granularity.
Platform energy consumption and responsiveness are two major considerations for mobile systems since they determine the battery life and user satisfaction, respectively. In this work, the models for power consumption, response time, and energy consumption of heterogeneous mobile platforms are presented. Then, these models are used to optimize the energy consumption of baseline platforms under power, response time, and temperature constraints with and without introducing new resources. It is shown, the optimal design choices depend on dynamic power management algorithm, and adding new resources is more energy efficient than scaling existing resources alone. The framework is verified through actual experiments on Qualcomm Snapdragon 800 based tablet MDP/T. Furthermore, usage of the framework at both design and runtime optimization is also presented.
Platform energy consumption and responsiveness are two major considerations for mobile systems since they determine the battery life and user satisfaction, respectively. In this work, the models for power consumption, response time, and energy consumption of heterogeneous mobile platforms are presented. Then, these models are used to optimize the energy consumption of baseline platforms under power, response time, and temperature constraints with and without introducing new resources. It is shown, the optimal design choices depend on dynamic power management algorithm, and adding new resources is more energy efficient than scaling existing resources alone. The framework is verified through actual experiments on Qualcomm Snapdragon 800 based tablet MDP/T. Furthermore, usage of the framework at both design and runtime optimization is also presented.
ContributorsGupta, Ujjwala (Author) / Ogras, Umit Y. (Thesis advisor) / Ozev, Sule (Committee member) / Chakrabarti, Chaitali (Committee member) / Arizona State University (Publisher)
Created2014
Description
An eco-industrial park (EIP) is an industrial ecosystem in which a group of co-located firms are involved in collective resource optimization with each other and with the local community through physical exchanges of energy, water, materials, byproducts and services - referenced in the industrial ecology literature as "industrial symbiosis". EIPs, when compared with standard industrial resource sharing networks, prove to be of greater public advantage as they offer improved environmental and economic benefits, and higher operational efficiencies both upstream and downstream in their supply chain.
Although there have been many attempts to adapt EIP methodology to existing industrial sharing networks, most of them have failed for various factors: geographic restrictions by governmental organizations on use of technology, cost of technology, the inability of industries to effectively communicate their upstream and downstream resource usage, and to diminishing natural resources such as water, land and non-renewable energy (NRE) sources for energy production.
This paper presents a feasibility study conducted to evaluate the comparative environmental, economic, and geographic impacts arising from the use of renewable energy (RE) and NRE to power EIPs. Life Cycle Assessment (LCA) methodology, which is used in a variety of sectors to evaluate the environmental merits and demerits of different kinds of products and processes, was employed for comparison between these two energy production methods based on factors such as greenhouse gas emission, acidification potential, eutrophication potential, human toxicity potential, fresh water usage and land usage. To complement the environmental LCA analysis, levelized cost of electricity was used to evaluate the economic impact. This model was analyzed for two different geographic locations; United States and Europe, for 12 different energy production technologies.
The outcome of this study points out the environmental, economic and geographic superiority of one energy source over the other, including the total carbon dioxide equivalent emissions, which can then be related to the total number of carbon credits that can be earned or used to mitigate the overall carbon emission and move closer towards a net zero carbon footprint goal thus making the EIPs truly sustainable.
Although there have been many attempts to adapt EIP methodology to existing industrial sharing networks, most of them have failed for various factors: geographic restrictions by governmental organizations on use of technology, cost of technology, the inability of industries to effectively communicate their upstream and downstream resource usage, and to diminishing natural resources such as water, land and non-renewable energy (NRE) sources for energy production.
This paper presents a feasibility study conducted to evaluate the comparative environmental, economic, and geographic impacts arising from the use of renewable energy (RE) and NRE to power EIPs. Life Cycle Assessment (LCA) methodology, which is used in a variety of sectors to evaluate the environmental merits and demerits of different kinds of products and processes, was employed for comparison between these two energy production methods based on factors such as greenhouse gas emission, acidification potential, eutrophication potential, human toxicity potential, fresh water usage and land usage. To complement the environmental LCA analysis, levelized cost of electricity was used to evaluate the economic impact. This model was analyzed for two different geographic locations; United States and Europe, for 12 different energy production technologies.
The outcome of this study points out the environmental, economic and geographic superiority of one energy source over the other, including the total carbon dioxide equivalent emissions, which can then be related to the total number of carbon credits that can be earned or used to mitigate the overall carbon emission and move closer towards a net zero carbon footprint goal thus making the EIPs truly sustainable.
ContributorsGupta, Vaibhav (Author) / Calhoun, Ronald J (Thesis advisor) / Dooley, Kevin (Committee member) / Phelan, Patrick (Committee member) / Arizona State University (Publisher)
Created2014
Description
High speed current-steering DACs with high linearity are needed in today's applications such as wired and wireless communications, instrumentation, radar, and other direct digital synthesis (DDS) applications. However, a trade-off exists between the speed and resolution of Nyquist rate current-steering DACs. As the resolution increases, more transistor area is required to meet matching requirements for optimal linearity and thus, the overall speed of the DAC is limited.
In this thesis work, a 12-bit current-steering DAC was designed with current sources scaled below the required matching size to decrease the area and increase the overall speed of the DAC. By scaling the current sources, however, errors due to random mismatch between current sources will arise and additional calibration hardware is necessary to ensure 12-bit linearity. This work presents how to implement a self-calibration DAC that works to fix amplitude errors while maintaining a lower overall area. Additionally, the DAC designed in this thesis investigates the implementation feasibility of a data-interleaved architecture. Data interleaving can increase the total bandwidth of the DACs by 2 with an increase in SQNR by an additional 3 dB.
The final results show that the calibration method can effectively improve the linearity of the DAC. The DAC is able to run up to 400 MSPS frequencies with a 75 dB SFDR performance and above 87 dB SFDR performance at update rates of 200 MSPS.
In this thesis work, a 12-bit current-steering DAC was designed with current sources scaled below the required matching size to decrease the area and increase the overall speed of the DAC. By scaling the current sources, however, errors due to random mismatch between current sources will arise and additional calibration hardware is necessary to ensure 12-bit linearity. This work presents how to implement a self-calibration DAC that works to fix amplitude errors while maintaining a lower overall area. Additionally, the DAC designed in this thesis investigates the implementation feasibility of a data-interleaved architecture. Data interleaving can increase the total bandwidth of the DACs by 2 with an increase in SQNR by an additional 3 dB.
The final results show that the calibration method can effectively improve the linearity of the DAC. The DAC is able to run up to 400 MSPS frequencies with a 75 dB SFDR performance and above 87 dB SFDR performance at update rates of 200 MSPS.
ContributorsJankunas, Benjamin (Author) / Bakkaloglu, Bertan (Thesis advisor) / Kitchen, Jennifer (Committee member) / Ozev, Sule (Committee member) / Arizona State University (Publisher)
Created2014
Description
As one of the most promising materials for high capacity electrode in next generation of lithium ion batteries, silicon has attracted a great deal of attention in recent years. Advanced characterization techniques and atomic simulations helped to depict that the lithiation/delithiation of silicon electrode involves processes including large volume change (anisotropic for the initial lithiation of crystal silicon), plastic flow or softening of material dependent on composition, electrochemically driven phase transformation between solid states, anisotropic or isotropic migration of atomic sharp interface, and mass diffusion of lithium atoms. Motivated by the promising prospect of the application and underlying interesting physics, mechanics coupled with multi-physics of silicon electrodes in lithium ion batteries is studied in this dissertation. For silicon electrodes with large size, diffusion controlled kinetics is assumed, and the coupled large deformation and mass transportation is studied. For crystal silicon with small size, interface controlled kinetics is assumed, and anisotropic interface reaction is studied, with a geometry design principle proposed. As a preliminary experimental validation, enhanced lithiation and fracture behavior of silicon pillars via atomic layer coatings and geometry design is studied, with results supporting the geometry design principle we proposed based on our simulations. Through the work documented here, a consistent description and understanding of the behavior of silicon electrode is given at continuum level and some insights for the future development of the silicon electrode are provided.
ContributorsAn, Yonghao (Author) / Jiang, Hanqing (Thesis advisor) / Chawla, Nikhilesh (Committee member) / Phelan, Patrick (Committee member) / Wang, Yinming (Committee member) / Yu, Hongyu (Committee member) / Arizona State University (Publisher)
Created2014
Description
Current sensing ability is one of the most desirable features of contemporary current or voltage mode controlled DC-DC converters. Current sensing can be used for over load protection, multi-stage converter load balancing, current-mode control, multi-phase converter current-sharing, load independent control, power efficiency improvement etc. There are handful existing approaches for current sensing such as external resistor sensing, triode mode current mirroring, observer sensing, Hall-Effect sensors, transformers, DC Resistance (DCR) sensing, Gm-C filter sensing etc. However, each method has one or more issues that prevent them from being successfully applied in DC-DC converter, e.g. low accuracy, discontinuous sensing nature, high sensitivity to switching noise, high cost, requirement of known external power filter components, bulky size, etc. In this dissertation, an offset-independent inductor Built-In Self Test (BIST) architecture is proposed which is able to measure the inductor inductance and DCR. The measured DCR enables the proposed continuous, lossless, average current sensing scheme. A digital Voltage Mode Control (VMC) DC-DC buck converter with the inductor BIST and current sensing architecture is designed, fabricated, and experimentally tested. The average measurement errors for inductance, DCR and current sensing are 2.1%, 3.6%, and 1.5% respectively. For the 3.5mm by 3.5mm die area, inductor BIST and current sensing circuits including related pins only consume 5.2% of the die area. BIST mode draws 40mA current for a maximum time period of 200us upon start-up and the continuous current sensing consumes about 400uA quiescent current. This buck converter utilizes an adaptive compensator. It could update compensator internally so that the overall system has a proper loop response for large range inductance and load current. Next, a digital Average Current Mode Control (ACMC) DC-DC buck converter with the proposed average current sensing circuits is designed and tested. To reduce chip area and power consumption, a 9 bits hybrid Digital Pulse Width Modulator (DPWM) which uses a Mixed-mode DLL (MDLL) is also proposed. The DC-DC converter has a maximum of 12V input, 1-11 V output range, and a maximum of 3W output power. The maximum error of one least significant bit (LSB) delay of the proposed DPWM is less than 1%.
ContributorsLiu, Tao (Author) / Bakkaloglu, Bertan (Thesis advisor) / Ozev, Sule (Committee member) / Vermeire, Bert (Committee member) / Cao, Yu (Committee member) / Arizona State University (Publisher)
Created2011