ASU Electronic Theses and Dissertations
This collection includes most of the ASU Theses and Dissertations from 2011 to present. ASU Theses and Dissertations are available in downloadable PDF format; however, a small percentage of items are under embargo. Information about the dissertations/theses includes degree information, committee members, an abstract, supporting data or media.
In addition to the electronic theses found in the ASU Digital Repository, ASU Theses and Dissertations can be found in the ASU Library Catalog.
Dissertations and Theses granted by Arizona State University are archived and made available through a joint effort of the ASU Graduate College and the ASU Libraries. For more information or questions about this collection contact or visit the Digital Repository ETD Library Guide or contact the ASU Graduate College at gradformat@asu.edu.
Displaying 1 - 10 of 62
Description
Integrated photonics requires high gain optical materials in the telecom wavelength range for optical amplifiers and coherent light sources. Erbium (Er) containing materials are ideal candidates due to the 1.5 μm emission from Er3+ ions. However, the Er density in typical Er-doped materials is less than 1 x 1020 cm-3, thus limiting the maximum optical gain to a few dB/cm, too small to be useful for integrated photonics applications. Er compounds could potentially solve this problem since they contain much higher Er density. So far the existing Er compounds suffer from short lifetime and strong upconversion effects, mainly due to poor quality of crystals produced by various methods of thin film growth and deposition. This dissertation explores a new Er compound: erbium chloride silicate (ECS, Er3(SiO4)2Cl ) in the nanowire form, which facilitates the growth of high quality single crystals. Growth methods for such single crystal ECS nanowires have been established. Various structural and optical characterizations have been carried out. The high crystal quality of ECS material leads to a long lifetime of the first excited state of Er3+ ions up to 1 ms at Er density higher than 1022 cm-3. This Er lifetime-density product was found to be the largest among all Er containing materials. A unique integrating sphere method was developed to measure the absorption cross section of ECS nanowires from 440 to 1580 nm. Pump-probe experiments demonstrated a 644 dB/cm signal enhancement from a single ECS wire. It was estimated that such large signal enhancement can overcome the absorption to result in a net material gain, but not sufficient to compensate waveguide propagation loss. In order to suppress the upconversion process in ECS, Ytterbium (Yb) and Yttrium (Y) ions are introduced as substituent ions of Er in the ECS crystal structure to reduce Er density. While the addition of Yb ions only partially succeeded, erbium yttrium chloride silicate (EYCS) with controllable Er density was synthesized successfully. EYCS with 30 at. % Er was found to be the best. It shows the strongest PL emission at 1.5 μm, and thus can be potentially used as a high gain material.
ContributorsYin, Leijun (Author) / Ning, Cun-Zheng (Thesis advisor) / Chamberlin, Ralph (Committee member) / Yu, Hongbin (Committee member) / Menéndez, Jose (Committee member) / Ponce, Fernando (Committee member) / Arizona State University (Publisher)
Created2013
Description
Micro Electro Mechanical Systems (MEMS) is one of the fastest growing field in silicon industry. Low cost production is key for any company to improve their market share. MEMS testing is challenging since input to test a MEMS device require physical stimulus like acceleration, pressure etc. Also, MEMS device vary with process and requires calibration to make them reliable. This increases test cost and testing time. This challenge can be overcome by combining electrical stimulus based testing along with statistical analysis on MEMS response for electrical stimulus and also limited physical stimulus response data. This thesis proposes electrical stimulus based built in self test(BIST) which can be used to get MEMS data and later this data can be used for statistical analysis. A capacitive MEMS accelerometer is considered to test this BIST approach. This BIST circuit overhead is less and utilizes most of the standard readout circuit. This thesis discusses accelerometer response for electrical stimulus and BIST architecture. As a part of this BIST circuit, a second order sigma delta modulator has been designed. This modulator has a sampling frequency of 1MHz and bandwidth of 6KHz. SNDR of 60dB is achieved with 1Vpp differential input signal and 3.3V supply
ContributorsKundur, Vinay (Author) / Bakkaloglu, Bertan (Committee member) / Ozev, Sule (Committee member) / Kiaei, Sayfe (Committee member) / Arizona State University (Publisher)
Created2013
Description
In this dissertation, remote plasma interactions with the surfaces of low-k interlayer dielectric (ILD), Cu and Cu adhesion layers are investigated. The first part of the study focuses on the simultaneous plasma treatment of ILD and chemical mechanical polishing (CMP) Cu surfaces using N2/H2 plasma processes. H atoms and radicals in the plasma react with the carbon groups leading to carbon removal for the ILD films. Results indicate that an N2 plasma forms an amide-like layer on the surface which apparently leads to reduced carbon abstraction from an H2 plasma process. In addition, FTIR spectra indicate the formation of hydroxyl (Si-OH) groups following the plasma exposure. Increased temperature (380 °C) processing leads to a reduction of the hydroxyl group formation compared to ambient temperature processes, resulting in reduced changes of the dielectric constant. For CMP Cu surfaces, the carbonate contamination was removed by an H2 plasma process at elevated temperature while the C-C and C-H contamination was removed by an N2 plasma process at elevated temperature. The second part of this study examined oxide stability and cleaning of Ru surfaces as well as consequent Cu film thermal stability with the Ru layers. The ~2 monolayer native Ru oxide was reduced after H-plasma processing. The thermal stability or islanding of the Cu film on the Ru substrate was characterized by in-situ XPS. After plasma cleaning of the Ru adhesion layer, the deposited Cu exhibited full coverage. In contrast, for Cu deposition on the Ru native oxide substrate, Cu islanding was detected and was described in terms of grain boundary grooving and surface and interface energies. The thermal stability of 7 nm Ti, Pt and Ru ii interfacial adhesion layers between a Cu film (10 nm) and a Ta barrier layer (4 nm) have been investigated in the third part. The barrier properties and interfacial stability have been evaluated by Rutherford backscattering spectrometry (RBS). Atomic force microscopy (AFM) was used to measure the surfaces before and after annealing, and all the surfaces are relatively smooth excluding islanding or de-wetting phenomena as a cause of the instability. The RBS showed no discernible diffusion across the adhesion layer/Ta and Ta/Si interfaces which provides a stable underlying layer. For a Ti interfacial layer RBS indicates that during 400 °C annealing Ti interdiffuses through the Cu film and accumulates at the surface. For the Pt/Cu system Pt interdiffuion is detected which is less evident than Ti. Among the three adhesion layer candidates, Ru shows negligible diffusion into the Cu film indicating thermal stability at 400 °C.
ContributorsLiu, Xin (Author) / Nemanich, Robert (Thesis advisor) / Chamberlin, Ralph (Committee member) / Chen, Tingyong (Committee member) / Smith, David (Committee member) / Ponce, Fernando (Committee member) / Arizona State University (Publisher)
Created2012
Description
In this dissertation, the interface chemistry and electronic structure of plasma-enhanced atomic layer deposited (PEALD) dielectrics on GaN are investigated with x-ray and ultraviolet photoemission spectroscopy (XPS and UPS). Three interrelated issues are discussed in this study: (1) PEALD dielectric growth process optimization, (2) interface electronic structure of comparative PEALD dielectrics on GaN, and (3) interface electronic structure of PEALD dielectrics on Ga- and N-face GaN. The first study involved an in-depth case study of PEALD Al2O3 growth using dimethylaluminum isopropoxide, with a special focus on oxygen plasma effects. Saturated and self-limiting growth of Al2O3 films were obtained with an enhanced growth rate within the PEALD temperature window (25-220 ºC). The properties of Al2O3 deposited at various temperatures were characterized to better understand the relation between the growth parameters and film properties. In the second study, the interface electronic structures of PEALD dielectrics on Ga-face GaN films were measured. Five promising dielectrics (Al2O3, HfO2, SiO2, La2O3, and ZnO) with a range of band gap energies were chosen. Prior to dielectric growth, a combined wet chemical and in-situ H2/N2 plasma clean process was employed to remove the carbon contamination and prepare the surface for dielectric deposition. The surface band bending and band offsets were measured by XPS and UPS for dielectrics on GaN. The trends of the experimental band offsets on GaN were related to the dielectric band gap energies. In addition, the experimental band offsets were near the calculated values based on the charge neutrality level model. The third study focused on the effect of the polarization bound charge of the Ga- and N-face GaN on interface electronic structures. A surface pretreatment process consisting of a NH4OH wet chemical and an in-situ NH3 plasma treatment was applied to remove carbon contamination, retain monolayer oxygen coverage, and potentially passivate N-vacancy related defects. The surface band bending and polarization charge compensation of Ga- and N-face GaN were investigated. The surface band bending and band offsets were determined for Al2O3, HfO2, and SiO2 on Ga- and N-face GaN. Different dielectric thicknesses and post deposition processing were investigated to understand process related defect formation and/or reduction.
ContributorsYang, Jialing (Author) / Nemanich, Robert J (Thesis advisor) / Chen, Tingyong (Committee member) / Peng, Xihong (Committee member) / Ponce, Fernando (Committee member) / Smith, David (Committee member) / Arizona State University (Publisher)
Created2014
Description
The design and development of analog/mixed-signal (AMS) integrated circuits (ICs) is becoming increasingly expensive, complex, and lengthy. Rapid prototyping and emulation of analog ICs will be significant in the design and testing of complex analog systems. A new approach, Programmable ANalog Device Array (PANDA) that maps any AMS design problem to a transistor-level programmable hardware, is proposed. This approach enables fast system level validation and a reduction in post-Silicon bugs, minimizing design risk and cost. The unique features of the approach include 1) transistor-level programmability that emulates each transistor behavior in an analog design, achieving very fine granularity of reconfiguration; 2) programmable switches that are treated as a design component during analog transistor emulating, and optimized with the reconfiguration matrix; 3) compensation of AC performance degradation through boosting the bias current. Based on these principles, a digitally controlled PANDA platform is designed at 45nm node that can map AMS modules across 22nm to 90nm technology nodes. A systematic emulation approach to map any analog transistor to 45nm PANDA cell is proposed, which achieves transistor level matching accuracy of less than 5% for ID and less than 10% for Rout and Gm. Circuit level analog metrics of a voltage-controlled oscillator (VCO) emulated by PANDA, match to those of the original designs in 22nm and 90nm nodes with less than a 5% error. Several other 90nm and 22nm analog blocks are successfully emulated by the 45nm PANDA platform, including a folded-cascode operational amplifier and a sample-and-hold module (S/H). Further capabilities of PANDA are demonstrated by the first full-chip silicon of PANDA which is implemented on 65nm process This system consists of a 24×25 cell array, reconfigurable interconnect and configuration memory. The voltage and current reference circuits, op amps and a VCO with a phase interpolation circuit are emulated by PANDA.
ContributorsSuh, Jounghyuk (Author) / Bakkaloglu, Bertan (Thesis advisor) / Cao, Yu (Committee member) / Ozev, Sule (Committee member) / Kozicki, Michael (Committee member) / Arizona State University (Publisher)
Created2013
Description
In this dissertation, combined photo-induced and thermionic electron emission from low work function diamond films is studied through low energy electron spectroscopy analysis and other associated techniques. Nitrogen-doped, hydrogen-terminated diamond films prepared by the microwave plasma chemical vapor deposition method have been the most focused material. The theme of this research is represented by four interrelated issues. (1) An in-depth study describes combined photo-induced and thermionic emission from nitrogen-doped diamond films on molybdenum substrates, which were illuminated with visible light photons, and the electron emission spectra were recorded as a function of temperature. The diamond films displayed significant emissivity with a low work function of ~ 1.5 eV. The results indicate that these diamond emitters can be applied in combined solar and thermal energy conversion. (2) The nitrogen-doped diamond was further investigated to understand the physical mechanism and material-related properties that enable the combined electron emission. Through analysis of the spectroscopy, optical absorbance and photoelectron microscopy results from sample sets prepared with different configurations, it was deduced that the photo-induced electron generation involves both the ultra-nanocrystalline diamond and the interface between the diamond film and metal substrate. (3) Based on results from the first two studies, possible photon-enhanced thermionic emission was examined from nitrogen-doped diamond films deposited on silicon substrates, which could provide the basis for a novel approach for concentrated solar energy conversion. A significant increase of emission intensity was observed at elevated temperatures, which was analyzed using computer-based modeling and a combination of different emission mechanisms. (4) In addition, the electronic structure of vanadium-oxide-terminated diamond surfaces was studied through in-situ photoemission spectroscopy. Thin layers of vanadium were deposited on oxygen-terminated diamond surfaces which led to oxide formation. After thermal annealing, a negative electron affinity was found on boron-doped diamond, while a positive electron affinity was found on nitrogen-doped diamond. A model based on the barrier at the diamond-oxide interface was employed to analyze the results. Based on results of this dissertation, applications of diamond-based energy conversion devices for combined solar- and thermal energy conversion are proposed.
ContributorsSun, Tianyin (Author) / Nemanich, Robert (Thesis advisor) / Ponce, Fernando (Committee member) / Peng, Xihong (Committee member) / Spence, John (Committee member) / Treacy, Michael (Committee member) / Arizona State University (Publisher)
Created2013
Description
This thesis describes the fabrication of several new classes of Ge1-x-ySixSny materials with the required compositions and crystal quality to engineer the band gaps above and below that of elemental Ge (0.8 eV) in the near IR. The work initially focused on Ge1-x-ySixSny (1-5% Sn, 4-20% Si) materials grown on Ge(100) via gas-source epitaxy of Ge4H10, Si4H10 and SnD4. Both intrinsic and doped layers were produced with defect-free microstructure and viable thickness, allowing the fabrication of high-performance photodetectors. These exhibited low ideality factors, state-of-the-art dark current densities and adjustable absorption edges between 0.87 and 1.03 eV, indicating that the band gaps span a significant range above that of Ge. Next Sn-rich Ge1-x-ySixSny alloys (2-4% Si and 4-10% Sn) were fabricated directly on Si and were found to show significant optical emission using photoluminescence measurements, indicating that the alloys have direct band gaps below that of pure Ge in the range of 0.7-0.55 eV. A series of Sn-rich Ge1-x-ySixSny analogues (y>x) with fixed 3-4% Si content and progressively increasing Sn content in the 4-10% range were then grown on Ge buffered Si platforms for the purpose of improving the material's crystal quality. The films in this case exhibited lower defect densities than those grown on Si, allowing a meaningful study of both the direct and indirect gaps. The results show that the separation of the direct and indirect edges can be made smaller than in Ge even for non-negligible 3-4% Si content, confirming that with a suitable choice of Sn compositions the ternary Ge1-x-ySixSny reproduces all features of the electronic structure of binary Ge1-ySny, including the sought-after indirect-to-direct gap cross over. The above synthesis of optical quality Ge1-x-ySixSny on virtual Ge was made possible by the development of high quality Ge-on-Si buffers via chemical vapor deposition of Ge4H10. The resultant films exhibited structural and electrical properties significantly improved relative to state-of-the-art results obtained using conventional approaches. It was found that pure Ge4H10 facilitates the control of residual doping and enables p-i-n devices whose dark currents are not entirely determined by defects and whose zero-bias collection efficiencies are higher than those obtained from samples fabricated using alternative Ge-on-Si approaches.
ContributorsXu, Chi (Author) / Kouvetakis, John (Thesis advisor) / Menéndez, Jose (Thesis advisor) / Chizmeshya, Andrew (Committee member) / Drucker, Jeffrey (Committee member) / Ponce, Fernando (Committee member) / Arizona State University (Publisher)
Created2013
Description
The initial microstructure of oxide fuel pellets can play a key role in their performance. At low burnups, the transport of fission products has a strong dependence on oxygen content, grain size distribution, porosity and grain boundary (GB) characteristics (crystallography, geometry and topology), all of which, in turn depend on processing conditions. These microstructural features can also affect the fuel densification, thermal conductivity and microstructure evolution inside the reactor. Understanding these effects can provide insight into microstructure evolution of fuels in-pile. In this work, mechanical and ion beam serial sectioning techniques were developed to obtain Electron Backscatter Diffraction (EBSD) data, both in 2-D and 3-D, for depleted UO2+X pellets manufactured under different conditions. The EBSD maps were used to relate processing conditions to microstructural features, with emphasis on special GBs according to the Coincident Site Lattice (CSL) model, as well as correlations between pore size and location in the microstructure. Furthermore, larger grains (at least 2.5 times the average grain size) were observed in all the samples and studied. Results indicate that larger grains, in samples manufactured under different conditions, dominate the overall crystallographic texture and have a fairly strong GB texture. Moreover, it seems that the preferential misorientation axis for these GBs, regardless of the O/M, is {001}. These results might be related to GB energy and structure and, suggest that the mechanism that controls grain growth seems to be independent of both processing conditions and stoichiometry. Additionally, a sample was heat treated to relate grain growth and crystallography. The results indicate that at least two mechanisms were involved. Lengthening of GBs was observed for larger grains. Another mechanism of grain growth was observed, in this case, grains rotate to match a neighboring grain forming a larger grain. In the new grain, the misorientation between the two neighboring grains decreases to less than 5 degrees, forming a new larger grain. The results presented in this work indicate that detailed studies of the initial microstructure of the fuel, with emphasis on the crystallography of grains and GBs could help to give insights on the in-pile microstructural evolution of the fuel.
ContributorsRudman Prieto, Karin (Author) / Peralta, Pedro (Thesis advisor) / Ponce, Fernando (Committee member) / Sieradski, Karl (Committee member) / Arizona State University (Publisher)
Created2014
Description
Mobile platforms are becoming highly heterogeneous by combining a powerful multiprocessor system-on-chip (MpSoC) with numerous resources including display, memory, power management IC (PMIC), battery and wireless modems into a compact package. Furthermore, the MpSoC itself is a heterogeneous resource that integrates many processing elements such as CPU cores, GPU, video, image, and audio processors. As a result, optimization approaches targeting mobile computing needs to consider the platform at various levels of granularity.
Platform energy consumption and responsiveness are two major considerations for mobile systems since they determine the battery life and user satisfaction, respectively. In this work, the models for power consumption, response time, and energy consumption of heterogeneous mobile platforms are presented. Then, these models are used to optimize the energy consumption of baseline platforms under power, response time, and temperature constraints with and without introducing new resources. It is shown, the optimal design choices depend on dynamic power management algorithm, and adding new resources is more energy efficient than scaling existing resources alone. The framework is verified through actual experiments on Qualcomm Snapdragon 800 based tablet MDP/T. Furthermore, usage of the framework at both design and runtime optimization is also presented.
Platform energy consumption and responsiveness are two major considerations for mobile systems since they determine the battery life and user satisfaction, respectively. In this work, the models for power consumption, response time, and energy consumption of heterogeneous mobile platforms are presented. Then, these models are used to optimize the energy consumption of baseline platforms under power, response time, and temperature constraints with and without introducing new resources. It is shown, the optimal design choices depend on dynamic power management algorithm, and adding new resources is more energy efficient than scaling existing resources alone. The framework is verified through actual experiments on Qualcomm Snapdragon 800 based tablet MDP/T. Furthermore, usage of the framework at both design and runtime optimization is also presented.
ContributorsGupta, Ujjwala (Author) / Ogras, Umit Y. (Thesis advisor) / Ozev, Sule (Committee member) / Chakrabarti, Chaitali (Committee member) / Arizona State University (Publisher)
Created2014
Description
High speed current-steering DACs with high linearity are needed in today's applications such as wired and wireless communications, instrumentation, radar, and other direct digital synthesis (DDS) applications. However, a trade-off exists between the speed and resolution of Nyquist rate current-steering DACs. As the resolution increases, more transistor area is required to meet matching requirements for optimal linearity and thus, the overall speed of the DAC is limited.
In this thesis work, a 12-bit current-steering DAC was designed with current sources scaled below the required matching size to decrease the area and increase the overall speed of the DAC. By scaling the current sources, however, errors due to random mismatch between current sources will arise and additional calibration hardware is necessary to ensure 12-bit linearity. This work presents how to implement a self-calibration DAC that works to fix amplitude errors while maintaining a lower overall area. Additionally, the DAC designed in this thesis investigates the implementation feasibility of a data-interleaved architecture. Data interleaving can increase the total bandwidth of the DACs by 2 with an increase in SQNR by an additional 3 dB.
The final results show that the calibration method can effectively improve the linearity of the DAC. The DAC is able to run up to 400 MSPS frequencies with a 75 dB SFDR performance and above 87 dB SFDR performance at update rates of 200 MSPS.
In this thesis work, a 12-bit current-steering DAC was designed with current sources scaled below the required matching size to decrease the area and increase the overall speed of the DAC. By scaling the current sources, however, errors due to random mismatch between current sources will arise and additional calibration hardware is necessary to ensure 12-bit linearity. This work presents how to implement a self-calibration DAC that works to fix amplitude errors while maintaining a lower overall area. Additionally, the DAC designed in this thesis investigates the implementation feasibility of a data-interleaved architecture. Data interleaving can increase the total bandwidth of the DACs by 2 with an increase in SQNR by an additional 3 dB.
The final results show that the calibration method can effectively improve the linearity of the DAC. The DAC is able to run up to 400 MSPS frequencies with a 75 dB SFDR performance and above 87 dB SFDR performance at update rates of 200 MSPS.
ContributorsJankunas, Benjamin (Author) / Bakkaloglu, Bertan (Thesis advisor) / Kitchen, Jennifer (Committee member) / Ozev, Sule (Committee member) / Arizona State University (Publisher)
Created2014