ASU Electronic Theses and Dissertations
This collection includes most of the ASU Theses and Dissertations from 2011 to present. ASU Theses and Dissertations are available in downloadable PDF format; however, a small percentage of items are under embargo. Information about the dissertations/theses includes degree information, committee members, an abstract, supporting data or media.
In addition to the electronic theses found in the ASU Digital Repository, ASU Theses and Dissertations can be found in the ASU Library Catalog.
Dissertations and Theses granted by Arizona State University are archived and made available through a joint effort of the ASU Graduate College and the ASU Libraries. For more information or questions about this collection contact or visit the Digital Repository ETD Library Guide or contact the ASU Graduate College at gradformat@asu.edu.
Displaying 1 - 10 of 117
Description
CYOA is a prototype of an iPhone application that produces a single, generative, musical work. This document details some of the thoughts and practices that informed its design, and specifically addresses the overlap between application structure and musical form. The concept of composed instruments is introduced and briefly discussed, some features of video game design that relate to this project are considered, and some specifics of hardware implementation are addressed.
ContributorsPeterson, Julian (Author) / Hackbarth, Glenn (Thesis advisor) / DeMars, James (Committee member) / Feisst, Sabine (Committee member) / Levy, Benjamin (Committee member) / Tobias, Evan (Committee member) / Arizona State University (Publisher)
Created2013
Description
Johann Sebastian Bach's violin Sonata I in G minor, BWV 1001, is a significant and widely performed work that exists in numerous editions and also as transcriptions or arrangements for various other instruments, including the guitar. A pedagogical guitar performance edition of this sonata, however, has yet to be published. Therefore, the core of my project is a transcription and pedagogical edition of this work for guitar. The transcription is supported by an analysis, performance and pedagogical practice guide, and a recording. The analysis and graphing of phrase structures illuminate Bach's use of compositional devices and the architectural function of the work's harmonic gravities. They are intended to guide performers in their assessment of the surface ornamentation and suggest a reduction toward its fundamental purpose. The end result is a clarification of the piece through the organization of phrase structures and the prioritization of harmonic tensions and resolutions. The compiling process is intended to assist the performer in "seeing the forest from the trees." Based on markings from Bach's original autograph score, the transcription considers fingering ease on the guitar that is critical to render the music to a functional and practical level. The goal is to preserve the composer's indications to the highest degree possible while still adhering to the technical confines that allow for actual execution on the guitar. The performance guide provides suggestions for articulation, phrasing, ornamentation, and other interpretive decisions. Considering the limitations of the guitar, the author's suggestions are grounded in various concepts of historically informed performance, and also relate to today's early-music sensibilities. The pedagogical practice guide demonstrates procedures to break down and assimilate the musical material as applied toward the various elements of guitar technique and practice. The CD recording is intended to demonstrate the transcription and the connection to the concepts discussed. It is hoped that this pedagogical edition will provide a rational that serves to support technical decisions within the transcription and generate meaningful interpretive realizations based on principles of historically informed performance.
ContributorsFelice, Joseph Philip (Author) / Koonce, Frank (Thesis advisor) / Feisst, Sabine (Committee member) / Swartz, Jonathan (Committee member) / Arizona State University (Publisher)
Created2013
Description
ABSTRACT Developing new non-traditional device models is gaining popularity as the silicon-based electrical device approaches its limitation when it scales down. Membrane systems, also called P systems, are a new class of biological computation model inspired by the way cells process chemical signals. Spiking Neural P systems (SNP systems), a certain kind of membrane systems, is inspired by the way the neurons in brain interact using electrical spikes. Compared to the traditional Boolean logic, SNP systems not only perform similar functions but also provide a more promising solution for reliable computation. Two basic neuron types, Low Pass (LP) neurons and High Pass (HP) neurons, are introduced. These two basic types of neurons are capable to build an arbitrary SNP neuron. This leads to the conclusion that these two basic neuron types are Turing complete since SNP systems has been proved Turing complete. These two basic types of neurons are further used as the elements to construct general-purpose arithmetic circuits, such as adder, subtractor and comparator. In this thesis, erroneous behaviors of neurons are discussed. Transmission error (spike loss) is proved to be equivalent to threshold error, which makes threshold error discussion more universal. To improve the reliability, a new structure called motif is proposed. Compared to Triple Modular Redundancy improvement, motif design presents its efficiency and effectiveness in both single neuron and arithmetic circuit analysis. DRAM-based CMOS circuits are used to implement the two basic types of neurons. Functionality of basic type neurons is proved using the SPICE simulations. The motif improved adder and the comparator, as compared to conventional Boolean logic design, are much more reliable with lower leakage, and smaller silicon area. This leads to the conclusion that SNP system could provide a more promising solution for reliable computation than the conventional Boolean logic.
ContributorsAn, Pei (Author) / Cao, Yu (Thesis advisor) / Barnaby, Hugh (Committee member) / Chakrabarti, Chaitali (Committee member) / Arizona State University (Publisher)
Created2013
Description
With increasing transistor volume and reducing feature size, it has become a major design constraint to reduce power consumption also. This has given rise to aggressive architectural changes for on-chip power management and rapid development to energy efficient hardware accelerators. Accordingly, the objective of this research work is to facilitate software developers to leverage these hardware techniques and improve energy efficiency of the system. To achieve this, I propose two solutions for Linux kernel: Optimal use of these architectural enhancements to achieve greater energy efficiency requires accurate modeling of processor power consumption. Though there are many models available in literature to model processor power consumption, there is a lack of such models to capture power consumption at the task-level. Task-level energy models are a requirement for an operating system (OS) to perform real-time power management as OS time multiplexes tasks to enable sharing of hardware resources. I propose a detailed design methodology for constructing an architecture agnostic task-level power model and incorporating it into a modern operating system to build an online task-level power profiler. The profiler is implemented inside the latest Linux kernel and validated for Intel Sandy Bridge processor. It has a negligible overhead of less than 1\% hardware resource consumption. The profiler power prediction was demonstrated for various application benchmarks from SPEC to PARSEC with less than 4\% error. I also demonstrate the importance of the proposed profiler for emerging architectural techniques through use case scenarios, which include heterogeneous computing and fine grained per-core DVFS. Along with architectural enhancement in general purpose processors to improve energy efficiency, hardware accelerators like Coarse Grain reconfigurable architecture (CGRA) are gaining popularity. Unlike vector processors, which rely on data parallelism, CGRA can provide greater flexibility and compiler level control making it more suitable for present SoC environment. To provide streamline development environment for CGRA, I propose a flexible framework in Linux to do design space exploration for CGRA. With accurate and flexible hardware models, fine grained integration with accurate architectural simulator, and Linux memory management and DMA support, a user can carry out limitless experiments on CGRA in full system environment.
ContributorsDesai, Digant Pareshkumar (Author) / Vrudhula, Sarma (Thesis advisor) / Chakrabarti, Chaitali (Committee member) / Wu, Carole-Jean (Committee member) / Arizona State University (Publisher)
Created2013
Description
Multicore processors have proliferated in nearly all forms of computing, from servers, desktop, to smartphones. The primary reason for this large adoption of multicore processors is due to its ability to overcome the power-wall by providing higher performance at a lower power consumption rate. With multi-cores, there is increased need for dynamic energy management (DEM), much more than for single-core processors, as DEM for multi-cores is no more a mechanism just to ensure that a processor is kept under specified temperature limits, but also a set of techniques that manage various processor controls like dynamic voltage and frequency scaling (DVFS), task migration, fan speed, etc. to achieve a stated objective. The objectives span a wide range from maximizing throughput, minimizing power consumption, reducing peak temperature, maximizing energy efficiency, maximizing processor reliability, and so on, along with much more wider constraints of temperature, power, timing, and reliability constraints. Thus DEM can be very complex and challenging to achieve. Since often times many DEMs operate together on a single processor, there is a need to unify various DEM techniques. This dissertation address such a need. In this work, a framework for DEM is proposed that provides a unifying processor model that includes processor power, thermal, timing, and reliability models, supports various DEM control mechanisms, many different objective functions along with equally diverse constraint specifications. Using the framework, a range of novel solutions is derived for instances of DEM problems, that include maximizing processor performance, energy efficiency, or minimizing power consumption, peak temperature under constraints of maximum temperature, memory reliability and task deadlines. Finally, a robust closed-loop controller to implement the above solutions on a real processor platform with a very low operational overhead is proposed. Along with the controller design, a model identification methodology for obtaining the required power and thermal models for the controller is also discussed. The controller is architecture independent and hence easily portable across many platforms. The controller has been successfully deployed on Intel Sandy Bridge processor and the use of the controller has increased the energy efficiency of the processor by over 30%
ContributorsHanumaiah, Vinay (Author) / Vrudhula, Sarma (Thesis advisor) / Chatha, Karamvir (Committee member) / Chakrabarti, Chaitali (Committee member) / Rodriguez, Armando (Committee member) / Askin, Ronald (Committee member) / Arizona State University (Publisher)
Created2013
Description
This project features three new pieces for clarinet commissioned from three different composers. Two are for unaccompanied clarinet and one is for clarinet, bass clarinet, and laptop. These pieces are Storm's a Comin' by Chris Burton, Light and Shadows by Theresa Martin, and My Own Agenda by Robbie McCarthy. These three solos challenge the performer in various ways including complex rhythm, use of extended techniques such as growling, glissando, and multiphonics, and the incorporation of technology into a live performance. In addition to background information, a performance practice guide has also been included for each of the pieces. This guide provides recommendations and suggestions for future performers wishing to study and perform these works. Also included are transcripts of interviews done with each of the composers as well as full scores for each of the pieces. Accompanying this document are recordings of each of the three pieces, performed by the author.
ContributorsVaughan, Melissa Lynn (Author) / Spring, Robert (Thesis advisor) / Micklich, Albie (Committee member) / Gardner, Joshua (Committee member) / Hill, Gary (Committee member) / Feisst, Sabine (Committee member) / Arizona State University (Publisher)
Created2013
Description
Three Meditations on the Philosophy of Boethius is a musical piece for guitar, piano interior, and computer. Each of the three movements, or meditations, reflects one level of music according to the medieval philosopher Boethius: Musica Mundana, Musica Humana, and Musica Instrumentalis. From spatial aspects, through the human element, to letting sound evolve freely, different movements revolve around different sounds and sound producing techniques.
ContributorsDori, Gil (Contributor) / Hackbarth, Glenn (Thesis advisor) / DeMars, James (Committee member) / Feisst, Sabine (Committee member) / Arizona State University (Publisher)
Created2013
Description
Adaptive processing and classification of electrocardiogram (ECG) signals are important in eliminating the strenuous process of manually annotating ECG recordings for clinical use. Such algorithms require robust models whose parameters can adequately describe the ECG signals. Although different dynamic statistical models describing ECG signals currently exist, they depend considerably on a priori information and user-specified model parameters. Also, ECG beat morphologies, which vary greatly across patients and disease states, cannot be uniquely characterized by a single model. In this work, sequential Bayesian based methods are used to appropriately model and adaptively select the corresponding model parameters of ECG signals. An adaptive framework based on a sequential Bayesian tracking method is proposed to adaptively select the cardiac parameters that minimize the estimation error, thus precluding the need for pre-processing. Simulations using real ECG data from the online Physionet database demonstrate the improvement in performance of the proposed algorithm in accurately estimating critical heart disease parameters. In addition, two new approaches to ECG modeling are presented using the interacting multiple model and the sequential Markov chain Monte Carlo technique with adaptive model selection. Both these methods can adaptively choose between different models for various ECG beat morphologies without requiring prior ECG information, as demonstrated by using real ECG signals. A supervised Bayesian maximum-likelihood (ML) based classifier uses the estimated model parameters to classify different types of cardiac arrhythmias. However, the non-availability of sufficient amounts of representative training data and the large inter-patient variability pose a challenge to the existing supervised learning algorithms, resulting in a poor classification performance. In addition, recently developed unsupervised learning methods require a priori knowledge on the number of diseases to cluster the ECG data, which often evolves over time. In order to address these issues, an adaptive learning ECG classification method that uses Dirichlet process Gaussian mixture models is proposed. This approach does not place any restriction on the number of disease classes, nor does it require any training data. This algorithm is adapted to be patient-specific by labeling or identifying the generated mixtures using the Bayesian ML method, assuming the availability of labeled training data.
ContributorsEdla, Shwetha Reddy (Author) / Papandreou-Suppappola, Antonia (Thesis advisor) / Chakrabarti, Chaitali (Committee member) / Kovvali, Narayan (Committee member) / Tepedelenlioğlu, Cihan (Committee member) / Arizona State University (Publisher)
Created2012
Description
We are expecting hundreds of cores per chip in the near future. However, scaling the memory architecture in manycore architectures becomes a major challenge. Cache coherence provides a single image of memory at any time in execution to all the cores, yet coherent cache architectures are believed will not scale to hundreds and thousands of cores. In addition, caches and coherence logic already take 20-50% of the total power consumption of the processor and 30-60% of die area. Therefore, a more scalable architecture is needed for manycore architectures. Software Managed Manycore (SMM) architectures emerge as a solution. They have scalable memory design in which each core has direct access to only its local scratchpad memory, and any data transfers to/from other memories must be done explicitly in the application using Direct Memory Access (DMA) commands. Lack of automatic memory management in the hardware makes such architectures extremely power-efficient, but they also become difficult to program. If the code/data of the task mapped onto a core cannot fit in the local scratchpad memory, then DMA calls must be added to bring in the code/data before it is required, and it may need to be evicted after its use. However, doing this adds a lot of complexity to the programmer's job. Now programmers must worry about data management, on top of worrying about the functional correctness of the program - which is already quite complex. This dissertation presents a comprehensive compiler and runtime integration to automatically manage the code and data of each task in the limited local memory of the core. We firstly developed a Complete Circular Stack Management. It manages stack frames between the local memory and the main memory, and addresses the stack pointer problem as well. Though it works, we found we could further optimize the management for most cases. Thus a Smart Stack Data Management (SSDM) is provided. In this work, we formulate the stack data management problem and propose a greedy algorithm for the same. Later on, we propose a general cost estimation algorithm, based on which CMSM heuristic for code mapping problem is developed. Finally, heap data is dynamic in nature and therefore it is hard to manage it. We provide two schemes to manage unlimited amount of heap data in constant sized region in the local memory. In addition to those separate schemes for different kinds of data, we also provide a memory partition methodology.
ContributorsBai, Ke (Author) / Shrivastava, Aviral (Thesis advisor) / Chatha, Karamvir (Committee member) / Xue, Guoliang (Committee member) / Chakrabarti, Chaitali (Committee member) / Arizona State University (Publisher)
Created2014
Description
Piano Quintet> is a three movement piece, inspired by music of Eastern Europe. Sunrise in Hungary starts with a legato song in the first violin unfolding over slow moving sustained harmonics in the rest of the strings. This is contrasted with a lively Hungarian dance which starts in the piano and jumps throughout all of the voices. Armenian Lament introduces a mournful melody performed over a subtly shifting pedal tone in the cello. The rest of the voices are slowly introduced until the movement builds into a canonic threnody. Evening in Bulgaria borrows from the vast repertoire of Bulgarian dances, including rhythms from the horo and rachenitsa. Each time that the movement returns to the primary theme, it incorporates aspects of the dance that directly preceded it. The final return is the crux of the piece, with the first violin playing a virtuosic ornaments run on the melody.
ContributorsGiese, Adam (Composer) / Hackbarth, Glenn (Thesis advisor) / DeMars, James (Committee member) / Feisst, Sabine (Committee member) / Arizona State University (Publisher)
Created2014