Matching Items (69)
Description
One of the challenges in future semiconductor device design is excessive rise of power dissipation and device temperatures. With the introduction of new geometrically confined device structures like SOI, FinFET, nanowires and continuous incorporation of new materials with poor thermal conductivities in the device active region, the device thermal problem is expected to become more challenging in coming years. This work examines the degradation in the ON-current due to self-heating effects in 10 nm channel length silicon nanowire transistors. As part of this dissertation, a 3D electrothermal device simulator is developed that self-consistently solves electron Boltzmann transport equation with 3D energy balance equations for both the acoustic and the optical phonons. This device simulator predicts temperature variations and other physical and electrical parameters across the device for different bias and boundary conditions. The simulation results show insignificant current degradation for nanowire self-heating because of pronounced velocity overshoot effect. In addition, this work explores the role of various placement of the source and drain contacts on the magnitude of self-heating effect in nanowire transistors. This work also investigates the simultaneous influence of self-heating and random charge effects on the magnitude of the ON current for both positively and negatively charged single charges. This research suggests that the self-heating effects affect the ON-current in two ways: (1) by lowering the barrier at the source end of the channel, thus allowing more carriers to go through, and (2) via the screening effect of the Coulomb potential. To examine the effect of temperature dependent thermal conductivity of thin silicon films in nanowire transistors, Selberherr's thermal conductivity model is used in the device simulator. The simulations results show larger current degradation because of self-heating due to decreased thermal conductivity . Crystallographic direction dependent thermal conductivity is also included in the device simulations. Larger degradation is observed in the current along the [100] direction when compared to the [110] direction which is in agreement with the values for the thermal conductivity tensor provided by Zlatan Aksamija.
ContributorsHossain, Arif (Author) / Vasileska, Dragica (Thesis advisor) / Ahmed, Shaikh (Committee member) / Bakkaloglu, Bertan (Committee member) / Goodnick, Stephen (Committee member) / Arizona State University (Publisher)
Created2011
Description
Amorphous oxide semiconductors are promising new materials for various optoelectronic applications. In this study, improved electrical and optical properties upon thermal and microwave processing of mixed-oxide semiconductors are reported. First, arsenic-doped silicon was used as a model system to understand susceptor-assisted microwave annealing. Mixed oxide semiconductor films of indium zinc oxide (IZO) and indium gallium zinc oxide (IGZO) were deposited by room-temperature RF sputtering on flexible polymer substrates. Thermal annealing in different environments - air, vacuum and oxygen was done. Electrical and optical characterization was carried out before and after annealing. The degree of reversal in the degradation in electrical properties of the thin films upon annealing in oxygen was assessed by subjecting samples to subsequent vacuum anneals. To further increase the conductivity of the IGZO films, Ag layers of various thicknesses were embedded between two IGZO layers. Optical performance of the multilayer structures was improved by susceptor-assisted microwave annealing and furnace-annealing in oxygen environment without compromising on their electrical conductivity. The post-processing of the films in different environments was used to develop an understanding of mechanisms of carrier generation, transport and optical absorption. This study establishes IGZO as a viable transparent conductor, which can be deposited at room-temperature and processed by thermal and microwave annealing to improve electrical and optical performance for applications in flexible electronics and optoelectronics.
ContributorsGadre, Mandar (Author) / Alford, Terry L. (Thesis advisor) / Schroder, Dieter (Committee member) / Krause, Stephen (Committee member) / Theodore, David (Committee member) / Arizona State University (Publisher)
Created2011
Description
There will always be a need for high current/voltage transistors. A transistor that has the ability to be both or either of these things is the silicon metal-silicon field effect transistor (MESFET). An additional perk that silicon MESFET transistors have is the ability to be integrated into the standard silicon on insulator (SOI) complementary metal oxide semiconductor (CMOS) process flow. This makes a silicon MESFET transistor a very valuable device for use in any standard CMOS circuit that may usually need a separate integrated circuit (IC) in order to switch power on or from a high current/voltage because it allows this function to be performed with a single chip thereby cutting costs. The ability for the MESFET to cost effectively satisfy the needs of this any many other high current/voltage device application markets is what drives the study of MESFET optimization. Silicon MESFETs that are integrated into standard SOI CMOS processes often receive dopings during fabrication that would not ideally be there in a process made exclusively for MESFETs. Since these remnants of SOI CMOS processing effect the operation of a MESFET device, their effect can be seen in the current-voltage characteristics of a measured MESFET device. Device simulations are done and compared to measured silicon MESFET data in order to deduce the cause and effect of many of these SOI CMOS remnants. MESFET devices can be made in both fully depleted (FD) and partially depleted (PD) SOI CMOS technologies. Device simulations are used to do a comparison of FD and PD MESFETs in order to show the advantages and disadvantages of MESFETs fabricated in different technologies. It is shown that PD MESFET have the highest current per area capability. Since the PD MESFET is shown to have the highest current capability, a layout optimization method to further increase the current per area capability of the PD silicon MESFET is presented, derived, and proven to a first order.
ContributorsSochacki, John (Author) / Thornton, Trevor J (Thesis advisor) / Schroder, Dieter (Committee member) / Vasileska, Dragica (Committee member) / Goryll, Michael (Committee member) / Arizona State University (Publisher)
Created2011
Description
The increased use of commercial complementary metal-oxide-semiconductor (CMOS) technologies in harsh radiation environments has resulted in a new approach to radiation effects mitigation. This approach utilizes simulation to support the design of integrated circuits (ICs) to meet targeted tolerance specifications. Modeling the deleterious impact of ionizing radiation on ICs fabricated in advanced CMOS technologies requires understanding and analyzing the basic mechanisms that result in buildup of radiation-induced defects in specific sensitive regions. Extensive experimental studies have demonstrated that the sensitive regions are shallow trench isolation (STI) oxides. Nevertheless, very little work has been done to model the physical mechanisms that result in the buildup of radiation-induced defects and the radiation response of devices fabricated in these technologies. A comprehensive study of the physical mechanisms contributing to the buildup of radiation-induced oxide trapped charges and the generation of interface traps in advanced CMOS devices is presented in this dissertation. The basic mechanisms contributing to the buildup of radiation-induced defects are explored using a physical model that utilizes kinetic equations that captures total ionizing dose (TID) and dose rate effects in silicon dioxide (SiO2). These mechanisms are formulated into analytical models that calculate oxide trapped charge density (Not) and interface trap density (Nit) in sensitive regions of deep-submicron devices. Experiments performed on field-oxide-field-effect-transistors (FOXFETs) and metal-oxide-semiconductor (MOS) capacitors permit investigating TID effects and provide a comparison for the radiation response of advanced CMOS devices. When used in conjunction with closed-form expressions for surface potential, the analytical models enable an accurate description of radiation-induced degradation of transistor electrical characteristics. In this dissertation, the incorporation of TID effects in advanced CMOS devices into surface potential based compact models is also presented. The incorporation of TID effects into surface potential based compact models is accomplished through modifications of the corresponding surface potential equations (SPE), allowing the inclusion of radiation-induced defects (i.e., Not and Nit) into the calculations of surface potential. Verification of the compact modeling approach is achieved via comparison with experimental data obtained from FOXFETs fabricated in a 90 nm low-standby power commercial bulk CMOS technology and numerical simulations of fully-depleted (FD) silicon-on-insulator (SOI) n-channel transistors.
ContributorsSanchez Esqueda, Ivan (Author) / Barnaby, Hugh J (Committee member) / Schroder, Dieter (Thesis advisor) / Schroder, Dieter K. (Committee member) / Holbert, Keith E. (Committee member) / Gildenblat, Gennady (Committee member) / Arizona State University (Publisher)
Created2011
Description
Programmable Metallization Cell (PMC) is a technology platform which utilizes mass transport in solid or liquid electrolyte coupled with electrochemical (redox) reactions to form or remove nanoscale metallic electrodeposits on or in the electrolyte. The ability to redistribute metal mass and form metallic nanostructure in or on a structure in situ, via the application of a bias on laterally placed electrodes, creates a large number of promising applications. A novel PMC-based lateral microwave switch was fabricated and characterized for use in microwave systems. It has demonstrated low insertion loss, high isolation, low voltage operation, low power and low energy consumption, and excellent linearity. Due to its non-volatile nature the switch operates with fewer biases and its simple planar geometry makes possible innovative device structures which can be potentially integrated into microwave power distribution circuits. PMC technology is also used to develop lateral dendritic metal electrodes. A lateral metallic dendritic network can be grown in a solid electrolyte (GeSe) or electrodeposited on SiO2 or Si using a water-mediated method. These dendritic electrodes grown in a solid electrolyte (GeSe) can be used to lower resistances for applications like self-healing interconnects despite its relatively low light transparency; while the dendritic electrodes grown using water-mediated method can be potentially integrated into solar cell applications, like replacing conventional Ag screen-printed top electrodes as they not only reduce resistances but also are highly transparent. This research effort also laid a solid foundation for developing dendritic plasmonic structures. A PMC-based lateral dendritic plasmonic structure is a device that has metallic dendritic networks grown electrochemically on SiO2 with a thin layer of surface metal nanoparticles in liquid electrolyte. These structures increase the distribution of particle sizes by connecting pre-deposited Ag nanoparticles into fractal structures and result in three significant effects, resonance red-shift, resonance broadening and resonance enhancement, on surface plasmon resonance for light trapping simultaneously, which can potentially enhance thin film solar cells' performance at longer wavelengths.
ContributorsRen, Minghan (Author) / Kozicki, Michael (Thesis advisor) / Schroder, Dieter (Committee member) / Roedel, Ronald (Committee member) / Barnaby, Hugh (Committee member) / Arizona State University (Publisher)
Created2011
Description
In very small electronic devices the alternate capture and emission of carriers at an individual defect site located at the interface of Si:SiO2 of a MOSFET generates discrete switching in the device conductance referred to as a random telegraph signal (RTS) or random telegraph noise (RTN). In this research work, the integration of random defects positioned across the channel at the Si:SiO2 interface from source end to the drain end in the presence of different random dopant distributions are used to conduct Ensemble Monte-Carlo ( EMC ) based numerical simulation of key device performance metrics for 45 nm gate length MOSFET device. The two main performance parameters that affect RTS based reliability measurements are percentage change in threshold voltage and percentage change in drain current fluctuation in the saturation region. It has been observed as a result of the simulation that changes in both and values moderately decrease as the defect position is gradually moved from source end to the drain end of the channel. Precise analytical device physics based model needs to be developed to explain and assess the EMC simulation based higher VT fluctuations as experienced for trap positions at the source side. A new analytical model has been developed that simultaneously takes account of dopant number variations in the channel and depletion region underneath and carrier mobility fluctuations resulting from fluctuations in surface potential barriers. Comparisons of this new analytical model along with existing analytical models are shown to correlate with 3D EMC simulation based model for assessment of VT fluctuations percentage induced by a single interface trap. With scaling of devices beyond 32 nm node, halo doping at the source and drain are routinely incorporated to combat the threshold voltage roll-off that takes place with effective channel length reduction. As a final study on this regard, 3D EMC simulation method based computations of threshold voltage fluctuations have been performed for varying source and drain halo pocket length to illustrate the threshold voltage fluctuations related reliability problems that have been aggravated by trap positions near the source at the interface compared to conventional 45 nm MOSFET.
ContributorsAshraf, Nabil Shovon (Author) / Vasileska, Dragica (Thesis advisor) / Schroder, Dieter (Committee member) / Goodnick, Stephen (Committee member) / Goryll, Michael (Committee member) / Arizona State University (Publisher)
Created2011
Description
As existing solar cell technologies come closer to their theoretical efficiency, new concepts that overcome the Shockley-Queisser limit and exceed 50% efficiency need to be explored. New materials systems are often investigated to achieve this, but the use of existing solar cell materials in advanced concept approaches is compelling for multiple theoretical and practical reasons. In order to include advanced concept approaches into existing materials, nanostructures are used as they alter the physical properties of these materials. To explore advanced nanostructured concepts with existing materials such as III-V alloys, silicon and/or silicon/germanium and associated alloys, fundamental aspects of using these materials in advanced concept nanostructured solar cells must be understood. Chief among these is the determination and predication of optimum electronic band structures, including effects such as strain on the band structure, and the material's opto-electronic properties. Nanostructures have a large impact on band structure and electronic properties through quantum confinement. An additional large effect is the change in band structure due to elastic strain caused by lattice mismatch between the barrier and nanostructured (usually self-assembled QDs) materials. To develop a material model for advanced concept solar cells, the band structure is calculated for single as well as vertical array of quantum dots with the realistic effects such as strain, associated with the epitaxial growth of these materials. The results show significant effect of strain in band structure. More importantly, the band diagram of a vertical array of QDs with different spacer layer thickness show significant change in band offsets, especially for heavy and light hole valence bands when the spacer layer thickness is reduced. These results, ultimately, have significance to develop a material model for advance concept solar cells that use the QD nanostructures as absorbing medium. The band structure calculations serve as the basis for multiple other calculations. Chief among these is that the model allows the design of a practical QD advanced concept solar cell, which meets key design criteria such as a negligible valence band offset between the QD/barrier materials and close to optimum band gaps, resulting in the predication of optimum material combinations.
ContributorsDahal, Som Nath (Author) / Honsberg, Christiana (Thesis advisor) / Goodnick, Stephen (Committee member) / Roedel, Ronald (Committee member) / Ponce, Fernando (Committee member) / Arizona State University (Publisher)
Created2011
Description
A primary motivation of research in photovoltaic technology is to obtain higher efficiency photovoltaic devices at reduced cost of production so that solar electricity can be cost competitive. The majority of photovoltaic technologies are based on p-n junction, with efficiency potential being much lower than the thermodynamic limits of individual technologies and thereby providing substantial scope for further improvements in efficiency. The thesis explores photovoltaic devices using new physical processes that rely on thin layers and are capable of attaining the thermodynamic limit of photovoltaic technology. Silicon heterostructure is one of the candidate technologies in which thin films induce a minority carrier collecting junction in silicon and the devices can achieve efficiency close to the thermodynamic limits of silicon technology. The thesis proposes and experimentally establishes a new theory explaining the operation of silicon heterostructure solar cells. The theory will assist in identifying the optimum properties of thin film materials for silicon heterostructure and help in design and characterization of the devices, along with aiding in developing new devices based on this technology. The efficiency potential of silicon heterostructure is constrained by the thermodynamic limit (31%) of single junction solar cell and is considerably lower than the limit of photovoltaic conversion (~ 80 %). A further improvement in photovoltaic conversion efficiency is possible by implementing a multiple quasi-fermi level system (MQFL). A MQFL allows the absorption of sub band gap photons with current being extracted at a higher band-gap, thereby allowing to overcome the efficiency limit of single junction devices. A MQFL can be realized either by thin epitaxial layers of alternating higher and lower band gap material with nearly lattice matched (quantum well) or highly lattice mismatched (quantum dot) structure. The thesis identifies the material combination for quantum well structure and calculates the absorption coefficient of a MQFl based on quantum well. GaAsSb (barrier)/InAs(dot) was identified as a candidate material for MQFL using quantum dot. The thesis explains the growth mechanism of GaAsSb and the optimization of GaAsSb and GaAs heterointerface.
ContributorsGhosha, Kuṇāla (Author) / Bowden, Stuart (Thesis advisor) / Honsberg, Christiana (Thesis advisor) / Vasileska, Dragica (Committee member) / Goodnick, Stephen (Committee member) / Arizona State University (Publisher)
Created2011
Description
Electromigration in metal interconnects is the most pernicious failure mechanism in semiconductor integrated circuits (ICs). Early electromigration investigations were primarily focused on aluminum interconnects for silicon-based ICs. An alternative metallization compatible with gallium arsenide (GaAs) was required in the development of high-powered radio frequency (RF) compound semiconductor devices operating at higher current densities and elevated temperatures. Gold-based metallization was implemented on GaAs devices because it uniquely forms a very low resistance ohmic contact and gold interconnects have superior electrical and thermal conductivity properties. Gold (Au) was also believed to have improved resistance to electromigration due to its higher melting temperature, yet electromigration reliability data on passivated Au interconnects is scarce and inadequate in the literature. Therefore, the objective of this research was to characterize the electromigration lifetimes of passivated Au interconnects under precisely controlled stress conditions with statistically relevant quantities to obtain accurate model parameters essential for extrapolation to normal operational conditions. This research objective was accomplished through measurement of electromigration lifetimes of large quantities of passivated electroplated Au interconnects utilizing high-resolution in-situ resistance monitoring equipment. Application of moderate accelerated stress conditions with a current density limited to 2 MA/cm2 and oven temperatures in the range of 300°C to 375°C avoided electrical overstress and severe Joule-heated temperature gradients. Temperature coefficients of resistance (TCRs) were measured to determine accurate Joule-heated Au interconnect film temperatures. A failure criterion of 50% resistance degradation was selected to prevent thermal runaway and catastrophic metal ruptures that are problematic of open circuit failure tests. Test structure design was optimized to reduce resistance variation and facilitate failure analysis. Characterization of the Au microstructure yielded a median grain size of 0.91 ìm. All Au lifetime distributions followed log-normal distributions and Black's model was found to be applicable. An activation energy of 0.80 ± 0.05 eV was measured from constant current electromigration tests at multiple temperatures. A current density exponent of 1.91 was extracted from multiple current densities at a constant temperature. Electromigration-induced void morphology along with these model parameters indicated grain boundary diffusion is dominant and the void nucleation mechanism controlled the failure time.
ContributorsKilgore, Stephen (Author) / Adams, James (Thesis advisor) / Schroder, Dieter (Thesis advisor) / Krause, Stephen (Committee member) / Gaw, Craig (Committee member) / Arizona State University (Publisher)
Created2013
Description
A proposed visible spectrum nanoscale imaging method requires material with permittivity values much larger than those available in real world materials to shrink the visible wavelength to attain the desired resolution. It has been proposed that the extraordinarily slow propagation experienced by light guided along plasmon resonant structures is a viable approach to obtaining these short wavelengths. To assess the feasibility of such a system, an effective medium model of a chain of Noble metal plasmonic nanospheres is developed, leading to a straightforward calculation of the waveguiding properties. Evaluation of other models for such structures that have appeared in the literature, including an eigenvalue problem nearest neighbor approximation, a multi- neighbor approximation with retardation, and a method-of-moments method for a finite chain, show conflicting expectations of such a structure. In particular, recent publications suggest the possibility of regions of invalidity for eigenvalue problem solutions that are considered far below the onset of guidance, and for solutions that assume the loss is low enough to justify perturbation approximations. Even the published method-of-moments approach suffers from an unjustified assumption in the original interpretation, leading to overly optimistic estimations of the attenuation of the plasmon guided wave. In this work it is shown that the method of moments approach solution was dominated by the radiation from the source dipole, and not the waveguiding behavior claimed. If this dipolar radiation is removed the remaining fields ought to contain the desired guided wave information. Using a Prony's-method-based algorithm the dispersion properties of the chain of spheres are assessed at two frequencies, and shown to be dramatically different from the optimistic expectations in much of the literature. A reliable alternative to these models is to replace the chain of spheres with an effective medium model, thus mapping the chain problem into the well-known problem of the dielectric rod. The solution of the Green function problem for excitation of the symmetric longitudinal mode (TM01) is performed by numerical integration. Using this method the frequency ranges over which the rod guides and the associated attenuation are clearly seen. The effective medium model readily allows for variation of the sphere size and separation, and can be taken to the limit where instead of a chain of spheres we have a solid Noble metal rod. This latter case turns out to be the optimal for minimizing the attenuation of the guided wave. Future work is proposed to simulate the chain of photonic nanospheres and the nanowire using finite-difference time-domain to verify observed guided behavior in the Green's function method devised in this thesis and to simulate the proposed nanosensing devices.
ContributorsHale, Paul (Author) / Diaz, Rodolfo E (Thesis advisor) / Goodnick, Stephen (Committee member) / Aberle, James T., 1961- (Committee member) / Palais, Joseph (Committee member) / Arizona State University (Publisher)
Created2013