Matching Items (19)
Description
Fluxgate sensors are magnetic field sensors that can measure DC and low frequency AC magnetic fields. They can measure much lower magnetic fields than other magnetic sensors like Hall effect sensors, magnetoresistive sensors etc. They also have high linearity, high sensitivity and low noise. The major application of fluxgate sensors is in magnetometers for the measurement of earth's magnetic field. Magnetometers are used in navigation systems and electronic compasses. Fluxgate sensors can also be used to measure high DC currents. Integrated micro-fluxgate sensors have been developed in recent years. These sensors have much lower power consumption and area compared to their PCB counterparts. The output voltage of micro-fluxgate sensors is very low which makes the analog front end more complex and results in an increase in power consumption of the system. In this thesis a new analog front-end circuit for micro-fluxgate sensors is developed. This analog front-end circuit uses charge pump based excitation circuit and phase delay based read-out chain. With these two features the power consumption of analog front-end is reduced. The output is digital and it is immune to amplitude noise at the output of the sensor. Digital output is produced without using an ADC. A SPICE model of micro-fluxgate sensor is used to verify the operation of the analog front-end and the simulation results show very good linearity.
ContributorsPappu, Karthik (Author) / Bakkaloglu, Bertan (Thesis advisor) / Christen, Jennifer Blain (Committee member) / Yu, Hongbin (Committee member) / Arizona State University (Publisher)
Created2013
Description
Test cost has become a significant portion of device cost and a bottleneck in high volume manufacturing. Increasing integration density and shrinking feature sizes increased test time/cost and reduce observability. Test engineers have to put a tremendous effort in order to maintain test cost within an acceptable budget. Unfortunately, there is not a single straightforward solution to the problem. Products that are tested have several application domains and distinct customer profiles. Some products are required to operate for long periods of time while others are required to be low cost and optimized for low cost. Multitude of constraints and goals make it impossible to find a single solution that work for all cases. Hence, test development/optimization is typically design/circuit dependent and even process specific. Therefore, test optimization cannot be performed using a single test approach, but necessitates a diversity of approaches. This works aims at addressing test cost minimization and test quality improvement at various levels. In the first chapter of the work, we investigate pre-silicon strategies, such as design for test and pre-silicon statistical simulation optimization. In the second chapter, we investigate efficient post-silicon test strategies, such as adaptive test, adaptive multi-site test, outlier analysis, and process shift detection/tracking.
ContributorsYilmaz, Ender (Author) / Ozev, Sule (Thesis advisor) / Bakkaloglu, Bertan (Committee member) / Cao, Yu (Committee member) / Christen, Jennifer Blain (Committee member) / Arizona State University (Publisher)
Created2012
Description
Coarse Grain Reconfigurable Arrays (CGRAs) are promising accelerators capable of
achieving high performance at low power consumption. While CGRAs can efficiently
accelerate loop kernels, accelerating loops with control flow (loops with if-then-else
structures) is quite challenging. Techniques that handle control flow execution in
CGRAs generally use predication. Such techniques execute both branches of an
if-then-else structure and select outcome of either branch to commit based on the
result of the conditional. This results in poor utilization of CGRA s computational
resources. Dual-issue scheme which is the state of the art technique for control flow
fetches instructions from both paths of the branch and selects one to execute at
runtime based on the result of the conditional. This technique has an overhead in
instruction fetch bandwidth. In this thesis, to improve performance of control flow
execution in CGRAs, I propose a solution in which the result of the conditional
expression that decides the branch outcome is communicated to the instruction fetch
unit to selectively issue instructions from the path taken by the branch at run time.
Experimental results show that my solution can achieve 34.6% better performance
and 52.1% improvement in energy efficiency on an average compared to state of the
art dual issue scheme without imposing any overhead in instruction fetch bandwidth.
achieving high performance at low power consumption. While CGRAs can efficiently
accelerate loop kernels, accelerating loops with control flow (loops with if-then-else
structures) is quite challenging. Techniques that handle control flow execution in
CGRAs generally use predication. Such techniques execute both branches of an
if-then-else structure and select outcome of either branch to commit based on the
result of the conditional. This results in poor utilization of CGRA s computational
resources. Dual-issue scheme which is the state of the art technique for control flow
fetches instructions from both paths of the branch and selects one to execute at
runtime based on the result of the conditional. This technique has an overhead in
instruction fetch bandwidth. In this thesis, to improve performance of control flow
execution in CGRAs, I propose a solution in which the result of the conditional
expression that decides the branch outcome is communicated to the instruction fetch
unit to selectively issue instructions from the path taken by the branch at run time.
Experimental results show that my solution can achieve 34.6% better performance
and 52.1% improvement in energy efficiency on an average compared to state of the
art dual issue scheme without imposing any overhead in instruction fetch bandwidth.
ContributorsRajendran Radhika, Shri Hari (Author) / Shrivastava, Aviral (Thesis advisor) / Christen, Jennifer Blain (Committee member) / Cao, Yu (Committee member) / Arizona State University (Publisher)
Created2014
Description
The first part describes Metal Semiconductor Field Effect Transistor (MESFET) based fundamental analog building blocks designed and fabricated in a single poly, 3-layer metal digital CMOS technology utilizing fully depletion mode MESFET devices. DC characteristics were measured by varying the power supply from 2.5V to 5.5V. The measured DC transfer curves of amplifiers show good agreement with the simulated ones with extracted models from the same process. The accuracy of the current mirror showing inverse operation is within ±15% for the current from 0 to 1.5mA with the power supply from 2.5 to 5.5V. The second part presents a low-power image recognition system with a novel MESFET device fabricated on a CMOS substrate. An analog image recognition system with power consumption of 2.4mW/cell and a response time of 6µs is designed, fabricated and characterized. The experimental results verified the accuracy of the extracted SPICE model of SOS MESFETs. The response times of 4µs and 6µs for one by four and one by eight arrays, respectively, are achieved with the line recognition. Each core cell for both arrays consumes only 2.4mW. The last part presents a CMOS low-power transceiver in MICS band is presented. The LNA core has an integrated mixer in a folded configuration. The baseband strip consists of a pseudo differential MOS-C band-pass filter achieving demodulation of 150kHz-offset BFSK signals. The SRO is used in a wakeup RX for the wake-up signal reception. The all digital frequency-locked loop drives a class AB power amplifier in a transmitter. The sensitivity of -85dBm in the wakeup RX is achieved with the power consumption of 320µW and 400µW at the data rates of 100kb/s and 200kb/s from 1.8V, respectively. The sensitivities of -70dBm and -98dBm in the data-link RX are achieved with NF of 40dB and 11dB at the data rate of 100kb/s while consuming only 600µW and 1.5mW at 1.2V and 1.8V, respectively.
ContributorsKim, Sung (Author) / Bakkaloglu, Bertan (Thesis advisor) / Christen, Jennifer Blain (Committee member) / Cao, Yu (Committee member) / Thornton, Trevor (Committee member) / Arizona State University (Publisher)
Created2011
Description
Obtaining local electrochemical (EC) information is extremely important for understanding basic surface reactions, and for many applications. Scanning electrochemical microscopy (SECM) can obtain local EC information by scanning a microelectrode across the surface. Although powerful, SECM is slow, the scanning microelectrode may perturb reaction and the measured signal decreases with the size of microelectrode. This thesis demonstrates a new imaging technique based on a principle that is completely different from the conventional EC detection technologies. The technique, referred to as plasmonic-based electrochemical imaging (PECI), images local EC current (both faradaic and non-faradaic) without using a scanning microelectrode. Because PECI response is an optical signal originated from surface plasmon resonance (SPR), PECI is fast and non-invasive and its signal is proportional to incident light intensity, thus does not decrease with the area of interest. A complete theory is developed in this thesis work to describe the relationship between EC current and PECI signal. EC current imaging at various fixed potentials and local cyclic voltammetry methods are developed and demonstrated with real samples. Fast imaging rate (up to 100,000 frames per second) with 0.2×3µm spatial resolution and 0.3 pA detection limit have been achieved. Several PECI applications have been developed to demonstrate the unique strengths of the new imaging technology. For example, trace particles in fingerprint is detected by PECI, a capability that cannot be achieved with the conventional EC technologies. Another example is PECI imaging of EC reaction and interfacial impedance of graphene of different thicknesses. In addition, local square wave voltammetry capability is demonstrated and applied to study local catalytic current of platinum nanoparticle microarray. This thesis also describes a related but different research project that develops a new method to measure surface charge densities of SPR sensor chips, and micro- and nano-particles. A third project of this thesis is to develop a method to expand the conventional SPR detection and imaging technology by including a waveguide mode. This innovation creates a sensitive detection of bulk index of refraction, which overcomes the limitation that the conventional SPR can probe only changes near the sensor surface within ~200 nm.
ContributorsShan, Xiaonan (Author) / Tao, Nongjian (Thesis advisor) / Chae, Junseok (Committee member) / Christen, Jennifer Blain (Committee member) / Hayes, Mark (Committee member) / Arizona State University (Publisher)
Created2011
Description
The past two decades have been monumental in the advancement of microchips designed for a diverse range of medical applications and bio-analysis. Owing to the remarkable progress in micro-fabrication technology, complex chemical and electro-mechanical features can now be integrated into chip-scale devices for use in biosensing and physiological measurements. Some of these devices have made enormous contributions in the study of complex biochemical processes occurring at the molecular and cellular levels while others overcame the challenges of replicating various functions of human organs as implant systems. This thesis presents test data and analysis of two such systems. First, an ISFET based pH sensor is characterized for its performance in a continuous pH monitoring application. Many of the basic properties of ISFETs including I-V characteristics, pH sensitivity and more importantly, its long term drift behavior have been investigated. A new theory based on frequent switching of electric field across the gate oxide to decrease the rate of current drift has been successfully implemented with the help of an automated data acquisition and switching system. The system was further tested for a range of duty cycles in order to accurately determine the minimum length of time required to fully reset the drift. Second, a microfluidic based vestibular implant system was tested for its underlying characteristics as a light sensor. A computer controlled tilt platform was then implemented to further test its sensitivity to inclinations and thus it‟s more important role as a tilt sensor. The sensor operates through means of optoelectronics and relies on the signals generated from photodiode arrays as a result of light being incident on them. ISFET results show a significant drop in the overall drift and good linear characteristics. The drift was seen to reset at less than an hour. The photodiodes show ideal I-V comparison between photoconductive and photovoltaic modes of operation with maximum responsivity at 400nm and a shunt resistance of 394 MΩ. Additionally, post-processing of the tilt sensor to incorporate the sensing fluids is outlined. Based on several test and fabrication results, a possible method of sealing the open cavity of the chip using a UV curable epoxy has been discussed.
ContributorsMamun, Samiha (Author) / Christen, Jennifer Blain (Thesis advisor) / Goryll, Michael (Committee member) / Yu, Hongyu (Committee member) / Arizona State University (Publisher)
Created2011
Description
Due to heterogeneity at the cellular level, single cell analysis (SCA) has become a necessity to study cellomics for the early detection of diseases like cancer. Development of single cell manipulation systems is very critical for performing SCA. In this thesis, electrorotation (ROT) chips to trap and rotate single cells using electrokinetic forces have been developed. The ROT chip mainly consists of a set of closely spaced metal electrodes (60µm interspacing between opposite electrodes) that forms a closed electric field cage (electrocage) when driven with high frequency AC voltages. Cells were flowed through a microchannel to the electrocage where they could be precisely trapped, levitated and rotated in 3-D along the axis of interest. The dielectrophoresis based ROT chip design and relevant electrokinetic effects have been simulated using COMSOL 3.4 to optimize the design parameters. Also, various semiconductor technology fabrication process steps have been developed and optimized for better yield and repeatability in the manufacture of the ROT chip. The ROT chip thus fabricated was used to characterize rotation of single cells with respect to the control parameters namely excitation voltage, frequency and cell line. The longevity of cell rotation under electric fields has been probed. Also, the Joule heating inside the ROT chip due to applied voltage has been characterized to know the thermal stress on the cells. The major advantages of the ROT chip developed are precise electrorotation of cells, simple design and straight forward fabrication process.
ContributorsSoundappa Elango, Iniyan (Author) / Meldrum, Deirdre R (Thesis advisor) / Christen, Jennifer Blain (Committee member) / Johnson, Roger H (Committee member) / Arizona State University (Publisher)
Created2012
Description
The front end of almost all ADCs consists of a Sample and Hold Circuit in order to make sure a constant analog value is digitized at the end of ADC. The design of Track and Hold Circuit (THA) mainly focuses on following parameters: Input frequency, Sampling frequency, dynamic Range, hold pedestal, feed through error. This thesis will discuss the importance of these parameters of a THA to the ADCs and commonly used architectures of THA. A new architecture with SiGe HBT transistors in BiCMOS 130 nm technology is presented here. The proposed topology without complicated circuitry achieves high Spurious Free Dynamic Range(SFDR) and Total Harmonic Distortion (THD).These are important figure of merits for any THA which gives a measure of non-linearity of the circuit. The proposed topology is implemented in IBM8HP 130 nm BiCMOS process combines typical emitter follower switch in bipolar THAs and output steering technique proposed in the previous work. With these techniques and the cascode transistor in the input which is used to isolate the switch from the input during the hold mode, better results have been achieved. The THA is designed to work with maximum input frequency of 250 MHz at sampling frequency of 500 MHz with input currents not more than 5mA achieving an SFDR of 78.49 dB. Simulation and results are presented, illustrating the advantages and trade-offs of the proposed topology.
ContributorsRao, Nishita Ramakrishna (Author) / Barnaby, Hugh (Thesis advisor) / Bakkaloglu, Bertan (Committee member) / Christen, Jennifer Blain (Committee member) / Arizona State University (Publisher)
Created2012
Description
Flexible hybrid electronics (FHE) is emerging as a promising solution to combine the benefits of printed electronics and silicon technology. FHE has many high-impact potential areas, such as wearable applications, health monitoring, and soft robotics, due to its physical advantages, which include light weight, low cost and the ability conform to different shapes. However, physical deformations that can occur in the field lead to significant testing and validation challenges. For example, designers have to ensure that FHE devices continue to meet specs even when the components experience stress due to bending. Hence, physical deformation, which is hard to emulate, has to be part of the test procedures developed for FHE devices. This paper is the first to analyze stress experience at different parts of FHE devices under different bending conditions. Then develop a novel methodology to maximize the test coverage with minimum number of text vectors with the help of a mixed integer linear programming formulation.
ContributorsGao, Hang (Author) / Ozev, Sule (Thesis advisor) / Ogras, Umit Y. (Committee member) / Christen, Jennifer Blain (Committee member) / Arizona State University (Publisher)
Created2018
Description
Intracellular voltage recordings from single neurons in vitro and in vivo have been fundamental to our understanding of neuronal function. Conventional electrodes and associated positioning systems for intracellular recording in vivo are large and bulky, which has largely restricted their use to single-channel recording from anesthetized animals. Further, intracellular recordings are very cumbersome, requiring a high degree of skill not readily achieved in a typical laboratory. This dissertation presents a robotic, head-mountable, MEMS (Micro-Electro-Mechanical Systems) based intracellular recording system to overcome the above limitations associated with form-factor, scalability and highly skilled and tedious manual operations required for intracellular recordings. This system combines three distinct technologies: 1) novel microscale, polycrystalline silicon-based electrode for intracellular recording, 2) electrothermal microactuators for precise microscale navigation of the electrode and 3) closed-loop control algorithm for autonomous movement and positioning of electrode inside single neurons. First, two distinct designs of polysilicon-based microscale electrodes were fabricated and tested for intracellular recordings. In the first approach, tips of polysilicon microelectrodes were milled to nanoscale dimensions (<300 nm) using focused ion beam (FIB) to develop polysilicon nanoelectrodes. Polysilicon nanoelectrodes recorded >1.5 mV amplitude, positive-going action potentials and synaptic potentials from neurons in the abdominal ganglion of Aplysia Californica. In the second approach, polysilicon microelectrodes were integrated with miniaturized glass micropipettes filled with electrolyte to fabricate glass-polysilicon microelectrodes. These electrodes consistently recorded high fidelity intracellular potentials from neurons in the abdominal ganglion of Aplysia Californica (Resting Potentials < -35 mV, Action Potentials > 60 mV) as well as the rat motor cortex (Resting Potentials < -50 mV). Next, glass-polysilicon microelectrodes were coupled with microscale electrothermal actuators and controller for autonomous intracellular recordings from single neurons in the abdominal ganglion. Consistent resting potentials (< -35 mV) and action potentials (> 60 mV) were recorded after each successful penetration attempt with the controller and microactuated glass-polysilicon microelectrodes. The success rate of penetration and quality of recordings achieved using electrothermal microactuators were comparable to that of conventional positioning systems. Finally, the feasibility of this miniaturized system to obtain intracellular recordings from single neurons in the motor cortex of rats in vivo is also demonstrated. The MEMS-based system offers significant advantages: 1) reduction in overall size for potential use in behaving animals, 2) scalable approach to potentially realize multi-channel recordings and 3) a viable method to fully automate measurement of intracellular recordings.
ContributorsSampath Kumar, Swathy (Author) / Muthuswamy, Jit (Thesis advisor) / Abbas, James (Committee member) / Hamm, Thomas (Committee member) / Christen, Jennifer Blain (Committee member) / Buneo, Christopher (Committee member) / Arizona State University (Publisher)
Created2018