Matching Items (2)
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Description
Caches have long been used to reduce memory access latency. However, the increased complexity of cache coherence brings significant challenges in processor design as the number of cores increases. While making caches scalable is still an important research problem, some researchers are exploring the possibility of a more power-efficient SRAM

Caches have long been used to reduce memory access latency. However, the increased complexity of cache coherence brings significant challenges in processor design as the number of cores increases. While making caches scalable is still an important research problem, some researchers are exploring the possibility of a more power-efficient SRAM called scratchpad memories or SPMs. SPMs consume significantly less area, and are more energy-efficient per access than caches, and therefore make the design of on-chip memories much simpler. Unlike caches, which fetch data from memories automatically, an SPM requires explicit instructions for data transfers. SPM-only architectures are thus named as software managed manycore (SMM), since the data movements of such architectures rely on software. SMM processors have been widely used in different areas, such as embedded computing, network processing, or even high performance computing. While SMM processors provide a low-power platform, the hardware alone does not guarantee power efficiency, if applications on such processors deliver low performance. Efficient software techniques are therefore required. A big body of management techniques for SMM architectures are compiler-directed, as inserting data movement operations by hand forces programmers to trace flow of data, which can be error-prone and sometimes difficult if not impossible. This thesis develops compiler-directed techniques to manage data transfers for embedded applications on SMMs efficiently. The techniques analyze and find out the proper program points and insert data movement instructions accordingly. The techniques manage code, stack and heap data of applications, and reduce execution time by 14%, 52% and 80% respectively compared to their predecessors on typical embedded applications. On top of managing local data, a technique is also developed for shared data in SMM architectures. Experimental results show it achieves more than 2X speedup than the previous technique on average.
ContributorsCai, Jian (Author) / Shrivastava, Aviral (Thesis advisor) / Wu, Carole (Committee member) / Ren, Fengbo (Committee member) / Dasgupta, Partha (Committee member) / Arizona State University (Publisher)
Created2017
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Description
This thesis describes several approaches to next generation DNA sequencing via tunneling current method based on a Scanning Tunneling Microscope system. In chapters 5 and 6, preliminary results have shown that DNA bases could be identified by their characteristic tunneling signals. Measurements taken in aqueous buffered solution showed that single

This thesis describes several approaches to next generation DNA sequencing via tunneling current method based on a Scanning Tunneling Microscope system. In chapters 5 and 6, preliminary results have shown that DNA bases could be identified by their characteristic tunneling signals. Measurements taken in aqueous buffered solution showed that single base resolution could be achieved with economic setups. In chapter 7, it is illustrated that some ongoing measurements are indicating the sequence readout by making linear scan on a piece of short DNA oligomer. However, to overcome the difficulties of controlling DNA especially ssDNA movement, it is much better to have the tunneling measurement incorporated onto a robust nanopore device to realize sequential reading of the DNA sequence while it is being translocated.
ContributorsHuang, Shuo (Author) / Lindsay, Stuart (Thesis advisor) / Sankey, Otto (Committee member) / Tao, Nongjian (Committee member) / Drucker, Jeff (Committee member) / Ros, Robert (Committee member) / Arizona State University (Publisher)
Created2011