Matching Items (4)
Description
The most important metrics considered for electric vehicles are power density, efficiency, and reliability of the powertrain modules. The powertrain comprises of an Electric Machine (EM), power electronic converters, an Energy Management System (EMS), and an Energy Storage System (ESS). The power electronic converters are used to couple the motor with the battery stack. Including a DC/DC converter in the powertrain module is favored as it adds an additional degree of freedom to achieve flexibility in optimizing the battery module and inverter independently. However, it is essential that the converter is rated for high peak power and can maintain high efficiency while operating over a wide range of load conditions to not compromise on system efficiency. Additionally, the converter must strictly adhere to all automotive standards.
Currently, several hard-switching topologies have been employed such as conventional boost DC/DC, interleaved step-up DC/DC, and full-bridge DC/DC converter. These converters face respective limitations in achieving high step-up conversion ratio, size and weight issues, or high component count. In this work, a bi-directional synchronous boost DC/DC converter with easy interleaving capability is proposed with a novel ZVT mechanism. This converter steps up the EV battery voltage of 200V-300V to a wide range of variable output voltages ranging from 310V-800V. High power density and efficiency are achieved through high switching frequency of 250kHz for each phase with effective frequency doubling through interleaving. Also, use of wide bandgap high voltage SiC switches allows high efficiency operation even at high temperatures.
Comprehensive analysis, design details and extensive simulation results are presented. Incorporating ZVT branch with adaptive time delay results in converter efficiency close to 98%. Experimental results from a 2.5kW hardware prototype validate the performance of the proposed approach. A peak efficiency of 98.17% has been observed in hardware in the boost or motoring mode.
Currently, several hard-switching topologies have been employed such as conventional boost DC/DC, interleaved step-up DC/DC, and full-bridge DC/DC converter. These converters face respective limitations in achieving high step-up conversion ratio, size and weight issues, or high component count. In this work, a bi-directional synchronous boost DC/DC converter with easy interleaving capability is proposed with a novel ZVT mechanism. This converter steps up the EV battery voltage of 200V-300V to a wide range of variable output voltages ranging from 310V-800V. High power density and efficiency are achieved through high switching frequency of 250kHz for each phase with effective frequency doubling through interleaving. Also, use of wide bandgap high voltage SiC switches allows high efficiency operation even at high temperatures.
Comprehensive analysis, design details and extensive simulation results are presented. Incorporating ZVT branch with adaptive time delay results in converter efficiency close to 98%. Experimental results from a 2.5kW hardware prototype validate the performance of the proposed approach. A peak efficiency of 98.17% has been observed in hardware in the boost or motoring mode.
ContributorsMullangi Chenchu, Hemanth (Author) / Ayyanar, Raja (Thesis advisor) / Qin, Jiangchao (Committee member) / Lei, Qin (Committee member) / Arizona State University (Publisher)
Created2018
Description
Silicon Carbide (SiC) junction field effect transistors (JFETs) are ideal for switching high current, high voltage loads in high temperature environments. These devices require external drive circuits to generate pulse width modulated (PWM) signals switching from 0V to approximately 10V. Advanced CMOS microcontrollers are ideal for generating the PWM signals but are limited in output voltage due to their low breakdown voltage within the CMOS drive circuits. As a result, an intermediate buffer stage is required between the CMOS circuitry and the JFET. In this thesis, a discrete silicon-on-insulator (SOI) metal semiconductor field effect transistor (MESFET) was used to drive the gate of a SiC power JFET switching a 120V RMS AC supply into a 30Ω load. The wide operating temperature range and high breakdown voltage of up to 50V make the SOI MESFET ideal for power electronics in extreme environments. Characteristic curves for the MESFET were measured up to 250°C.; To drive the JFET, the MESFET was DC biased and then driven by a 1.2V square wave PWM signal to switch the JFET gate from 0 to 10V at frequencies up to 20kHz. For simplicity, the 1.2V PWM square wave signal was provided by a 555 timer. The JFET gate drive circuit was measured at high temperatures up to 235°C.; The circuit operated well at the high temperatures without any damage to the SOI MESFET or SiC JFET. The drive current of the JFET was limited by the duty cycle range of the 555 timer used. The SiC JFET drain current decreased with increased temperature. Due to the easy integration of MESFETs into SOI CMOS processes, MESFETs can be fabricated alongside MOSFETs without any changes in the process flow. This thesis demonstrates the feasibility of integrating a MESFET with CMOS PWM circuitry for a completely integrated SiC driver thus eliminating the need for the intermediate buffer stage.
ContributorsSummers, Nicholas, M.S (Author) / Thornton, Trevor J (Thesis advisor) / Goryll, Michael (Committee member) / Schroder, Dieter (Committee member) / Arizona State University (Publisher)
Created2010
Description
4H-SiC has been widely used in many applications. All of these benefit from its extremely high critical electric field and good electron mobility. For example, 4H-SiC possesses a critical field ten times higher than that of Si, which allows high-voltage blocking layers composed of 4H-SiC to be approximately a tenth the thickness of a comparable Si device. This, in turn, reduces the device on-resistance and power losses while maintaining the same high blocking capability.
Unfortunately, commercial TCAD tools like Sentaurus and Silvaco Atlas are based on the effective mass approximation, while most 4H-SiC devices are not operated under low electric field, so the parabolic-like band approximation does not hold anymore. Hence, to get more accurate and reliable simulation results, full-band analysis is needed. The first step in the development of a full-band device simulator is the calculation of the band structure. In this work, the empirical pseudopotential method (EPM) is adopted. The next task in the sequence is the calculation of the scattering rates. Acoustic, non-polar optical phonon, polar optical phonon and Coulomb scattering are considered. Coulomb scattering is treated in real space using the particle-particle-particle-mesh (P3M) approach. The third task is coupling the bulk full-band solver with a 3D Poisson equation solver to generate a full-band device simulator.
For proof-of-concept of the methodology adopted here, a 3D resistor is simulated first. From the resistor simulations, the low-field electron mobility dependence upon Coulomb scattering in 4H-SiC devices is extracted. The simulated mobility results agree very well with available experimental data. Next, a 3D VDMOS is simulated. The nature of the physical processes occurring in both steady-state and transient conditions are revealed for the two generations of 3D VDMOS devices being considered in the study.
Due to its comprehensive nature, the developed tool serves as a basis for future investigation of 4H-SiC power devices.
Unfortunately, commercial TCAD tools like Sentaurus and Silvaco Atlas are based on the effective mass approximation, while most 4H-SiC devices are not operated under low electric field, so the parabolic-like band approximation does not hold anymore. Hence, to get more accurate and reliable simulation results, full-band analysis is needed. The first step in the development of a full-band device simulator is the calculation of the band structure. In this work, the empirical pseudopotential method (EPM) is adopted. The next task in the sequence is the calculation of the scattering rates. Acoustic, non-polar optical phonon, polar optical phonon and Coulomb scattering are considered. Coulomb scattering is treated in real space using the particle-particle-particle-mesh (P3M) approach. The third task is coupling the bulk full-band solver with a 3D Poisson equation solver to generate a full-band device simulator.
For proof-of-concept of the methodology adopted here, a 3D resistor is simulated first. From the resistor simulations, the low-field electron mobility dependence upon Coulomb scattering in 4H-SiC devices is extracted. The simulated mobility results agree very well with available experimental data. Next, a 3D VDMOS is simulated. The nature of the physical processes occurring in both steady-state and transient conditions are revealed for the two generations of 3D VDMOS devices being considered in the study.
Due to its comprehensive nature, the developed tool serves as a basis for future investigation of 4H-SiC power devices.
ContributorsCheng, Chi-Yin (Author) / Vasileska, Dragica (Thesis advisor) / Goodnick, Stephen M (Thesis advisor) / Ponce, Fernando (Committee member) / Zhao, Yuji (Committee member) / Arizona State University (Publisher)
Created2020
Description
Wide-BandGap (WBG) material-based switching devices such as gallium nitride (GaN) High Electron Mobility Transistors (HEMTs) and Silicon Carbide (SiC) Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs) are considered very promising and valuable candidates for replacing conventional Silicon (Si) MOSFETs in various industrial high-frequency high-power applications, mainly because of their capabilities of higher switching frequencies with less switching and conduction losses. However, to make the most of their advantages, it is crucial to understand the intrinsic differences between WBG-based and Si-based switching devices and investigate effective means to safely, efficiently, and reliably utilize the WBG devices. Firstly, a comprehensive understanding of traditional Modular Multilevel Converter (MMC) topology is presented. Different novel SubModule (SM) topologies are described in detail. The low frequency SM voltage fluctuation problem is also discussed. Based on the analysis, some novel topologies which manage to damp or eliminate the voltage ripple are illustrated in detail. As demonstrated, simulation results of these proposed topologies verify the theory. Moreover, the hardware design considerations of traditional MMC platform are discussed. Based on these, a 6 kW smart Modular Isolated Multilevel Converter (MIMC) with symmetrical resonant converter based Ripple current elimination channels is delivered and related experimental results further verify the effectiveness of proposed topology. Secondly, the evolution of GaN transistor structure, from classical normally-on device to normally-off GaN, is well-described. As the benefits, channel current capability and drain-source voltage are significantly boosted. However, accompanying the evolution of GaN devices, the dynamic on-resistance issue is one of the urgent problems to be solved since it strongly affects the GaN device current and voltage limit. Unlike traditional methods from the perspective of transistor structure, this report proposes a novel Multi-Level-Voltage-Output gate drive circuit (MVO-GD) aimed at alleviating the dynamic on-resistance issue from engineering point of view. The comparative tests of proposed MVO-GD and the standard 2-level gate driver (STD-GD) are conducted under variable test conditions which may affect dynamic on-resistance, such as drain-source voltage, gate current width, device package temperature and so on. The experimental waveforms and data have been demonstrated and analyzed.
ContributorsLIU, YIFU (Author) / Lei, Qin (Thesis advisor) / Ayyanar, Raja (Committee member) / Ranjram, Mike (Committee member) / Mallik, Ayan (Committee member) / Arizona State University (Publisher)
Created2022