Matching Items (467)
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- All Subjects: Guitar music
ContributorsChan, Robbie (Performer) / McCarrel, Kyla (Performer) / Sadownik, Stephanie (Performer) / ASU Library. Music Library (Contributor)
Created2018-04-18
ContributorsMayo, Joshua (Contributor) / Betts, Sarah (Performer) / Cericola, Marco (Performer) / Gonzalez, Nikolas (Performer) / ASU Library. Music Library (Publisher)
Created2021-04-28
Description
Whenever a text is transmitted, or communicated by any means, variations may occur because editors, copyists, and performers are often not careful enough with the source itself. As a result, a flawed text may come to be accepted in good faith through repetition, and may often be preferred over the authentic version because familiarity with the flawed copy has been established. This is certainly the case with regard to Manuel M. Ponce's guitar editions. An inexact edition of a musical work is detrimental to several key components of its performance: musical interpretation, aesthetics, and the original musical concept of the composer. These phenomena may be seen in the case of Manuel Ponce's Suite in D Major for guitar. The single published edition by Peer International Corporation in 1967 with the revision and fingering of Manuel López Ramos contains many copying mistakes and intentional, but unauthorized, changes to the original composition. For the present project, the present writer was able to obtain a little-known copy of the original manuscript of this work, and to document these discrepancies in order to produce a new performance edition that is more closely based on Ponce's original work.
ContributorsReyes Paz, Ricardo (Author) / Koonce, Frank (Thesis advisor) / Solis, Theodore (Committee member) / Rotaru, Catalin (Committee member) / Arizona State University (Publisher)
Created2013
ContributorsDaval, Charles (Performer) / ASU Library. Music Library (Publisher)
Created2018-03-26
Description
A new type of Ethernet switch based on the PCI Express switching fabric is being presented. The switch leverages PCI Express peer-to-peer communication protocol to implement high performance Ethernet packet switching. The advantages and challenges of using the PCI Express as the switching fabric are addressed. The PCI Express is a high-speed short-distance communication protocol largely used in motherboard-level interconnects. The total bandwidth of a PCI Express 3.0 link can reach as high as 256 gigabit per second (Gb/s) per 16 lanes. Concerns for PCI Express such as buffer speed, address mapping, Quality of Service and power consumption need to be considered. An overview of the proposed Ethernet switch architecture is presented. The switch consists of a PCI Express switching fabric and multiple adaptor cards. The thesis reviews the peer-to-peer (P2P) communication protocol used in the switching fabric. The thesis also discusses the packet routing procedure in P2P protocol in detail. The Ethernet switch utilizes a portion of the Quality of Service provided with PCI Express to ensure guaranteed transmission. The thesis presents a method of adapting Ethernet packets over the PCI Express transaction layer packets. The adaptor card is divided into the following two parts: receive path and transmit path. The commercial off-the-shelf Media Access Control (MAC) core and PCI Express endpoint core are used in the adaptor. The output address lookup logic block is responsible for converting Ethernet MAC addresses to PCI Express port addresses. Different methods of providing Quality of Service in the adaptor card include classification, flow control, and error detection with the cooperation of the PCI Express switch are discussed. The adaptor logic is implemented in Verilog hardware description language. Functional simulation is conducted in ModelSim. The simulation results show that the Ethernet packets are able to be converted to the corresponding PCI Express transaction layer packets based on their destination MAC addresses. The transaction layer packets are then converted back to Ethernet packets. A functionally correct FPGA logic of the adaptor card is ready for implementation on real FPGA development board.
ContributorsChen, Caiyi (Author) / Hui, Joseph (Thesis advisor) / Reisslein, Martin (Committee member) / Zhang, Yanchao (Committee member) / Arizona State University (Publisher)
Created2012
ContributorsMayo, Joshua (Performer) / ASU Library. Music Library (Publisher)
Created2021-04-29
ContributorsDominguez, Ramon (Performer) / ASU Library. Music Library (Publisher)
Created2021-04-15
ContributorsWhite, Bill (Performer) / ASU Library. Music Library (Publisher)
Created2021-04-03
ContributorsSanchez, Armand (Performer) / Nordstrom, Nathan (Performer) / Roubison, Ryan (Performer) / ASU Library. Music Library (Publisher)
Created2018-04-13