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Description
Transmission line capacity is an obstacle for the utilities because there is a load increment annually, and new power plants are being connected, which requires an update. Energy router (ER) is a device that provides an additional degree of freedom to the utilities by controlling the reactive power. The ER reactive power injection is demonstrated by changing the line's reactance value to increase its capacity and give the utility a deferral time for the project upgrade date. Changing the reactance manually and attaching Smart Wire's device to the branches have effectively solved the overload in three locations of a local utility in Arizona (LUA) system.
Furthermore, electric vehicle charging stations (EVCSs) have been increasing to meet EV needs, which calls for an optimal planning model to maximize the profits. The model must consider both the transportation and power systems to avoid damages and costly operation. Instead of coupling the transportation and power systems, EVCS records have been analyzed to fill the gap of EV demand. For example, by accessing charging station records, the moment knowledge of EV demand, especially in the lower order, can be found. Theoretically, the obtained low-order moment knowledge of EV demand is equivalent to a second-order cone constraint, which is proved. Based on such characteristics, a chance-constrained (CC) stochastic integer program for the planning problem is formulated. For planning EV charging stations with ER, this method develops a simple ER model to investigate the interaction between the mobile placement of power flow controller and the daily pattern of EV power demand.
Furthermore, electric vehicle charging stations (EVCSs) have been increasing to meet EV needs, which calls for an optimal planning model to maximize the profits. The model must consider both the transportation and power systems to avoid damages and costly operation. Instead of coupling the transportation and power systems, EVCS records have been analyzed to fill the gap of EV demand. For example, by accessing charging station records, the moment knowledge of EV demand, especially in the lower order, can be found. Theoretically, the obtained low-order moment knowledge of EV demand is equivalent to a second-order cone constraint, which is proved. Based on such characteristics, a chance-constrained (CC) stochastic integer program for the planning problem is formulated. For planning EV charging stations with ER, this method develops a simple ER model to investigate the interaction between the mobile placement of power flow controller and the daily pattern of EV power demand.
ContributorsAlali, Yousef (Author) / Weng, Yang (Thesis advisor) / Cui, Qiushi (Committee member) / Holbert, Keith E. (Committee member) / Arizona State University (Publisher)
Created2020
Description
A Single Event Transient (SET) is a transient voltage pulse induced by an ionizing radiation particle striking a combinational logic node in a circuit. The probability of a storage element capturing the transient pulse depends on the width of the pulse. Measuring the rate of occurrence and the distribution of SET pulse widths is essential to understand the likelihood of soft errors and to develop cost-effective mitigation schemes. Existing research measures the pulse width of SETs in bulk Complementary Metal-Oxide-Semiconductor (CMOS) and Silicon On Insulator (SOI) technologies, but not on Fin Field-Effect Transistors (FinFETs). This thesis focuses on developing a test structure on the FinFET process to generate, propagate, and separate SETs and build a time-to-digital converter to measure the pulse width of SET.
The proposed SET test structure statistically separates SETs generated at NMOS and PMOS based on the difference in restoring current. It consists of N-collection devices to collect events at NMOS and P-collection devices to collect events at PMOS. The events that occur in PMOS of the N-collection device and NMOS of the P-collection device are false events. The logic gates of the collection devices are skewed to perform pulse expansion so that a minimally sustained SET propagates without getting suppressed by the contamination delay. A symmetric tree structure with an S-R latch event detector localizes the location of the SET. The Cartesian coordinates-based pulse injection structure injects external pulses at specific nodes to perform instrumentation and calibrate the measurement. A thermometer-encoded chain (vernier chain) with mismatched delay paths measures the width of the SET.
For low Linear Energy Transfer (LET) tests, the false events are entirely masked and do not propagate since the amount of charge that has to be deposited for successful event propagation is significantly high. In the case of high LET tests, the actual events and false events propagate, but they can be separated based on the SET location and the width of the output event. The vernier chain has a high measurement resolution of ~3.5ps, which aids in separating the events.
The proposed SET test structure statistically separates SETs generated at NMOS and PMOS based on the difference in restoring current. It consists of N-collection devices to collect events at NMOS and P-collection devices to collect events at PMOS. The events that occur in PMOS of the N-collection device and NMOS of the P-collection device are false events. The logic gates of the collection devices are skewed to perform pulse expansion so that a minimally sustained SET propagates without getting suppressed by the contamination delay. A symmetric tree structure with an S-R latch event detector localizes the location of the SET. The Cartesian coordinates-based pulse injection structure injects external pulses at specific nodes to perform instrumentation and calibrate the measurement. A thermometer-encoded chain (vernier chain) with mismatched delay paths measures the width of the SET.
For low Linear Energy Transfer (LET) tests, the false events are entirely masked and do not propagate since the amount of charge that has to be deposited for successful event propagation is significantly high. In the case of high LET tests, the actual events and false events propagate, but they can be separated based on the SET location and the width of the output event. The vernier chain has a high measurement resolution of ~3.5ps, which aids in separating the events.
ContributorsShreedharan, Sanjay (Author) / Brunhaver, John (Thesis advisor) / Clark, Lawrence (Committee member) / Sanchez Esqueda, Ivan (Committee member) / Arizona State University (Publisher)
Created2020
Description
With the push for integration, a slew of modern switching power management circuits are operating at higher switching frequencies in order to reduce passive filter sizes. But while these switching regulators provide power conversion at high efficiencies, their output is prone to ripples due to the inherent switching behavior. These switching regulators use linear-low dropout regulators (LDOs) downstream to provide clean supplies. Typically, these LDOs have good power supply rejection (PSR) at lower frequencies but this degrades at higher frequencies. Therefore, some residual ripple is still manifested on the output. Because of this, high power supply rejection (PSR) with a wide rejection frequency band is becoming a critical requirement in linear low-dropout regulators (LDOs) used in complex systems- on-chip (SOCs).
Typical LDOs achieve higher PSR within their loop-bandwidth; however, their supply rejection performance degrades with reduced loop-gain outside their loop- bandwidth. The LDOs with external filtering capacitors may also have spectral peaking in their PSR response, causing excess system- level supply noise. This work presents an LDO design approach, which achieves a PSR of higher than 68 dB up to 2 MHz frequency and over a wide range of loads up to 250 mA. The wide PSR bandwidth is achieved using a current-mode feedforward ripple canceller (CFFRC) amplifier which provides up to 25 dB of PSR improvement. The feedforward path gain is inherently matched to the forward gain of the LDO, not requiring calibration. The LDO has a fast load transient response with a recovery time of 6.1μs and has a quiescent current of 5.6μA. For a full load transition, the LDO achieves settling with overshoot and undershoot voltages below 27.6 mV and 36.36 mV, respectively. The LDO is designed and fabricated in a 180 nm bipolar/CMOS/DMOS (BCD) technology. The CFFRC amplifier helps to achieve low quiescent power due to its inherent current mode nature, eliminating the need for supply ripple summing amplifiers and adaptive biasing.
Typical LDOs achieve higher PSR within their loop-bandwidth; however, their supply rejection performance degrades with reduced loop-gain outside their loop- bandwidth. The LDOs with external filtering capacitors may also have spectral peaking in their PSR response, causing excess system- level supply noise. This work presents an LDO design approach, which achieves a PSR of higher than 68 dB up to 2 MHz frequency and over a wide range of loads up to 250 mA. The wide PSR bandwidth is achieved using a current-mode feedforward ripple canceller (CFFRC) amplifier which provides up to 25 dB of PSR improvement. The feedforward path gain is inherently matched to the forward gain of the LDO, not requiring calibration. The LDO has a fast load transient response with a recovery time of 6.1μs and has a quiescent current of 5.6μA. For a full load transition, the LDO achieves settling with overshoot and undershoot voltages below 27.6 mV and 36.36 mV, respectively. The LDO is designed and fabricated in a 180 nm bipolar/CMOS/DMOS (BCD) technology. The CFFRC amplifier helps to achieve low quiescent power due to its inherent current mode nature, eliminating the need for supply ripple summing amplifiers and adaptive biasing.
ContributorsJoshi, Kishan (Author) / Bakkaloglu, Bertan (Thesis advisor) / Garrity, Douglas (Committee member) / Seo, Jae-Sun (Committee member) / Kitchen, Jennifer (Committee member) / Arizona State University (Publisher)
Created2020
Description
Movement disorders are becoming one of the leading causes of functional disability due to aging populations and extended life expectancy. Diagnosis, treatment, and rehabilitation currently depend on the behavior observed in a clinical environment. After the patient leaves the clinic, there is no standard approach to continuously monitor the patient and report potential problems. Furthermore, self-recording is inconvenient and unreliable. To address these challenges, wearable health monitoring is emerging as an effective way to augment clinical care for movement disorders.
Wearable devices are being used in many health, fitness, and activity monitoring applications. However, their widespread adoption has been hindered by several adaptation and technical challenges. First, conventional rigid devices are uncomfortable to wear for long periods. Second, wearable devices must operate under very low-energy budgets due to their small battery capacities. Small batteries create a need for frequent recharging, which in turn leads users to stop using them. Third, the usefulness of wearable devices must be demonstrated through high impact applications such that users can get value out of them.
This dissertation presents solutions to solving the challenges faced by wearable devices. First, it presents an open-source hardware/software platform for wearable health monitoring. The proposed platform uses flexible hybrid electronics to enable devices that conform to the shape of the user’s body. Second, it proposes an algorithm to enable recharge-free operation of wearable devices that harvest energy from the environment. The proposed solution maximizes the performance of the wearable device under minimum energy constraints. The results of the proposed algorithm are, on average, within 3% of the optimal solution computed offline. Third, a comprehensive framework for human activity recognition (HAR), one of the first steps towards a solution for movement disorders is presented. It starts with an online learning framework for HAR. Experiments on a low power IoT device (TI-CC2650 MCU) with twenty-two users show 95% accuracy in identifying seven activities and their transitions with less than 12.5 mW power consumption. The online learning framework is accompanied by a transfer learning approach for HAR that determines the number of neural network layers to transfer among uses to enable efficient online learning. Next, a technique to co-optimize the accuracy and active time of wearable applications by utilizing multiple design points with different energy-accuracy trade-offs is presented. The proposed technique switches between the design points at runtime to maximize a generalized objective function under tight harvested energy budget constraints. Finally, we present the first ultra-low-energy hardware accelerator that makes it practical to perform HAR on energy harvested from wearable devices. The accelerator consumes 22.4 microjoules per operation using a commercial 65 nm technology. In summary, the solutions presented in this dissertation can enable the wider adoption of wearable devices.
Wearable devices are being used in many health, fitness, and activity monitoring applications. However, their widespread adoption has been hindered by several adaptation and technical challenges. First, conventional rigid devices are uncomfortable to wear for long periods. Second, wearable devices must operate under very low-energy budgets due to their small battery capacities. Small batteries create a need for frequent recharging, which in turn leads users to stop using them. Third, the usefulness of wearable devices must be demonstrated through high impact applications such that users can get value out of them.
This dissertation presents solutions to solving the challenges faced by wearable devices. First, it presents an open-source hardware/software platform for wearable health monitoring. The proposed platform uses flexible hybrid electronics to enable devices that conform to the shape of the user’s body. Second, it proposes an algorithm to enable recharge-free operation of wearable devices that harvest energy from the environment. The proposed solution maximizes the performance of the wearable device under minimum energy constraints. The results of the proposed algorithm are, on average, within 3% of the optimal solution computed offline. Third, a comprehensive framework for human activity recognition (HAR), one of the first steps towards a solution for movement disorders is presented. It starts with an online learning framework for HAR. Experiments on a low power IoT device (TI-CC2650 MCU) with twenty-two users show 95% accuracy in identifying seven activities and their transitions with less than 12.5 mW power consumption. The online learning framework is accompanied by a transfer learning approach for HAR that determines the number of neural network layers to transfer among uses to enable efficient online learning. Next, a technique to co-optimize the accuracy and active time of wearable applications by utilizing multiple design points with different energy-accuracy trade-offs is presented. The proposed technique switches between the design points at runtime to maximize a generalized objective function under tight harvested energy budget constraints. Finally, we present the first ultra-low-energy hardware accelerator that makes it practical to perform HAR on energy harvested from wearable devices. The accelerator consumes 22.4 microjoules per operation using a commercial 65 nm technology. In summary, the solutions presented in this dissertation can enable the wider adoption of wearable devices.
ContributorsBhat, Ganapati (Author) / Ogras, Umit Y. (Thesis advisor) / Chakrabarti, Chaitali (Committee member) / Nedić, Angelia (Committee member) / Marculescu, Radu (Committee member) / Arizona State University (Publisher)
Created2020
Description
The electric power system (EPS) is an extremely complex system that has operational interdependencies with the water delivery and treatment system (WDTS). The term water-energy nexus is commonly used to describe the critical interdependencies that naturally exist between the EPS and water distribution systems (WDS). Presented in this work is a framework for simulating interactions between these two critical infrastructure systems in short-term and long-term time-scales. This includes appropriate mathematical models for system modeling and for optimizing control of power system operation with consideration of conditions in the WDS. Also presented is a complete methodology for quantifying the resilience of the two interdependent systems.
The key interdependencies between the two systems are the requirements of water for the cooling cycle of traditional thermal power plants as well as electricity for pumping and/or treatment in the WDS. While previous work has considered the dependency of thermoelectric generation on cooling water requirements at a high-level, this work considers the impact from limitations of cooling water into network simulations in both a short-term operational framework as well as in the long-term planning domain.
The work completed to set-up simulations in operational length time-scales was the development of a simulator that adequately models both systems. This simulation engine also facilitates the implementation of control schemes in both systems that take advantage of the knowledge of operating conditions in the other system. Initial steps for including the influence of anticipated water availability and water rights attainability within the combined generation and transmission expansion planning problem is also presented. Lastly, the framework for determining the infrastructural-operational resilience (IOR) of the interdependent systems is formulated.
Adequately modeling and studying the two systems and their interactions is becoming critically important. This importance is illustrated by the possibility of unforeseen natural or man-made events or by the likelihood of load increase in the systems, either of which has the risk of putting extreme stress on the systems beyond that experienced in normal operating conditions. Therefore, this work addresses these concerns with novel modeling and control/policy strategies designed to mitigate the severity of extreme conditions in either system.
The key interdependencies between the two systems are the requirements of water for the cooling cycle of traditional thermal power plants as well as electricity for pumping and/or treatment in the WDS. While previous work has considered the dependency of thermoelectric generation on cooling water requirements at a high-level, this work considers the impact from limitations of cooling water into network simulations in both a short-term operational framework as well as in the long-term planning domain.
The work completed to set-up simulations in operational length time-scales was the development of a simulator that adequately models both systems. This simulation engine also facilitates the implementation of control schemes in both systems that take advantage of the knowledge of operating conditions in the other system. Initial steps for including the influence of anticipated water availability and water rights attainability within the combined generation and transmission expansion planning problem is also presented. Lastly, the framework for determining the infrastructural-operational resilience (IOR) of the interdependent systems is formulated.
Adequately modeling and studying the two systems and their interactions is becoming critically important. This importance is illustrated by the possibility of unforeseen natural or man-made events or by the likelihood of load increase in the systems, either of which has the risk of putting extreme stress on the systems beyond that experienced in normal operating conditions. Therefore, this work addresses these concerns with novel modeling and control/policy strategies designed to mitigate the severity of extreme conditions in either system.
ContributorsZuloaga, Scott (Author) / Vittal, Vijay (Thesis advisor) / Zhang, Junshan (Committee member) / Mays, Larry (Committee member) / Wu, Meng (Committee member) / Arizona State University (Publisher)
Created2020
Description
This thesis introduces a new robotic leg design with three degrees of freedom that
can be adapted for both bipedal and quadrupedal locomotive systems, and serves as
a blueprint for designers attempting to create low cost robot legs capable of balancing
and walking. Currently, bipedal leg designs are mostly rigid and have not strongly
taken into account the advantages/disadvantages of using an active ankle, as opposed
to a passive ankle, for balancing. This design uses low-cost compliant materials, but
the materials used are thick enough to mimic rigid properties under low stresses, so
this paper will treat the links as rigid materials. A new leg design has been created
that contains three degrees of freedom that can be adapted to contain either a passive
ankle using springs, or an actively controlled ankle using an additional actuator. This
thesis largely aims to focus on the ankle and foot design of the robot and the torque
and speed requirements of the design for motor selection. The dynamics of the system,
including height, foot width, weight, and resistances will be analyzed to determine
how to improve design performance. Model-based control techniques will be used to
control the angle of the leg for balancing. In doing so, it will also be shown that it
is possible to implement model-based control techniques on robots made of laminate
materials.
can be adapted for both bipedal and quadrupedal locomotive systems, and serves as
a blueprint for designers attempting to create low cost robot legs capable of balancing
and walking. Currently, bipedal leg designs are mostly rigid and have not strongly
taken into account the advantages/disadvantages of using an active ankle, as opposed
to a passive ankle, for balancing. This design uses low-cost compliant materials, but
the materials used are thick enough to mimic rigid properties under low stresses, so
this paper will treat the links as rigid materials. A new leg design has been created
that contains three degrees of freedom that can be adapted to contain either a passive
ankle using springs, or an actively controlled ankle using an additional actuator. This
thesis largely aims to focus on the ankle and foot design of the robot and the torque
and speed requirements of the design for motor selection. The dynamics of the system,
including height, foot width, weight, and resistances will be analyzed to determine
how to improve design performance. Model-based control techniques will be used to
control the angle of the leg for balancing. In doing so, it will also be shown that it
is possible to implement model-based control techniques on robots made of laminate
materials.
ContributorsShafa, Taha A (Author) / Aukes, Daniel M (Thesis advisor) / Rogers, Bradley (Committee member) / Zhang, Wenlong (Committee member) / Arizona State University (Publisher)
Created2020
Description
Detecting areas of change between two synthetic aperture radar (SAR) images of the same scene, taken at different times is generally performed using two approaches. Non-coherent change detection is performed using the sample variance ratio detector, and displays a good performance in detecting areas of significant changes. Coherent change detection can be implemented using the classical coherence estimator, which does better at detecting subtle changes, like vehicle tracks. A two-stage detector was proposed by Cha et al., where the sample variance ratio forms the first stage, and the second stage comprises of Berger's alternative coherence estimator.
A modification to the first stage of the two-stage detector is proposed in this study, which significantly simplifies the analysis of the this detector. Cha et al. have used a heuristic approach to determine the thresholds for this two-stage detector. In this study, the probability density function for the modified two-stage detector is derived, and using this probability density function, an approach for determining the thresholds for this two-dimensional detection problem has been proposed. The proposed method of threshold selection reveals an interesting behavior shown by the two-stage detector. With the help of theoretical receiver operating characteristic analysis, it is shown that the two-stage detector gives a better detection performance as compared to the other three detectors. However, the Berger's estimator proves to be a simpler alternative, since it gives only a slightly poorer performance as compared to the two-stage detector. All the four detectors have also been implemented on a SAR data set, and it is shown that the two-stage detector and the Berger's estimator generate images where the areas showing change are easily visible.
A modification to the first stage of the two-stage detector is proposed in this study, which significantly simplifies the analysis of the this detector. Cha et al. have used a heuristic approach to determine the thresholds for this two-stage detector. In this study, the probability density function for the modified two-stage detector is derived, and using this probability density function, an approach for determining the thresholds for this two-dimensional detection problem has been proposed. The proposed method of threshold selection reveals an interesting behavior shown by the two-stage detector. With the help of theoretical receiver operating characteristic analysis, it is shown that the two-stage detector gives a better detection performance as compared to the other three detectors. However, the Berger's estimator proves to be a simpler alternative, since it gives only a slightly poorer performance as compared to the two-stage detector. All the four detectors have also been implemented on a SAR data set, and it is shown that the two-stage detector and the Berger's estimator generate images where the areas showing change are easily visible.
ContributorsBondre, Akshay Sunil (Author) / Richmond, Christ D (Thesis advisor) / Papandreou-Suppappola, Antonia (Committee member) / Bliss, Daniel W (Committee member) / Arizona State University (Publisher)
Created2020
Description
This thesis presents efficient implementations of several linear algebra kernels, machine learning kernels and a neural network based recommender systems engine onto a massively parallel reconfigurable architecture, Transformer. The linear algebra kernels include Triangular Matrix Solver (TRSM), LU Decomposition (LUD), QR Decomposition (QRD), and Matrix Inversion. The machine learning kernels include an LSTM (Long Short Term Memory) cell, and a GRU (gated Recurrent Unit) cell used in recurrent neural networks. The neural network based recommender systems engine consists of multiple kernels including fully connected layers, embedding layer, 1-D batchnorm, Adam optimizer, etc.
Transformer is a massively parallel reconfigurable multicore architecture designed at the University of Michigan. The Transformer configuration considered here is 4 tiles and 16 General Processing Elements (GPEs) per tile. It supports a two level cache hierarchy where the L1 and L2 caches can operate in shared (S) or private (P) modes. The architecture was modeled using Gem5 and cycle accurate simulations were done to evaluate the performance in terms of execution times, giga-operations per second per Watt (GOPS/W), and giga-floating-point-operations per second per Watt (GFLOPS/W).
This thesis shows that for linear algebra kernels, each kernel achieves high performance for a certain cache mode and that this cache mode can change when the matrix size changes. For instance, for smaller matrix sizes, L1P, L2P cache mode is best for TRSM, while L1S, L2S is the best cache mode for LUD, and L1P, L2S is the best for QRD. For each kernel, the optimal cache mode changes when the matrix size is increased. For instance, for TRSM, the L1P, L2P cache mode is best for smaller matrix sizes ($N=64, 128, 256, 512$) and it changes to L1S, L2P for larger matrix sizes ($N=1024$). For machine learning kernels, L1P, L2P is the best cache mode for all network parameter sizes.
Gem5 simulations show that the peak performance for TRSM, LUD, QRD and Matrix Inverse in the 14nm node is 97.5, 59.4, 133.0 and 83.05 GFLOPS/W, respectively. For LSTM and GRU, the peak performance is 44.06 and 69.3 GFLOPS/W.
The neural network based recommender system was implemented in L1S, L2S cache mode. It includes a forward pass and a backward pass and is significantly more complex in terms of both computational complexity and data movement. The most computationally intensive block is the fully connected layer followed by Adam optimizer. The overall performance of the recommender systems engine is 54.55 GFLOPS/W and 169.12 GOPS/W.
Transformer is a massively parallel reconfigurable multicore architecture designed at the University of Michigan. The Transformer configuration considered here is 4 tiles and 16 General Processing Elements (GPEs) per tile. It supports a two level cache hierarchy where the L1 and L2 caches can operate in shared (S) or private (P) modes. The architecture was modeled using Gem5 and cycle accurate simulations were done to evaluate the performance in terms of execution times, giga-operations per second per Watt (GOPS/W), and giga-floating-point-operations per second per Watt (GFLOPS/W).
This thesis shows that for linear algebra kernels, each kernel achieves high performance for a certain cache mode and that this cache mode can change when the matrix size changes. For instance, for smaller matrix sizes, L1P, L2P cache mode is best for TRSM, while L1S, L2S is the best cache mode for LUD, and L1P, L2S is the best for QRD. For each kernel, the optimal cache mode changes when the matrix size is increased. For instance, for TRSM, the L1P, L2P cache mode is best for smaller matrix sizes ($N=64, 128, 256, 512$) and it changes to L1S, L2P for larger matrix sizes ($N=1024$). For machine learning kernels, L1P, L2P is the best cache mode for all network parameter sizes.
Gem5 simulations show that the peak performance for TRSM, LUD, QRD and Matrix Inverse in the 14nm node is 97.5, 59.4, 133.0 and 83.05 GFLOPS/W, respectively. For LSTM and GRU, the peak performance is 44.06 and 69.3 GFLOPS/W.
The neural network based recommender system was implemented in L1S, L2S cache mode. It includes a forward pass and a backward pass and is significantly more complex in terms of both computational complexity and data movement. The most computationally intensive block is the fully connected layer followed by Adam optimizer. The overall performance of the recommender systems engine is 54.55 GFLOPS/W and 169.12 GOPS/W.
ContributorsSoorishetty, Anuraag (Author) / Chakrabarti, Chaitali (Thesis advisor) / Kim, Hun Seok (Committee member) / LiKamWa, Robert (Committee member) / Arizona State University (Publisher)
Created2019
Description
Power management integrated circuit (PMIC) design is a key module in almost all electronics around us such as Phones, Tablets, Computers, Laptop, Electric vehicles, etc. The on-chip loads such as microprocessors cores, memories, Analog/RF, etc. requires multiple supply voltage domains. Providing these supply voltages from off-chip voltage regulators will increase the overall system cost and limits the performance due to the board and package parasitics. Therefore, an on-chip fully integrated voltage regulator (FIVR) is required.
The dissertation presents a topology for a fully integrated power stage in a DC-DC buck converter achieving a high-power density and a time-domain hysteresis based highly integrated buck converter. A multi-phase time-domain comparator is proposed in this work for implementing the hysteresis control, thereby achieving a process scaling friendly highly digital design. A higher-order LC notch filter along with a flying capacitor which couples the input and output voltage ripple is implemented. The power stage operates at 500 MHz and can deliver a maximum power of 1.0 W and load current of 1.67 A, while occupying 1.21 mm2 active die area. Thus achieving a power density of 0.867 W/mm2 and current density of 1.377 A/mm2. The peak efficiency obtained is 71% at 780 mA of load current. The power stage with the additional off-chip LC is utilized to design a highly integrated current mode hysteretic buck converter operating at 180 MHz. It achieves 20 ns of settling and 2-5 ns of rise/fall time for reference tracking.
The second part of the dissertation discusses an integrated low voltage switched-capacitor based power sensor, to measure the output power of a DC-DC boost converter. This approach results in a lower complexity, area, power consumption, and a lower component count for the overall PV MPPT system. Designed in a 180 nm CMOS process, the circuit can operate with a supply voltage of 1.8 V. It achieves a power sense accuracy of 7.6%, occupies a die area of 0.0519 mm2, and consumes 0.748 mW of power.
The dissertation presents a topology for a fully integrated power stage in a DC-DC buck converter achieving a high-power density and a time-domain hysteresis based highly integrated buck converter. A multi-phase time-domain comparator is proposed in this work for implementing the hysteresis control, thereby achieving a process scaling friendly highly digital design. A higher-order LC notch filter along with a flying capacitor which couples the input and output voltage ripple is implemented. The power stage operates at 500 MHz and can deliver a maximum power of 1.0 W and load current of 1.67 A, while occupying 1.21 mm2 active die area. Thus achieving a power density of 0.867 W/mm2 and current density of 1.377 A/mm2. The peak efficiency obtained is 71% at 780 mA of load current. The power stage with the additional off-chip LC is utilized to design a highly integrated current mode hysteretic buck converter operating at 180 MHz. It achieves 20 ns of settling and 2-5 ns of rise/fall time for reference tracking.
The second part of the dissertation discusses an integrated low voltage switched-capacitor based power sensor, to measure the output power of a DC-DC boost converter. This approach results in a lower complexity, area, power consumption, and a lower component count for the overall PV MPPT system. Designed in a 180 nm CMOS process, the circuit can operate with a supply voltage of 1.8 V. It achieves a power sense accuracy of 7.6%, occupies a die area of 0.0519 mm2, and consumes 0.748 mW of power.
ContributorsSingh, Shrikant (Author) / Kiaei, Sayfe (Thesis advisor) / Bakkaloglu, Bertan (Thesis advisor) / Kitchen, Jennifer (Committee member) / Song, Hongjiang (Committee member) / Arizona State University (Publisher)
Created2019
Description
The availability of bulk gallium nitride (GaN) substrates has generated great interest in the development of vertical GaN-on-GaN power devices. The vertical devices made of GaN have not been able to reach their true potential due to material growth related issues. Power devices typically have patterned p-n, and p-i junctions in lateral, and vertical direction relative to the substrate. Identifying the variations from the intended layer design is crucial for failure analysis of the devices. A most commonly used dopant profiling technique, secondary ion mass spectroscopy (SIMS), does not have the spatial resolution to identify the dopant distribution in patterned devices. The possibility of quantitative dopant profiling at a sub-micron scale for GaN in a scanning electron microscope (SEM) is discussed. The total electron yield in an SEM is shown to be a function of dopant concentration which can potentially be used for quantitative dopant profiling.
Etch-and-regrowth is a commonly employed strategy to generate the desired patterned p-n and p-i junctions. The devices involving etch-and-regrowth have poor performance characteristics like high leakage currents, and lower breakdown voltages. This is due to damage induced by the dry etching process, and the nature of the regrowth interface, which is important to understand in order to address the key issue of leakage currents in etched and regrown devices. Electron holography is used for electrostatic potential profiling across the regrowth interfaces to identify the charges introduced by the etching process. SIMS is used to identify the impurities introduced at the interfaces due to etch-and-regrowth process.
Etch-and-regrowth is a commonly employed strategy to generate the desired patterned p-n and p-i junctions. The devices involving etch-and-regrowth have poor performance characteristics like high leakage currents, and lower breakdown voltages. This is due to damage induced by the dry etching process, and the nature of the regrowth interface, which is important to understand in order to address the key issue of leakage currents in etched and regrown devices. Electron holography is used for electrostatic potential profiling across the regrowth interfaces to identify the charges introduced by the etching process. SIMS is used to identify the impurities introduced at the interfaces due to etch-and-regrowth process.
ContributorsAlugubelli, Shanthan Reddy (Author) / Ponce, Fernando A. (Thesis advisor) / McCartney, Martha (Committee member) / Newman, Nathan (Committee member) / Zhao, Yuji (Committee member) / Arizona State University (Publisher)
Created2019