Matching Items (2)

Practicality of Multithreaded Rendering with Vulkan

Description
Vulkan is a modern, low-level, and low-overhead graphics library that allows for the distribution of work across CPU cores using multithreading. This multithreading is possible due to the near full control of the GPU that Vulkan allows. The additional control makes it possible to send multiple instructions to the GPU…

Vulkan is a modern, low-level, and low-overhead graphics library that allows for the distribution of work across CPU cores using multithreading. This multithreading is possible due to the near full control of the GPU that Vulkan allows. The additional control makes it possible to send multiple instructions to the GPU at the same time. There are a variety of techniques that can be used with Vulkan to effectively improve performance while multithreading instructions to the GPU. One of the challenges of multithreading is the lack of modern-day GPU hardware to support it, which leads to the purpose of this paper, to explore the practicality of multithreading techniques with Vulkan in today’s current computing environment.
ContributorsWahl, Ryan (Author) / Hansford, Dianne (Thesis director) / Kobayashi, Yoshihiro (Committee member) / Barrett, The Honors College (Contributor) / Computer Science and Engineering Program (Contributor)
Created2023-12
153193-Thumbnail Image.png

Enabling multi-threaded applications on hybrid shared memory manycore architectures

Description
As the number of cores per chip increases, maintaining cache coherence becomes prohibitive for both power and performance. Non Coherent Cache (NCC) architectures do away with hardware-based cache coherence, but they become difficult to program. Some existing architectures provide a middle ground by providing some shared memory in the hardware.…

As the number of cores per chip increases, maintaining cache coherence becomes prohibitive for both power and performance. Non Coherent Cache (NCC) architectures do away with hardware-based cache coherence, but they become difficult to program. Some existing architectures provide a middle ground by providing some shared memory in the hardware. Specifically, the 48-core Intel Single-chip Cloud Computer (SCC) provides some off-chip (DRAM) shared memory some on-chip (SRAM) shared memory. We call such architectures Hybrid Shared Memory, or HSM, manycore architectures. However, how to efficiently execute multi-threaded programs on HSM architectures is an open problem. To be able to execute a multi-threaded program correctly on HSM architectures, the compiler must: i) identify all the shared data and map it to the shared memory, and ii) map the frequently accessed shared data to the on-chip shared memory. This work presents a source-to-source translator written using CETUS that identifies a conservative superset of all the shared data in a multi-threaded application and maps it to the shared memory such that it enables execution on HSM architectures.
ContributorsRawat, Tushar (Author) / Shrivastava, Aviral (Thesis advisor) / Dasgupta, Partha (Committee member) / Fainekos, Georgios (Committee member) / Arizona State University (Publisher)
Created2014