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Static random-access memories (SRAM) are integral part of design systems as caches and data memories that and occupy one-third of design space. The work presents an embedded low power SRAM

Static random-access memories (SRAM) are integral part of design systems as caches and data memories that and occupy one-third of design space. The work presents an embedded low power SRAM on a triple well process that allows body-biasing control. In addition to the normal mode operation, the design is embedded with Physical Unclonable Function (PUF) [Suh07] and Sense Amplifier Test (SA Test) mode. With PUF mode structures, the fabrication and environmental mismatches in bit cells are used to generate unique identification bits.

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    Date Created
    • 2017
    Resource Type
  • Text
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    Note
    • Partial requirement for: M.S., Arizona State University, 2017
      Note type
      thesis
    • Includes bibliographical references (pages 67-69)
      Note type
      bibliography
    • Field of study: Electrical engineering

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    by Ankita Dosi

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