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The constant scaling of supply voltages in state-of-the-art CMOS processes has led to severe limitations for many analog circuit applications. Some CMOS processes have addressed this issue by adding high

The constant scaling of supply voltages in state-of-the-art CMOS processes has led to severe limitations for many analog circuit applications. Some CMOS processes have addressed this issue by adding high voltage MOSFETs to their process. Although it can be a completely viable solution, it usually requires a changing of the process flow or adding additional steps, which in turn, leads to an increase in fabrication costs.

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    Date Created
    • 2010
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  • Text
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    • Partial requirement for: Ph.D., Arizona State University, 2010
      Note type
      thesis
    • Includes bibliographical references (p. 126-129)
      Note type
      bibliography
    • Field of study: Electrical engineering

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    by William Lepkowski

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