Matching Items (75)
Description
One of the challenges in future semiconductor device design is excessive rise of power dissipation and device temperatures. With the introduction of new geometrically confined device structures like SOI, FinFET, nanowires and continuous incorporation of new materials with poor thermal conductivities in the device active region, the device thermal problem is expected to become more challenging in coming years. This work examines the degradation in the ON-current due to self-heating effects in 10 nm channel length silicon nanowire transistors. As part of this dissertation, a 3D electrothermal device simulator is developed that self-consistently solves electron Boltzmann transport equation with 3D energy balance equations for both the acoustic and the optical phonons. This device simulator predicts temperature variations and other physical and electrical parameters across the device for different bias and boundary conditions. The simulation results show insignificant current degradation for nanowire self-heating because of pronounced velocity overshoot effect. In addition, this work explores the role of various placement of the source and drain contacts on the magnitude of self-heating effect in nanowire transistors. This work also investigates the simultaneous influence of self-heating and random charge effects on the magnitude of the ON current for both positively and negatively charged single charges. This research suggests that the self-heating effects affect the ON-current in two ways: (1) by lowering the barrier at the source end of the channel, thus allowing more carriers to go through, and (2) via the screening effect of the Coulomb potential. To examine the effect of temperature dependent thermal conductivity of thin silicon films in nanowire transistors, Selberherr's thermal conductivity model is used in the device simulator. The simulations results show larger current degradation because of self-heating due to decreased thermal conductivity . Crystallographic direction dependent thermal conductivity is also included in the device simulations. Larger degradation is observed in the current along the [100] direction when compared to the [110] direction which is in agreement with the values for the thermal conductivity tensor provided by Zlatan Aksamija.
ContributorsHossain, Arif (Author) / Vasileska, Dragica (Thesis advisor) / Ahmed, Shaikh (Committee member) / Bakkaloglu, Bertan (Committee member) / Goodnick, Stephen (Committee member) / Arizona State University (Publisher)
Created2011
Description
ABSTRACT An Ensemble Monte Carlo (EMC) computer code has been developed to simulate, semi-classically, spin-dependent electron transport in quasi two-dimensional (2D) III-V semiconductors. The code accounts for both three-dimensional (3D) and quasi-2D transport, utilizing either 3D or 2D scattering mechanisms, as appropriate. Phonon, alloy, interface roughness, and impurity scattering mechanisms are included, accounting for the Pauli Exclusion Principle via a rejection algorithm. The 2D carrier states are calculated via a self-consistent 1D Schrödinger-3D-Poisson solution in which the charge distribution of the 2D carriers in the quantization direction is taken as the spatial distribution of the squared envelope functions within the Hartree approximation. The wavefunctions, subband energies, and 2D scattering rates are updated periodically by solving a series of 1D Schrödinger wave equations (SWE) over the real-space domain of the device at fixed time intervals. The electrostatic potential is updated by periodically solving the 3D Poisson equation. Spin-polarized transport is modeled via a spin density-matrix formalism that accounts for D'yakanov-Perel (DP) scattering. Also, the code allows for the easy inclusion of additional scattering mechanisms and structural modifications to devices. As an application of the simulator, the current voltage characteristics of an InGaAs/InAlAs HEMT are simulated, corresponding to nanoscale III-V HEMTs currently being fabricated by Intel Corporation. The comparative effects of various scattering parameters, material properties and structural attributes are investigated and compared with experiments where reasonable agreement is obtained. The spatial evolution of spin-polarized carriers in prototypical Spin Field Effect Transistor (SpinFET) devices is then simulated. Studies of the spin coherence times in quasi-2D structures is first investigated and compared to experimental results. It is found that the simulated spin coherence times for GaAs structures are in reasonable agreement with experiment. The SpinFET structure studied is a scaled-down version of the InGaAs/InAlAs HEMT discussed in this work, in which spin-polarized carriers are injected at the source, and the coherence length is studied as a function of gate voltage via the Rashba effect.
ContributorsTierney, Brian David (Author) / Goodnick, Stephen (Thesis advisor) / Ferry, David (Committee member) / Akis, Richard (Committee member) / Saraniti, Marco (Committee member) / Vasileska, Dragica (Committee member) / Arizona State University (Publisher)
Created2011
Description
Infrared photodetectors, used in applications for sensing and imaging, such as military target recognition, chemical/gas detection, and night vision enhancement, are predominantly comprised of an expensive II-VI material, HgCdTe. III-V type-II superlattices (SLs) have been studied as viable alternatives for HgCdTe due to the SL advantages over HgCdTe: greater control of the alloy composition, resulting in more uniform materials and cutoff wavelengths across the wafer; stronger bonds and structural stability; less expensive substrates, i.e., GaSb; mature III-V growth and processing technologies; lower band-to-band tunneling due to larger electron effective masses; and reduced Auger recombination enabling operation at higher temperatures and longer wavelengths. However, the dark current of InAs/Ga1-xInxSb SL detectors is higher than that of HgCdTe detectors and limited by Shockley-Read-Hall (SRH) recombination rather than Auger recombination. This dissertation work focuses on InAs/InAs1-xSbx SLs, another promising alternative for infrared laser and detector applications due to possible lower SRH recombination and the absence of gallium, which simplifies the SL interfaces and growth processes. InAs/InAs1-xSbx SLs strain-balanced to GaSb substrates were designed for the mid- and long-wavelength infrared (MWIR and LWIR) spectral ranges and were grown using MOCVD and MBE by various groups. Detailed characterization using high-resolution x-ray diffraction, atomic force microscopy, photoluminescence (PL), and photoconductance revealed the excellent structural and optical properties of the MBE materials. Two key material parameters were studied in detail: the valence band offset (VBO) and minority carrier lifetime. The VBO between InAs and InAs1-xSbx strained on GaSb with x = 0.28 - 0.41 was best described by Qv = ÄEv/ÄEg = 1.75 ± 0.03. Time-resolved PL experiments on a LWIR SL revealed a lifetime of 412 ns at 77 K, one order of magnitude greater than that of InAs/Ga1-xInxSb LWIR SLs due to less SRH recombination. MWIR SLs also had 100's of ns lifetimes that were dominated by radiative recombination due to shorter periods and larger wave function overlaps. These results allow InAs/InAs1-xSbx SLs to be designed for LWIR photodetectors with minority carrier lifetimes approaching those of HgCdTe, lower dark currents, and higher operating temperatures.
ContributorsSteenbergen, Elizabeth H (Author) / Zhang, Yong-Hang (Thesis advisor) / Brown, Gail J. (Committee member) / Vasileska, Dragica (Committee member) / Johnson, Shane R. (Committee member) / Arizona State University (Publisher)
Created2012
Description
A dual chamber molecular beam epitaxy (MBE) system was rebuilt for the growth of 6.1 Angstrom II-VI and III-V compound semiconductor materials that are to be used in novel optoelectronic devices that take advantage of the nearly continuous bandgap availability between 0 eV and 3.4 eV. These devices include multijunction solar cells and multicolor detectors. The MBE system upgrade involved the conversion of a former III-V chamber for II-VI growth. This required intensive cleaning of the chamber and components to prevent contamination. Special features including valved II-VI sources and the addition of a cold trap allowed for the full system to be baked to 200 degrees Celsius to improve vacuum conditions and reduce background impurity concentrations in epilayers. After the conversion, the system was carefully calibrated and optimized for the growth of ZnSe and ZnTe on GaAs (001) substrates. Material quality was assessed using X-ray diffraction rocking curves. ZnSe layers displayed a trend of improving quality with decreasing growth temperature reaching a minimum full-width half-maximum (FWHM) of 113 arcsec at 278 degrees Celsius. ZnTe epilayer quality increased with growth temperature under Zn rich conditions attaining a FWHM of 84 arcsec at 440 degrees Celsius. RHEED oscillations were successfully observed and used to obtain growth rate in situ for varying flux and temperature levels. For a fixed flux ratio, growth rate decreased with growth temperature as the desorption rate increased. A directly proportional dependence of growth rate on Te flux was observed for Zn rich growth. Furthermore, a method for determining the flux ratio necessary for attaining the stoichiometric condition was demonstrated.
ContributorsDettlaff, W. Hank G (Author) / Zhang, Yong-Hang (Thesis advisor) / Vasileska, Dragica (Committee member) / Johnson, Shane (Committee member) / Arizona State University (Publisher)
Created2012
Description
This dissertation addresses challenges pertaining to multi-junction (MJ) solar cells from material development to device design and characterization. Firstly, among the various methods to improve the energy conversion efficiency of MJ solar cells using, a novel approach proposed recently is to use II-VI (MgZnCd)(SeTe) and III-V (AlGaIn)(AsSb) semiconductors lattice-matched on GaSb or InAs substrates for current-matched subcells with minimal defect densities. CdSe/CdTe superlattices are proposed as a potential candidate for a subcell in the MJ solar cell designs using this material system, and therefore the material properties of the superlattices are studied. The high structural qualities of the superlattices are obtained from high resolution X-ray diffraction measurements and cross-sectional transmission electron microscopy images. The effective bandgap energies of the superlattices obtained from the photoluminescence (PL) measurements vary with the layer thicknesses, and are smaller than the bandgap energies of either the constituent material. Furthermore, The PL peak position measured at the steady state exhibits a blue shift that increases with the excess carrier concentration. These results confirm a strong type-II band edge alignment between CdSe and CdTe. The valence band offset between unstrained CdSe and CdTe is determined as 0.63 eV±0.06 eV by fitting the measured PL peak positions using the Kronig-Penney model. The blue shift in PL peak position is found to be primarily caused by the band bending effect based on self-consistent solutions of the Schrödinger and Poisson equations. Secondly, the design of the contact grid layout is studied to maximize the power output and energy conversion efficiency for concentrator solar cells. Because the conventional minimum power loss method used for the contact design is not accurate in determining the series resistance loss, a method of using a distributed series resistance model to maximize the power output is proposed for the contact design. It is found that the junction recombination loss in addition to the series resistance loss and shadowing loss can significantly affect the contact layout. The optimal finger spacing and maximum efficiency calculated by the two methods are close, and the differences are dependent on the series resistance and saturation currents of solar cells. Lastly, the accurate measurements of external quantum efficiency (EQE) are important for the design and development of MJ solar cells. However, the electrical and optical couplings between the subcells have caused EQE measurement artifacts. In order to interpret the measurement artifacts, DC and small signal models are built for the bias condition and the scan of chopped monochromatic light in the EQE measurements. Characterization methods are developed for the device parameters used in the models. The EQE measurement artifacts are found to be caused by the shunt and luminescence coupling effects, and can be minimized using proper voltage and light biases. Novel measurement methods using a pulse voltage bias or a pulse light bias are invented to eliminate the EQE measurement artifacts. These measurement methods are nondestructive and easy to implement. The pulse voltage bias or pulse light bias is superimposed on the conventional DC voltage and light biases, in order to control the operating points of the subcells and counterbalance the effects of shunt and luminescence coupling. The methods are demonstrated for the first time to effectively eliminate the measurement artifacts.
ContributorsLi, Jingjing (Author) / Zhang, Yong-Hang (Thesis advisor) / Tao, Meng (Committee member) / Schroder, Dieter (Committee member) / Vasileska, Dragica (Committee member) / Arizona State University (Publisher)
Created2012
Description
High-Resistivity Silicon (HRS) substrates are important for low-loss, high-performance microwave and millimeter wave devices in high-frequency telecommunication systems. The highest resistivity of up to ~10,000 ohm.cm is Float Zone (FZ) grown Si which is produced in small quantities and moderate wafer diameter. The more common Czochralski (CZ) Si can achieve resistivities of around 1000 ohm.cm, but the wafers contain oxygen that can lead to thermal donor formation with donor concentration significantly higher (~1015 cm-3) than the dopant concentration (~1012-1013 cm-3) of such high-resistivity Si leading to resistivity changes and possible type conversion of high-resistivity p-type silicon. In this research capacitance-voltage (C-V) characterization is employed to study the donor formation and type conversion of p-type High-resistivity Silicon-On-Insulator (HRSOI) wafers and the challenges involved in C-V characterization of HRSOI wafers using a Schottky contact are highlighted. The maximum capacitance of bulk or Silicon-On-Insulator (SOI) wafers is governed by the gate/contact area. During C-V characterization of high-resistivity SOI wafers with aluminum contacts directly on the Si film (Schottky contact); it was observed that the maximum capacitance is much higher than that due to the contact area, suggesting bias spreading due to the distributed transmission line of the film resistance and the buried oxide capacitance. In addition, an "S"-shape C-V plot was observed in the accumulation region. The effects of various factors, such as: frequency, contact and substrate sizes, gate oxide, SOI film thickness, film and substrate doping, carrier lifetime, contact work-function, temperature, light, annealing temperature and radiation on the C-V characteristics of HRSOI wafers are studied. HRSOI wafers have the best crosstalk prevention capability compared to other types of wafers, which plays a major role in system-on-chip configuration to prevent coupling between high frequency digital and sensitive analog circuits. Substrate crosstalk in HRSOI and various factors affecting the crosstalk, such as: substrate resistivity, separation between devices, buried oxide (BOX) thickness, radiation, temperature, annealing, light, and device types are discussed. Also various ways to minimize substrate crosstalk are studied and a new characterization method is proposed. Owing to their very low doping concentrations and the presence of oxygen in CZ wafers, HRS wafers pose a challenge in resistivity measurement using conventional techniques such as four-point probe and Hall measurement methods. In this research the challenges in accurate resistivity measurement using four-point probe, Hall method, and C-V profile are highlighted and a novel approach to extract resistivity of HRS wafers based on Impedance Spectroscopy measurements using polymer dielectrics such as Polystyrene and Poly Methyl Methacrylate (PMMA) is proposed.
ContributorsNayak, Pinakpani (Author) / Schroder, Dieter K. (Thesis advisor) / Vasileska, Dragica (Committee member) / Kozicki, Michael (Committee member) / Aberle, James T., 1961- (Committee member) / Arizona State University (Publisher)
Created2012
Description
Thermal effects in nano-scaled devices were reviewed and modeling methodologies to deal with this issue were discussed. The phonon energy balance equations model, being one of the important previous works regarding the modeling of heating effects in nano-scale devices, was derived. Then, detailed description was given on the Monte Carlo (MC) solution of the phonon Boltzmann Transport Equation. The phonon MC solver was developed next as part of this thesis. Simulation results of the thermal conductivity in bulk Si show good agreement with theoretical/experimental values from literature.
ContributorsYoo, Seung Kyung (Author) / Vasileska, Dragica (Thesis advisor) / Ferry, David (Committee member) / Goodnick, Stephen (Committee member) / Arizona State University (Publisher)
Created2015
Towards high-efficiency thin-film solar cells: from theoretical analysis to experimental exploration
Description
GaAs single-junction solar cells have been studied extensively in recent years, and have reached over 28 % efficiency. Further improvement requires an optically thick but physically thin absorber to provide both large short-circuit current and high open-circuit voltage. By detailed simulation, it is concluded that ultra-thin GaAs cells with hundreds of nanometers thickness and reflective back scattering can potentially offer efficiencies greater than 30 %. The 300 nm GaAs solar cell with AlInP/Au reflective back scattering is carefully designed and demonstrates an efficiency of 19.1 %. The device performance is analyzed using the semi-analytical model with Phong distribution implemented to account for non-Lambertian scattering. A Phong exponent m of ~12, a non-radiative lifetime of 130 ns, and a specific series resistivity of 1.2 Ω·cm2 are determined.
Thin-film CdTe solar cells have also attracted lots of attention due to the continuous improvements in their device performance. To address the issue of the lower efficiency record compared to detailed-balance limit, the single-crystalline Cd(Zn)Te/MgCdTe double heterostructures (DH) grown on InSb (100) substrates by molecular beam epitaxy (MBE) are carefully studied. The Cd0.9946Zn0.0054Te alloy lattice-matched to InSb has been demonstrated with a carrier lifetime of 0.34 µs observed in a 3 µm thick Cd0.9946Zn0.0054Te/MgCdTe DH sample. The substantial improvement of lifetime is due to the reduction in misfit dislocation density. The recombination lifetime and interface recombination velocity (IRV) of CdTe/MgxCd1-xTe DHs are investigated. The IRV is found to be dependent on both the MgCdTe barrier height and width due to the thermionic emission and tunneling processes. A record-long carrier lifetime of 2.7 µs and a record-low IRV of close to zero have been confirmed experimentally.
The MgCdTe/Si tandem solar cell is proposed to address the issue of high manufacturing costs and poor performance of thin-film solar cells. The MBE grown MgxCd1-xTe/MgyCd1-yTe DHs have demonstrated the required bandgap energy of 1.7 eV, a carrier lifetime of 11 ns, and an effective IRV of (1.869 ± 0.007) × 103 cm/s. The large IRV is attributed to thermionic-emission induced interface recombination. These understandings can be applied to fabricating the high-efficiency low-cost MgCdTe/Si tandem solar cell.
Thin-film CdTe solar cells have also attracted lots of attention due to the continuous improvements in their device performance. To address the issue of the lower efficiency record compared to detailed-balance limit, the single-crystalline Cd(Zn)Te/MgCdTe double heterostructures (DH) grown on InSb (100) substrates by molecular beam epitaxy (MBE) are carefully studied. The Cd0.9946Zn0.0054Te alloy lattice-matched to InSb has been demonstrated with a carrier lifetime of 0.34 µs observed in a 3 µm thick Cd0.9946Zn0.0054Te/MgCdTe DH sample. The substantial improvement of lifetime is due to the reduction in misfit dislocation density. The recombination lifetime and interface recombination velocity (IRV) of CdTe/MgxCd1-xTe DHs are investigated. The IRV is found to be dependent on both the MgCdTe barrier height and width due to the thermionic emission and tunneling processes. A record-long carrier lifetime of 2.7 µs and a record-low IRV of close to zero have been confirmed experimentally.
The MgCdTe/Si tandem solar cell is proposed to address the issue of high manufacturing costs and poor performance of thin-film solar cells. The MBE grown MgxCd1-xTe/MgyCd1-yTe DHs have demonstrated the required bandgap energy of 1.7 eV, a carrier lifetime of 11 ns, and an effective IRV of (1.869 ± 0.007) × 103 cm/s. The large IRV is attributed to thermionic-emission induced interface recombination. These understandings can be applied to fabricating the high-efficiency low-cost MgCdTe/Si tandem solar cell.
ContributorsLiu, Shi (Author) / Zhang, Yong-Hang (Thesis advisor) / Johnson, Shane R (Committee member) / Vasileska, Dragica (Committee member) / Yu, Hongbin (Committee member) / Arizona State University (Publisher)
Created2015
Description
Thin-film modules of all technologies often suffer from performance degradation over time. Some of the performance changes are reversible and some are not, which makes deployment, testing, and energy-yield prediction more challenging. The most commonly alleged causes of instability in CdTe device, such as “migration of Cu,” have been investigated rigorously over the past fifteen years. As all defects, intrinsic or extrinsic, interact with the electrical potential and free carriers so that charged defects may drift in the electric field and changing ionization state with excess free carriers. Such complexity of interactions in CdTe makes understanding of temporal changes in device performance even more challenging. The goal of the work in this dissertation is, thus, to eliminate the ambiguity between the observed performance changes under stress and their physical root cause by enabling a depth of modeling that takes account of diffusion and drift at the atomistic level coupled to the electronic subsystem responsible for a PV device’s function. The 1D Unified Solver, developed as part of this effort, enables us to analyze PV devices at a greater depth.
In this dissertation, the implementation of a drift-diffusion model defect migration simulator, development of an implicit reaction scheme for total mass conservation, and a couple of other numerical schemes to improve the overall flexibility and robustness of this coupled Unified Solver is discussed. Preliminary results on Cu (with or without Cl-treatment) annealing simulations in both single-crystal CdTe wafer and poly-crystalline CdTe devices show promising agreement to experimental findings, providing a new perspective in the research of improving doping concentration hence the open-circuit voltage of CdTe technology. Furthermore, on the reliability side, in agreement of previous experimental reports, simulation results suggest possibility of Cu depletion in short-circuited cells stressed at elevated temperature. The developed solver also successfully demonstrated that mobile donor migration can be used to explain solar cell performance changes under different stress conditions.
In this dissertation, the implementation of a drift-diffusion model defect migration simulator, development of an implicit reaction scheme for total mass conservation, and a couple of other numerical schemes to improve the overall flexibility and robustness of this coupled Unified Solver is discussed. Preliminary results on Cu (with or without Cl-treatment) annealing simulations in both single-crystal CdTe wafer and poly-crystalline CdTe devices show promising agreement to experimental findings, providing a new perspective in the research of improving doping concentration hence the open-circuit voltage of CdTe technology. Furthermore, on the reliability side, in agreement of previous experimental reports, simulation results suggest possibility of Cu depletion in short-circuited cells stressed at elevated temperature. The developed solver also successfully demonstrated that mobile donor migration can be used to explain solar cell performance changes under different stress conditions.
ContributorsGuo, Da (Author) / Vasileska, Dragica (Thesis advisor) / Sankin, Igor (Committee member) / Goodnick, Stephen (Committee member) / Bertoni, Mariana (Committee member) / Arizona State University (Publisher)
Created2017
Description
Semiconductor nanowires have the potential to emerge as the building blocks of next generation field-effect transistors, logic gates, solar cells and light emitting diodes. Use of Gallium Nitride (GaN) and other wide bandgap materials combines the advantages of III-nitrides along with the enhanced mobility offered by 2-dimensional confinement present in nanowires. The focus of this thesis is on developing a low field mobility model for a GaN nanowire using Ensemble Monte Carlo (EMC) techniques. A 2D Schrödinger-Poisson solver and a one-dimensional Monte Carlo solver is developed for an Aluminum Gallium Nitride/Gallium Nitride Heterostructure nanowire. A GaN/AlN/AlGaN heterostructure device is designed which creates 2-dimensional potential well for electrons. The nanowire is treated as a quasi-1D system in this work. A self-consistent 2D Schrödinger-Poisson solver is designed which determines the subband energies and the corresponding wavefunctions of the confined system. Three scattering mechanisms: acoustic phonon scattering, polar optical phonon scattering and piezoelectric scattering are considered to account for the electron phonon interactions in the system. Overlap integrals and 1D scattering rate expressions are derived for all the mechanisms listed. A generic one-dimensional Monte Carlo solver is also developed. Steady state results from the 1D Monte Carlo solver are extracted to determine the low field mobility of the GaN nanowires.
ContributorsKumar, Viswanathan Naveen (Author) / Vasileska, Dragica (Thesis advisor) / Goodnick, Stephen (Committee member) / Zhao, Yuji (Committee member) / Arizona State University (Publisher)
Created2017