Advanced electron microscopy techniques, including aberration-corrected electron microscopy and electron energy-loss spectroscopy (EELS) with energy-loss near-edge structure (ELNES) analysis, were used to characterize the interfaces. Image and spectrum data-processing algorithms, including subpixel atomic position measurement, and novel outlier detection by oversampling, subspace division based EELS background removal and bias-free endmember extraction algorithms for hyperspectral unmixing and mapping were heavily used. Results were compared with density functional theory (DFT) calculations for theoretical explanation.
For the γ-Al2O3/SrTiO3 system, negative-Cs imaging confirmed the formation of crystalline γ-Al2O3. ELNES hyperspectral unmixing combined with DFT calculations revealed that oxygen vacancies, rather than polar discontinuity, were the key to the 2DEG formation. The critical thickness can be explained by shift of the Fermi level due to Ti out diffusion from the substrate to the film.
At the LaTiO3/SrTiO3 interface, aberration-corrected imaging showed crystallinity deterioration in LaTiO3 films a few unit cells away from the interface. ELNES showed that oxygen annealing did not alter the crystallinity but converted Ti3+ near the interface into Ti4+, which explained disappearance of the conductivity.
At the EuO/SrTiO3 interface, both high-resolution imaging and ELNES confirmed EuO formation. ELNES hyperspectral unmixing showed a Ti3+ layer confined to within several unit cells of the interface on the SrTiO3 side, confirming the presence of oxygen vacancies.
At the BaTiO3/SrTiO3 interface, spontaneous polarization and local lattice parameters were measured directly in each unit cell column and compared with oxidation state mapping using ELNES with unit-cell resolution. The unusually large polarization near the interface and the polarization gradient were explained by oxygen vacancies and the piezoelectric effect due to epitaxial strain and strain gradient from relaxation.
In this paper, we report on the highly conductive layer formed at the crystalline γ-alumina/SrTiO3 interface, which is attributed to oxygen vacancies. We describe the structure of thin γ-alumina layers deposited by molecular beam epitaxy on SrTiO3 (001) at growth temperatures in the range of 400–800 °C, as determined by reflection-high-energy electron diffraction, x-ray diffraction, and high-resolution electron microscopy. In situ x-ray photoelectron spectroscopy was used to confirm the presence of the oxygen-deficient layer. Electrical characterization indicates sheet carrier densities of ∼1013 cm−2 at room temperature for the sample deposited at 700 °C, with a maximum electron Hall mobility of 3100 cm2V-1s-1 at 3.2 K and room temperature mobility of 22 cm2V-1s-1. Annealing in oxygen is found to reduce the carrier density and turn a conductive sample into an insulator.
The current work explores the crystalline perovskite oxide, strontium hafnate, as a potential high-k gate dielectric for Ge-based transistors. SrHfO3 (SHO) is grown directly on Ge by atomic layer deposition and becomes crystalline with epitaxial registry after post-deposition vacuum annealing at ∼700 °C for 5 min. The 2 × 1 reconstructed, clean Ge (001) surface is a necessary template to achieve crystalline films upon annealing. The SHO films exhibit excellent crystallinity, as shown by x-ray diffraction and transmission electron microscopy. The SHO films have favorable electronic properties for consideration as a high-k gate dielectric on Ge, with satisfactory band offsets (>2 eV), low leakage current (<10-5 A/cm2 at an applied field of 1 MV/cm) at an equivalent oxide thickness of 1 nm, and a reasonable dielectric constant (k ∼ 18). The interface trap density (Dit) is estimated to be as low as ∼2 × 1012 cm-2 eV-1 under the current growth and anneal conditions. Some interfacial reaction is observed between SHO and Ge at temperatures above ∼650 °C, which may contribute to increased Dit value. This study confirms the potential for crystalline oxides grown directly on Ge by atomic layer deposition for advanced electronic applications.