Matching Items (68)

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A Review of Gallium Nitride HEMTs to Improve CubeSat EPS Efficiency

Description

This paper reviews several current designs of Cube Satellite (CubeSat) Electrical Power Systems (EPS) based on Silicon FET technologies and their current deficiencies, such as radiation-incurred defects and switching power

This paper reviews several current designs of Cube Satellite (CubeSat) Electrical Power Systems (EPS) based on Silicon FET technologies and their current deficiencies, such as radiation-incurred defects and switching power losses. A strategy to fix these is proposed by the way of using Gallium Nitride (GaN) High Electron-Mobility Transistors (HEMTs) as switching devices within Buck/Boost Converters and other regulators. This work summarizes the EPS designs of several CubeSat missions, classifies them, and outlines their efficiency. An in-depth example of an EPS is also given, explaining the process in which these systems are designed. Areas of deficiency are explained along with reasoning as to why GaN can mitigate these losses, including its wide bandgap properties such as high RDS(on) and High Breakdown Voltage. Special design considerations must be kept in mind when using GaN HEMTs in this application and an example of a CubeSat using GaN HEMTs is mentioned. Finally, challenges ahead for GaN are explored including manufacturing considerations and long-term reliability.

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Agent

Created

Date Created
  • 2017-05

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Electronic Body Protectors: Improving upon an unbiased method to judge Taekwondo Competitions

Description

In competitive Taekwondo, Electronic Body Protectors (EBPs) are used to register hits made by players during sparring. EBPs are comprised of three main components: chest guard, foot sock, and headgear.

In competitive Taekwondo, Electronic Body Protectors (EBPs) are used to register hits made by players during sparring. EBPs are comprised of three main components: chest guard, foot sock, and headgear. This equipment interacts with each other through the use of magnets, electric sensors, transmitters, and a receiver. The receiver is connected to a computer programmed with software to process signals from the transmitter and determine whether or not a competitor scored a point. The current design of EBPs, however, have numerous shortcomings, including sensing false positives, failing to register hits, costing too much, and relying on human judgment. This thesis will thoroughly delineate the operation of the current EBPs used and discuss research performed in order to eliminate these weaknesses.

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Agent

Created

Date Created
  • 2016-05

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Novel Solar Array Interface Electronics for Maximum PV Power Extraction

Description

Current technology does not allow for the full amount of power produced by solar arrays (PV) on spacecraft to be utilized. The arrays are designed with non-reconfigurable architectures and sent

Current technology does not allow for the full amount of power produced by solar arrays (PV) on spacecraft to be utilized. The arrays are designed with non-reconfigurable architectures and sent on fifteen to twenty year long missions. They cannot be changed once they are in space, so the arrays are designed for the end of life. Throughout their lifetime, solar arrays can degrade in power producing capabilities anywhere from 20% to 50%. Because there is such a drastic difference in the beginning and end of life power production, and because they cannot be reconfigured, a new design has been found necessary in order to increase power production. Reconfiguration allows the solar arrays to achieve maximum power producing capabilities at both the beginning and end of their lives. With the potential to increase power production by 50%, the reconfiguration design consists of a switching network to be able to utilize any combination of cells. The design for reconfiguration must meet the power requirements of the solar array. This thesis will explore different designs for reconfiguration, as well as possible switches for implementation. It will also review other methods to increase power production, as well as discuss future work in this field.

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Agent

Created

Date Created
  • 2018-05

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Active Ripple Cancellation in Hysteretic Controlled Buck Converters

Description

Buck converters are a class of switched-mode power converters often used to step down DC input voltages to a lower DC output voltage. These converters naturally produce a current and

Buck converters are a class of switched-mode power converters often used to step down DC input voltages to a lower DC output voltage. These converters naturally produce a current and voltage ripple at their output due to their switching action. Traditional methods of reducing this ripple have involved adding large discrete inductors and capacitors to filter the ripple, but large discrete components cannot be integrated onto chips. As an alternative to using passive filtering components, this project investigates the use of active ripple cancellation to reduce the peak output ripple. Hysteretic controlled buck converters were chosen for their simplicity of design and fast transient response. The proposed cancellation circuits sense the output ripple of the buck converter and inject an equal ripple exactly out of phase with the sensed ripple. Both current-mode and voltage-mode feedback loops are simulated, and the effectiveness of each cancellation circuit is examined. Results show that integrated active ripple cancellation circuits offer a promising substitute for large discrete filters.

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Created

Date Created
  • 2017-12

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The Development of a Power System for the Phoenix CubeSat

Description

The Phoenix CubeSat is a 3U Earth imaging CubeSat which will take infrared (IR) photos of cities in the United Stated to study the Urban Heat Island Effect, (UHI) from

The Phoenix CubeSat is a 3U Earth imaging CubeSat which will take infrared (IR) photos of cities in the United Stated to study the Urban Heat Island Effect, (UHI) from low earth orbit (LEO). It has many different components that need to be powered during the life of its mission. The only power source during the mission will be its solar panels. It is difficult to calculate power generation from solar panels by hand because of the different orientations the satellite will be positioned in during orbit; therefore, simulation will be used to produce power generation data. Knowing how much power is generated is integral to balancing the power budget, confirming whether there is enough power for all the components, and knowing whether there will be enough power in the batteries during eclipse. This data will be used to create an optimal design for the Phoenix CubeSat to accomplish its mission.

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Agent

Created

Date Created
  • 2017-05

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Memory Characterization Testing System

Description

This thesis outlines the hand-held memory characterization testing system that is to be created into a PCB (printed circuit board). The circuit is designed to apply voltages diagonally through a

This thesis outlines the hand-held memory characterization testing system that is to be created into a PCB (printed circuit board). The circuit is designed to apply voltages diagonally through a RRAM cell (32x32 memory array). The purpose of this sweep across the RRAM is to measure and calculate the high and low resistance state value over a specified amount of testing cycles. With each cell having a unique output of high and low resistance states a unique characterization of each RRAM cell is able to be developed. Once the memory is characterized, the specific RRAM cell that was tested is then able to be used in a varying amount of applications for different things based on its uniqueness. Due to an inability to procure a packaged RRAM cell, a Mock-RRAM was instead designed in order to emulate the same behavior found in a RRAM cell.
The final testing circuit and Mock-RRAM are varied and complex but come together to be able to produce a measured value of the high resistance and low resistance state. This is done by the Arduino autonomously digitizing the anode voltage, cathode voltage, and output voltage. A ramp voltage that sweeps from 1V to -1V is applied to the Mock-RRAM acting as an input. This ramp voltage is then later defined as the anode voltage which is just one of the two nodes connected to the Mock-RRAM. The cathode voltage is defined as the other node at which the voltage drops across the Mock-RRAM. Using these three voltages as input to the Arduino, the Mock-RRAM path resistance is able to be calculated at any given point in time. Conducting many test cycles and calculating the high and low resistance values allows for a graph to be developed of the chaotic variation of resistance state values over time. This chaotic variation can then be analyzed further in the future in order to better predict trends and characterize the RRAM cell that was tested.
Furthermore, the interchangeability of many devices on the PCB allows for the testing system to do more in the future. Ports have been added to the final PCB in order to connect a packaged RRAM cell. This will allow for the characterization of a real RRAM memory cell later down the line rather than a Mock-RRAM as emulation. Due to the autonomous testing, very few human intervention is needed which makes this board a great baseline for others in the future looking to add to it and collect larger pools of data.

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Agent

Created

Date Created
  • 2019-05

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Design of a digitally controlled pulse width modulator for DC-DC converter applications

Description

Synchronous buck converters have become the obvious choice of design for high efficiency voltage down-conversion applications and find wide scale usage in today's IC industry. The use of digital control

Synchronous buck converters have become the obvious choice of design for high efficiency voltage down-conversion applications and find wide scale usage in today's IC industry. The use of digital control in synchronous buck converters is becoming increasingly popular because of its associated advantages over traditional analog counterparts in terms of design flexibility, reduced use of off-chip components, and better programmability to enable advanced controls. They also demonstrate better immunity to noise, enhances tolerance to the process, voltage and temperature (PVT) variations, low chip area and as a result low cost. It enables processing in digital domain requiring a need of analog-digital interfacing circuit viz. Analog to Digital Converter (ADC) and Digital to Analog Converter (DAC). A Digital to Pulse Width Modulator (DPWM) acts as time domain DAC required in the control loop to modulate the ON time of the Power-MOSFETs. The accuracy and efficiency of the DPWM creates the upper limit to the steady state voltage ripple of the DC - DC converter and efficiency in low load conditions. This thesis discusses the prevalent architectures for DPWM in switched mode DC - DC converters. The design of a Hybrid DPWM is presented. The DPWM is 9-bit accurate and is targeted for a Synchronous Buck Converter with a switching frequency of 1.0 MHz. The design supports low power mode(s) for the buck converter in the Pulse Frequency Modulation (PFM) mode as well as other fail-safe features. The design implementation is digital centric making it robust across PVT variations and portable to lower technology nodes. Key target of the design is to reduce design time. The design is tested across large Process (+/- 3σ), Voltage (1.8V +/- 10%) and Temperature (-55.0 °C to 125 °C) and is in the process of tape-out.

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Agent

Created

Date Created
  • 2013

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Digital calibration and prediction of effective number of bits for pipeline ADC

Description

In thesis, a test time reduction (a low cost test) methodology for digitally-calibrated pipeline analog-to-digital converters (ADCs) is presented. A long calibration time is required in the final test to

In thesis, a test time reduction (a low cost test) methodology for digitally-calibrated pipeline analog-to-digital converters (ADCs) is presented. A long calibration time is required in the final test to validate performance of these designs. To reduce total test time, optimized calibration technique and calibrated effective number of bits (ENOB) prediction from calibration coefficient will be presented. With the prediction technique, failed devices can be identified only without actual calibration. This technique reduces significant amount of time for the total test time.

Contributors

Agent

Created

Date Created
  • 2013

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Improved Model for Excess Base Current in Irradiated Lateral PNP Bipolar Junction Transistors

Description

A modeling platform for predicting total ionizing dose (TID) and dose rate response of commercial commercial-off-the-shelf (COTS) linear bipolar circuits and technologies is introduced. Tasks associated with the modeling platform

A modeling platform for predicting total ionizing dose (TID) and dose rate response of commercial commercial-off-the-shelf (COTS) linear bipolar circuits and technologies is introduced. Tasks associated with the modeling platform involve the development of model to predict the excess current response in a bipolar transistor given inputs of interface (NIT) and oxide defects (NOT) which are caused by ionizing radiation exposure. Existing models that attempt to predict this excess base current response are derived and discussed in detail. An improved model is proposed which modifies the existing model and incorporates the impact of charged interface trap defects on radiation-induced excess base current. The improved accuracy of the new model in predicting excess base current response in lateral PNP (LPNP) is then verified with Technology Computer Aided Design (TCAD) simulations. Finally, experimental data and compared with the improved and existing model calculations.

Contributors

Agent

Created

Date Created
  • 2017

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Analysis of wireless video sensor network platforms over AJAX, CGI and WebRTC

Description

Since the inception of Internet of Things (IoT) framework, the amount of interaction between electronic devices has tremendously increased and the ease of implementing software between such devices has bettered.

Since the inception of Internet of Things (IoT) framework, the amount of interaction between electronic devices has tremendously increased and the ease of implementing software between such devices has bettered. Such data exchange between devices, whether between Node to Server or Node to Node, has paved way for creating new business models. Wireless Video Sensor Network Platforms are being used to monitor and understand the surroundings better. Both hardware and software supporting such devices have become much smaller and yet stronger to enable these. Specifically, the invention of better software that enable Wireless data transfer have become more simpler and lightweight technologies such as HTML5 for video rendering, Common Gateway Interface(CGI) scripts enabling interactions between client and server and WebRTC from Google for peer to peer interactions. The role of web browsers in enabling these has been vastly increasing.

Although HTTP is the most reliable and consistent data transfer protocol for such interactions, the most important underlying challenge with such platforms is the performance based on power consumption and latency in data transfer.

In the scope of this thesis, two applications using CGI and WebRTC for data transfer over HTTP will be presented and the power consumption by the peripherals in transmitting the data and the possible implications for those will be discussed.

Contributors

Agent

Created

Date Created
  • 2016