Matching Items (15)

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Radiation transport analysis in chalcogenide-based devices and a neutron howitzer using MCNP

Description

As photons, electrons, and neutrons traverse a medium, they impart their energy in ways that are analytically difficult to describe. Monte Carlo methods provide valuable insight into understanding this behavior,

As photons, electrons, and neutrons traverse a medium, they impart their energy in ways that are analytically difficult to describe. Monte Carlo methods provide valuable insight into understanding this behavior, especially when the radiation source or environment is too complex to simplify. This research investigates simulating various radiation sources using the Monte Carlo N-Particle (MCNP) transport code, characterizing their impact on various materials, and comparing the simulation results to general theory and measurements.

A total of five sources were of interest: two photon sources of different incident particle energies (3.83 eV and 1.25 MeV), two electron sources also of different energies (30 keV and 100 keV), and a californium-252 (Cf-252) spontaneous fission neutron source. Lateral and vertical programmable metallization cells (PMCs) were developed by other researchers for exposure to these photon and electron sources, so simplified PMC models were implemented in MCNP to estimate the doses and fluences. Dose rates measured around the neutron source and the predicted maximum activity of activation foils exposed to the neutrons were determined using MCNP and compared to experimental results obtained from gamma-ray spectroscopy.

The analytical fluence calculations for the photon and electron cases agreed with MCNP results, and differences are due to MCNP considering particle movements that hand calculations do not. Doses for the photon cases agreed between the analytical and simulated results, while the electron cases differed by a factor of up to 4.8. Physical dose rate measurements taken from the neutron source agreed with MCNP within the 10% tolerance of the measurement device. The activity results had a percent error of up to 50%, which suggests a need to further evaluate the spectroscopy setup.

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Date Created
  • 2014

Simulation models for programmable metallization cells

Description

Advances in software and applications continue to demand advances in memory. The ideal memory would be non-volatile and have maximal capacity, speed, retention time, endurance, and radiation hardness while also

Advances in software and applications continue to demand advances in memory. The ideal memory would be non-volatile and have maximal capacity, speed, retention time, endurance, and radiation hardness while also having minimal physical size, energy usage, and cost. The programmable metallization cell (PMC) is an emerging memory technology that is likely to surpass flash memory in all the listed ideal memory characteristics. A comprehensive physics-based model is needed to fully understand PMC operation and aid in design optimization. With the intent of advancing the PMC modeling effort, this thesis presents two simulation models for the PMC. The first model is a finite element model based on Silvaco Atlas finite element analysis software. Limitations of the software are identified that make this model inconsistent with the operating mechanism of the PMC. The second model is a physics-based numerical model developed for the PMC. This model is successful in matching data measured from a chalcogenide glass PMC designed and manufactured at ASU. Matched operating characteristics observable in the current and resistance vs. voltage data include the OFF/ON resistances and write/erase and electrodeposition voltage thresholds. Multilevel programming is also explained and demonstrated with the numerical model. The numerical model has already proven useful by revealing some information presented about the operation and characteristics of the PMC.

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Date Created
  • 2013

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Cu-Silica Based Programmable Metallization Cell: Fabrication, Characterization and Applications

Description

The Programmable Metallization Cell (PMC) is a novel solid-state resistive switching technology. It has a simple metal-insulator-metal “MIM” structure with one metal being electrochemically active (Cu) and the other one

The Programmable Metallization Cell (PMC) is a novel solid-state resistive switching technology. It has a simple metal-insulator-metal “MIM” structure with one metal being electrochemically active (Cu) and the other one being inert (Pt or W), an insulating film (silica) acts as solid electrolyte for ion transport is sandwiched between these two electrodes. PMC’s resistance can be altered by an external electrical stimulus. The change of resistance is attributed to the formation or dissolution of Cu metal filament(s) within the silica layer which is associated with electrochemical redox reactions and ion transportation. In this dissertation, a comprehensive study of microfabrication method and its impacts on performance of PMC device is demonstrated, gamma-ray total ionizing dose (TID) impacts on device reliability is investigated, and the materials properties of doped/undoped silica switching layers are illuminated by impedance spectroscopy (IS). Due to the inherent CMOS compatibility, Cu-silica PMCs have great potential to be adopted in many emerging technologies, such as non-volatile storage cells and selector cells in ultra-dense 3D crosspoint memories, as well as electronic synapses in brain-inspired neuromorphic computing. Cu-silica PMC device performance for these applications is also assessed in this dissertation.

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Date Created
  • 2017

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Analysis and Modeling of Foundry Compatible Programmable Metallization Cell Materials

Description

Programmable Metallization Cell (PMC) devices are, in essence, redox-based

solid-state resistive switching devices that rely on ion transport through a solid electrolyte (SE) layer from anode to cathode. Analysis and modeling

Programmable Metallization Cell (PMC) devices are, in essence, redox-based

solid-state resistive switching devices that rely on ion transport through a solid electrolyte (SE) layer from anode to cathode. Analysis and modeling of the effect of different fabrication and processing parameter/conditions on PMC devices are crucial for future electronics. Furthermore, this work is even more significant for devices utilizing back-end- of-line (BEOL) compatible materials such as Cu, W, their oxides and SiOx as these devices offer cost effectiveness thanks to their inherent foundry-ready nature. In this dissertation, effect of annealing conditions and cathode material on the performance of Cu-SiOx vertical devices is investigated which shows that W-based devices have much lower forming voltage and initial resistance values. Also, higher annealing temperatures first lead to an increase in forming voltage from 400 °C to 500 °C, then a drastic decrease at 550 °C due to Cu island formation at the Cu/SiOx interface. Next, the characterization and modeling of the bilayer Cu2O/Cu-WO3 obtained by annealing the deposited Cu/WO3 stacks in air at BEOL-compatible temperatures is presented that display unique characteristics for lateral PMC devices. First, thin film oxidation kinetics of Cu is studied which show a parabolic relationship with annealing time and an activation energy of 0.70 eV. Grown Cu2O shows a cauliflower-like morphology where feature size on the surface increase with annealing time and temperature. Then, diffusion kinetics of Cu in WO3 is examined where the activation energy of diffusion of Cu into WO3 is calculated to be 0.74 eV. Cu was found to form clusters in the WO3 host which was revealed by imaging. Moreover, using the oxidation and diffusion analyses, a Matlab model is established for modeling the bilayer for process and annealing-condition optimization. The model is built to produce the resulting Cu2O thickness and Cu concentration in Cu-WO3. Additionally, material characterization, preliminary electrical results along with modeling of lateral PMC devices utilizing the bilayer is also demonstrated. By tuning the process parameters such as deposited Cu thickness and annealing conditions, a low-resistive Cu2O layer was achieved which dramatically enhanced the electrodeposition growth rate for lateral PMC devices.

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Date Created
  • 2020

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Improved Model for Excess Base Current in Irradiated Lateral PNP Bipolar Junction Transistors

Description

A modeling platform for predicting total ionizing dose (TID) and dose rate response of commercial commercial-off-the-shelf (COTS) linear bipolar circuits and technologies is introduced. Tasks associated with the modeling platform

A modeling platform for predicting total ionizing dose (TID) and dose rate response of commercial commercial-off-the-shelf (COTS) linear bipolar circuits and technologies is introduced. Tasks associated with the modeling platform involve the development of model to predict the excess current response in a bipolar transistor given inputs of interface (NIT) and oxide defects (NOT) which are caused by ionizing radiation exposure. Existing models that attempt to predict this excess base current response are derived and discussed in detail. An improved model is proposed which modifies the existing model and incorporates the impact of charged interface trap defects on radiation-induced excess base current. The improved accuracy of the new model in predicting excess base current response in lateral PNP (LPNP) is then verified with Technology Computer Aided Design (TCAD) simulations. Finally, experimental data and compared with the improved and existing model calculations.

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Date Created
  • 2017

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Defect Induced Aging and Breakdown in High-k Dielectrics

Description

High-k dielectrics have been employed in the metal-oxide semiconductor field effect transistors (MOSFETs) since 45 nm technology node. In this MOSFET industry, Moore’s law projects the feature size of MOSFET

High-k dielectrics have been employed in the metal-oxide semiconductor field effect transistors (MOSFETs) since 45 nm technology node. In this MOSFET industry, Moore’s law projects the feature size of MOSFET scales half within every 18 months. Such scaling down theory has not only led to the physical limit of manufacturing but also raised the reliability issues in MOSFETs. After the incorporation of HfO2 based high-k dielectrics, the stacked oxides based gate insulator is facing rather challenging reliability issues due to the vulnerable HfO2 layer, ultra-thin interfacial SiO2 layer, and even messy interface between SiO2 and HfO2. Bias temperature instabilities (BTI), hot channel electrons injections (HCI), stress-induced leakage current (SILC), and time dependent dielectric breakdown (TDDB) are the four most prominent reliability challenges impacting the lifetime of the chips under use.

In order to fully understand the origins that could potentially challenge the reliability of the MOSFETs the defects induced aging and breakdown of the high-k dielectrics have been profoundly investigated here. BTI aging has been investigated to be related to charging effects from the bulk oxide traps and generations of Si-H bonds related interface traps. CVS and RVS induced dielectric breakdown studies have been performed and investigated. The breakdown process is regarded to be related to oxygen vacancies generations triggered by hot hole injections from anode. Post breakdown conduction study in the RRAM devices have shown irreversible characteristics of the dielectrics, although the resistance could be switched into high resistance state.

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Date Created
  • 2018

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High speed CMOS image sensor

Description

High speed image sensors are used as a diagnostic tool to analyze high speed processes for industrial, automotive, defense and biomedical application. The high fame rate of these sensors, capture

High speed image sensors are used as a diagnostic tool to analyze high speed processes for industrial, automotive, defense and biomedical application. The high fame rate of these sensors, capture a series of images that enables the viewer to understand and analyze the high speed phenomena. However, the pixel readout circuits designed for these sensors with a high frame rate (100fps to 1 Mfps) have a very low fill factor which are less than 58%. For high speed operation, the exposure time is less and (or) the light intensity incident on the image sensor is less. This makes it difficult for the sensor to detect faint light signals and gives a lower limit on the signal levels being detected by the sensor. Moreover, the leakage paths in the pixel readout circuit also sets a limit on the signal level being detected. Therefore, the fill factor of the pixel should be maximized and the leakage currents in the readout circuits should be minimized.

This thesis work presents the design of the pixel readout circuit suitable for high speed and low light imaging application. The circuit is an improvement to the 6T pixel readout architecture. The designed readout circuit minimizes the leakage currents in the circuit and detects light producing a signal level of 350µV at the cathode of the photodiode. A novel layout technique is used for the pixel, which improves the fill factor of the pixel to 64.625%. The read out circuit designed is an integral part of high speed image sensor, which is fabricated using a 0.18 µm CMOS technology with the die size of 3.1mm x 3.4 mm, the pixel size of 20µm x 20 µm, number of pixel of 96 x 96 and four 10-bit pipelined ADC’s. The image sensor achieves a high frame rate of 10508 fps and readout speed of 96 M pixels / sec.

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Date Created
  • 2016

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Chip level implementation techniques for radiation hardened microprocessors

Description

Microprocessors are the processing heart of any digital system and are central to all the technological advancements of the age including space exploration and monitoring. The demands of space exploration

Microprocessors are the processing heart of any digital system and are central to all the technological advancements of the age including space exploration and monitoring. The demands of space exploration require a special class of microprocessors called radiation hardened microprocessors which are less susceptible to radiation present outside the earth's atmosphere, in other words their functioning is not disrupted even in presence of disruptive radiation. The presence of these particles forces the designers to come up with design techniques at circuit and chip levels to alleviate the errors which can be encountered in the functioning of microprocessors. Microprocessor evolution has been very rapid in terms of performance but the same cannot be said about its rad-hard counterpart. With the total data processing capability overall increasing rapidly, the clear lack of performance of the processors manifests as a bottleneck in any processing system. To design high performance rad-hard microprocessors designers have to overcome difficult design problems at various design stages i.e. Architecture, Synthesis, Floorplanning, Optimization, routing and analysis all the while maintaining circuit radiation hardness. The reference design `HERMES' is targeted at 90nm IBM G process and is expected to reach 500Mhz which is twice as fast any processor currently available. Chapter 1 talks about the mechanisms of radiation effects which cause upsets and degradation to the functioning of digital circuits. Chapter 2 gives a brief description of the components which are used in the design and are part of the consistent efforts at ASUVLSI lab culminating in this chip level implementation of the design. Chapter 3 explains the basic digital design ASIC flow and the changes made to it leading to a rad-hard specific ASIC flow used in implementing this chip. Chapter 4 talks about the triple mode redundant (TMR) specific flow which is used in the block implementation, delineating the challenges faced and the solutions proposed to make the flow work. Chapter 5 explains the challenges faced and solutions arrived at while using the top-level flow described in chapter 3. Chapter 6 puts together the results and analyzes the design in terms of basic integrated circuit design constraints.

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Date Created
  • 2013

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Resistance switching in chalcogenide based programmable metallization cells (PMC) and sensors under gamma-rays

Description

Chalcogenide glass (ChG) materials have gained wide attention because of their applications in conductive bridge random access memory (CBRAM), phase change memories (PC-RAM), optical rewritable disks (CD-RW and DVD-RW), microelectromechanical

Chalcogenide glass (ChG) materials have gained wide attention because of their applications in conductive bridge random access memory (CBRAM), phase change memories (PC-RAM), optical rewritable disks (CD-RW and DVD-RW), microelectromechanical systems (MEMS), microfluidics, and optical communications. One of the significant properties of ChG materials is the change in the resistivity of the material when a metal such as Ag or Cu is added to it by diffusion. This study demonstrates the potential radiation-sensing capabilities of two metal/chalcogenide glass device configurations. Lateral and vertical device configurations sense the radiation-induced migration of Ag+ ions in germanium selenide glasses via changes in electrical resistance between electrodes on the ChG. Before irradiation, these devices exhibit a high-resistance `OFF-state' (in the order of 10E12) but following irradiation, with either 60-Co gamma-rays or UV light, their resistance drops to a low-resistance `ON-state' (around 10E3). Lateral devices have exhibited cyclical recovery with room temperature annealing of the Ag doped ChG, which suggests potential uses in reusable radiation sensor applications. The feasibility of producing inexpensive flexible radiation sensors has been demonstrated by studying the effects of mechanical strain and temperature stress on sensors formed on flexible polymer substrate. The mechanisms of radiation-induced Ag/Ag+ transport and reactions in ChG have been modeled using a finite element device simulator, ATLAS. The essential reactions captured by the simulator are radiation-induced carrier generation, combined with reduction/oxidation for Ag species in the chalcogenide film. Metal-doped ChGs are solid electrolytes that have both ionic and electronic conductivity. The ChG based Programmable Metallization Cell (PMC) is a technology platform that offers electric field dependent resistance switching mechanisms by formation and dissolution of nano sized conductive filaments in a ChG solid electrolyte between oxidizable and inert electrodes. This study identifies silver anode agglomeration in PMC devices following large radiation dose exposure and considers device failure mechanisms via electrical and material characterization. The results demonstrate that by changing device structural parameters, silver agglomeration in PMC devices can be suppressed and reliable resistance switching may be maintained for extremely high doses ranging from 4 Mrad(GeSe) to more than 10 Mrad (ChG).

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Date Created
  • 2013

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Separating radiation and thermal effects on lateral PNP bipolar junction transistors operating in the space environment

Description

Radiation-induced gain degradation in bipolar devices is considered to be the primary threat to linear bipolar circuits operating in the space environment. The damage is primarily caused by charged particles

Radiation-induced gain degradation in bipolar devices is considered to be the primary threat to linear bipolar circuits operating in the space environment. The damage is primarily caused by charged particles trapped in the Earth's magnetosphere, the solar wind, and cosmic rays. This constant radiation exposure leads to early end-of-life expectancies for many electronic parts. Exposure to ionizing radiation increases the density of oxide and interfacial defects in bipolar oxides leading to an increase in base current in bipolar junction transistors. Radiation-induced excess base current is the primary cause of current gain degradation. Analysis of base current response can enable the measurement of defects generated by radiation exposure. In addition to radiation, the space environment is also characterized by extreme temperature fluctuations. Temperature, like radiation, also has a very strong impact on base current. Thus, a technique for separating the effects of radiation from thermal effects is necessary in order to accurately measure radiation-induced damage in space. This thesis focuses on the extraction of radiation damage in lateral PNP bipolar junction transistors and the space environment. It also describes the measurement techniques used and provides a quantitative analysis methodology for separating radiation and thermal effects on the bipolar base current.

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Created

Date Created
  • 2011