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- Genre: Masters Thesis
- Creators: Ayyanar, Raja
- Creators: Bakkaloglu, Bertan
Description
As the world becomes more electronic, power electronics designers have continuously designed more efficient converters. However, with the rising number of nonlinear loads (i.e. electronics) attached to the grid, power quality concerns, and emerging legislation, converters that intake alternating current (AC) and output direct current (DC) known as rectifiers are increasingly implementing power factor correction (PFC) by controlling the input current. For a properly designed PFC-stage inductor, the major design goals include exceeding minimum inductance, remaining below the saturation flux density, high power density, and high efficiency. In meeting these goals, loss calculation is critical in evaluating designs. This input current from PFC circuitry leads to a DC bias through the filter inductor that makes accurate core loss estimation exceedingly difficult as most modern loss estimation techniques neglect the effects of a DC bias. This thesis explores prior loss estimation and design methods, investigates finite element analysis (FEA) design tools, and builds a magnetics test bed setup to empirically determine a magnetic core’s loss under any electrical excitation. In the end, the magnetics test bed hardware results are compared and future work needed to improve the test bed is outlined.
ContributorsMeyers, Tobin (Author) / Ayyanar, Raja (Thesis advisor) / Qin, Jiangchao (Committee member) / Lei, Qin (Committee member) / Arizona State University (Publisher)
Created2019
Description
State-of-the-art automotive radars use multi-chip Frequency Modulated Continuous Wave (FMCW) radars to sense the environment around the car. FMCW radars are prone to interference as they operate over a narrow baseband bandwidth and use similar radio frequency (RF) chirps among them. Phase Modulated Continuous Wave radars (PMCW) are robust and insensitive to interference as they transmit signals over a wider bandwidth using spread spectrum technique. As more and more cars are equipped with FMCW radars illuminate the same environment, interference would soon become a serious issue. PMCW radars can be an effective solution to interference in the noisy FMCW radar environment. PMCW radars can be implemented in silicon as System-on-a-chip (SoC), suitable for Multiple-Input-Multiple-Output (MIMO) implementation and is highly programmable. PMCW radars do not require highly linear high frequency chirping oscillators thus reducing the size of the final solution.
This thesis aims to present a behavior model for this promising Digitally modulated radar (DMR) transceiver in Simulink/Matlab. The goal of this work is to create a model for the electronic system level framework that simulates the entire system with non-idealities. This model includes a Top Down Design methodology to understand the requirements of the individual modules’ performance and thus derive the specifications for implementing the real chip. Back annotation of the actual electrical modules’ performance to the model closes the design process loop. Using Simulink’s toolboxes, a passband and equivalent baseband model of the system is built for the transceiver with non-idealities of the components built in along with signal processing routines in Matlab. This model provides a platform for system evaluation and simulation for various system scenarios and use-cases of sensing using the environment around a moving car.
This thesis aims to present a behavior model for this promising Digitally modulated radar (DMR) transceiver in Simulink/Matlab. The goal of this work is to create a model for the electronic system level framework that simulates the entire system with non-idealities. This model includes a Top Down Design methodology to understand the requirements of the individual modules’ performance and thus derive the specifications for implementing the real chip. Back annotation of the actual electrical modules’ performance to the model closes the design process loop. Using Simulink’s toolboxes, a passband and equivalent baseband model of the system is built for the transceiver with non-idealities of the components built in along with signal processing routines in Matlab. This model provides a platform for system evaluation and simulation for various system scenarios and use-cases of sensing using the environment around a moving car.
ContributorsKalyan, Prassana (Author) / Bakkaloglu, Bertan (Thesis advisor) / Kitchen, Jennifer (Thesis advisor) / Garrity, Douglas (Committee member) / Arizona State University (Publisher)
Created2019
Description
The efficiency of spacecraft’s solar cells reduces over the course of their operation. Traditionally, they are configured to extract maximum power at the end of their life and not have a system which dynamically extracts the maximum power over their entire life. This work demonstrates the benefit of dynamic re-configuration of spacecraft’s solar arrays to access the full power available from the solar panels throughout their lifetime. This dynamic re-configuration is achieved using enhancement mode GaN devices as the switches due to their low Ron and small footprint.
This work discusses hardware Implementation challenges and a prototype board is designed using components-off-the-shelf (COTS) to study the behavior of photovoltaic (PV) panels with different configurations of switches between 5 PV cells. The measurement results from the board proves the feasibility of the idea, showing the power improvements of having the switch structure. The measurement results are used to simulate a 1kW satellite system and understand practical trade-offs of this idea in actual satellite power systems.
Additionally, this work also presents the implementation of CMOS controller integrated circuit (IC) in 0.18um technology. The CMOS controller IC includes switched-capacitor converters in open loop to provide the floating voltages required to drive the GaN switches. Each CMOS controller IC can drive 10 switches in series and parallel combination. Furthermore, the designed controller IC is expected to operate under 300MRad of total dose radiation, thus enabling the controller modules to be placed on the solar cell wings of the satellites.
This work discusses hardware Implementation challenges and a prototype board is designed using components-off-the-shelf (COTS) to study the behavior of photovoltaic (PV) panels with different configurations of switches between 5 PV cells. The measurement results from the board proves the feasibility of the idea, showing the power improvements of having the switch structure. The measurement results are used to simulate a 1kW satellite system and understand practical trade-offs of this idea in actual satellite power systems.
Additionally, this work also presents the implementation of CMOS controller integrated circuit (IC) in 0.18um technology. The CMOS controller IC includes switched-capacitor converters in open loop to provide the floating voltages required to drive the GaN switches. Each CMOS controller IC can drive 10 switches in series and parallel combination. Furthermore, the designed controller IC is expected to operate under 300MRad of total dose radiation, thus enabling the controller modules to be placed on the solar cell wings of the satellites.
ContributorsHeblikar, Anand N (Author) / Kitchen, Jennifer (Thesis advisor) / Bakkaloglu, Bertan (Committee member) / Ozev, Sule (Committee member) / Arizona State University (Publisher)
Created2019
Description
Point of Load (POL) DC-DC converters are increasingly used in space applications, data centres, electric vehicles, portable computers and devices and medical electronics. Heavy computing and processing capabilities of the modern devices have ushered the use of higher battery supply voltage to increase power storage. The need to address this consumer experience driven requirement has propelled the evolution of the next generation of small form-factor power converters which can operate with higher step down ratios while supplying heavy continuous load currents without sacrificing efficiency. Constant On-Time (COT) converter topology is capable of achieving stable operation at high conversion ratio with minimum off-chip components and small silicon area. This work proposes a Constant On-Time buck dc-dc converter for a wide dynamic input range and load currents from 100mA to 10A. Accuracy of this ripple based converter is improved by a unique voltage positioning technique which modulates the reference voltage to lower the average ripple profile close to the nominal output. Adaptive On-time block features a transient enhancement scheme to assist in faster voltage droop recovery when the output voltage dips below a defined threshold. UtilizingGallium Nitride (GaN) power switches enable the proposed converter to achieve very high efficiency while using smaller size inductor-capacitor (LC) power-stage. Use of novel Superjunction devices with higher drain-source blocking voltage simplifies the complex driver design and enables faster frequency of operation. It allows 1.8VComplementary Metal-Oxide Semiconductor (CMOS) devices to effectively drive GaNpower FETs which require 5V gate signal swing. The presented controller circuit uses internal ripple generation which reduces reliance on output cap equivalent series resistance (ESR) for loop stability and facilitates ripples reduction at the output. The ripple generation network is designed to provide ai
optimally stable performance while maintaining load regulation and line regulation accuracy withing specified margin. The chip with ts external Power FET package is proposed to be integrated on a printed circuit board for testing. The designed power converter is expected to operate under 200 MRad of a total ionising dose of radiation enabling it to function within large hadron collider at CERN and space satellite and probe missions.
optimally stable performance while maintaining load regulation and line regulation accuracy withing specified margin. The chip with ts external Power FET package is proposed to be integrated on a printed circuit board for testing. The designed power converter is expected to operate under 200 MRad of a total ionising dose of radiation enabling it to function within large hadron collider at CERN and space satellite and probe missions.
ContributorsJoshi, Omkar (Author) / Bakkaloglu, Bertan (Thesis advisor) / Kitchen, Jennifer (Committee member) / Long, Yu (Committee member) / Arizona State University (Publisher)
Created2019
Description
This work analyzes and develops a point-of-load (PoL) synchronous buck converter using enhancement-mode Gallium Nitride (e-GaN), with emphasis on optimizing reverse conduction loss by using a well-known technique of placing an anti-parallel Schottky diode across the synchronous power device. This work develops an improved analytical switching model for the GaN-based converter with the Schottky diode using piecewise linear approximations.
To avoid a shoot-through between the power switches of the buck converter, a small dead-time is inserted between gate drive switching transitions. Despite optimum dead-time management for a power converter, optimum dead-times vary for different load conditions. These variations become considerably large for PoL applications, which demand high output current with low output voltages. At high switching frequencies, these variations translate into losses that contribute significantly to the total loss of the converter. To understand and quantify power loss in a hard-switching buck converter that uses a GaN power device in parallel with a Schottky diode, piecewise transitions are used to develop an analytical switching model that quantifies the contribution of reverse conduction loss of GaN during dead-time.
The effects of parasitic elements on the dynamics of the switching converter are investigated during one switching cycle of the converter. A designed prototype of a buck converter is correlated to the predicted model to determine the accuracy of the model. This comparison is presented using simulations and measurements at 400 kHz and 2 MHz converter switching speeds for load (1A) condition and fixed dead-time values. Furthermore, performance of the buck converter with and without the Schottky diode is also measured and compared to demonstrate and quantify the enhanced performance when using an anti-parallel diode. The developed power converter achieves peak efficiencies of 91.7% and 93.86% for 2 MHz and 400 KHz switching frequencies, respectively, and drives load currents up to 6A for a voltage conversion from 12V input to 3.3V output.
In addition, various industry Schottky diodes have been categorized based on their packaging and electrical characteristics and the developed analytical model provides analytical expressions relating the diode characteristics to power stage performance parameters. The performance of these diodes has been characterized for different buck converter voltage step-down ratios that are typically used in industry applications and different switching frequencies ranging from 400 KHz to 2 MHz.
To avoid a shoot-through between the power switches of the buck converter, a small dead-time is inserted between gate drive switching transitions. Despite optimum dead-time management for a power converter, optimum dead-times vary for different load conditions. These variations become considerably large for PoL applications, which demand high output current with low output voltages. At high switching frequencies, these variations translate into losses that contribute significantly to the total loss of the converter. To understand and quantify power loss in a hard-switching buck converter that uses a GaN power device in parallel with a Schottky diode, piecewise transitions are used to develop an analytical switching model that quantifies the contribution of reverse conduction loss of GaN during dead-time.
The effects of parasitic elements on the dynamics of the switching converter are investigated during one switching cycle of the converter. A designed prototype of a buck converter is correlated to the predicted model to determine the accuracy of the model. This comparison is presented using simulations and measurements at 400 kHz and 2 MHz converter switching speeds for load (1A) condition and fixed dead-time values. Furthermore, performance of the buck converter with and without the Schottky diode is also measured and compared to demonstrate and quantify the enhanced performance when using an anti-parallel diode. The developed power converter achieves peak efficiencies of 91.7% and 93.86% for 2 MHz and 400 KHz switching frequencies, respectively, and drives load currents up to 6A for a voltage conversion from 12V input to 3.3V output.
In addition, various industry Schottky diodes have been categorized based on their packaging and electrical characteristics and the developed analytical model provides analytical expressions relating the diode characteristics to power stage performance parameters. The performance of these diodes has been characterized for different buck converter voltage step-down ratios that are typically used in industry applications and different switching frequencies ranging from 400 KHz to 2 MHz.
ContributorsKoli, Gauri (Author) / Kitchen, Jennifer (Thesis advisor) / Bakkaloglu, Bertan (Committee member) / Ozev, Sule (Committee member) / Arizona State University (Publisher)
Created2020
Description
Energy is one of the wheels on which the modern world runs. Therefore, standards and limits have been devised to maintain the stability and reliability of the power grid. This research shows a simple methodology for increasing the amount of Inverter-based Renewable Generation (IRG), which is also known as Inverter-based Resources (IBR), for that considers the voltage and frequency limits specified by the Western Electricity Coordinating Council (WECC) Transmission Planning (TPL) criteria, and the tie line power flow limits between the area-under-study and its neighbors under contingency conditions. A WECC power flow and dynamic file is analyzed and modified in this research to demonstrate the performance of the methodology. GE's Positive Sequence Load Flow (PSLF) software is used to conduct this research and Python was used to analyze the output data.
The thesis explains in detail how the system with 11% of IRG operated before conducting any adjustments (addition of IRG) and what procedures were modified to make the system run correctly. The adjustments made to the dynamic models are also explained in depth to give a clearer picture of how each adjustment affects the system performance. A list of proposed IRG units along with their locations were provided by SRP, a power utility in Arizona, which were to be integrated into the power flow and dynamic files. In the process of finding the maximum IRG penetration threshold, three sensitivities were also considered, namely, momentary cessation due to low voltages, transmission vs. distribution connected solar generation, and stalling of induction motors. Finally, the thesis discusses how the system reacts to the aforementioned modifications, and how IRG penetration threshold gets adjusted with regards to the different sensitivities applied to the system.
The thesis explains in detail how the system with 11% of IRG operated before conducting any adjustments (addition of IRG) and what procedures were modified to make the system run correctly. The adjustments made to the dynamic models are also explained in depth to give a clearer picture of how each adjustment affects the system performance. A list of proposed IRG units along with their locations were provided by SRP, a power utility in Arizona, which were to be integrated into the power flow and dynamic files. In the process of finding the maximum IRG penetration threshold, three sensitivities were also considered, namely, momentary cessation due to low voltages, transmission vs. distribution connected solar generation, and stalling of induction motors. Finally, the thesis discusses how the system reacts to the aforementioned modifications, and how IRG penetration threshold gets adjusted with regards to the different sensitivities applied to the system.
ContributorsAlbhrani, Hashem A M H S (Author) / Pal, Anamitra (Thesis advisor) / Holbert, Keith E. (Committee member) / Ayyanar, Raja (Committee member) / Arizona State University (Publisher)
Created2020
Description
Reliable and secure operation of bulk power transmission system components is an important aspect of electric power engineering. Component failures in a transmission network can lead to serious consequences and impact system reliability. The operational health of the transmission assets plays a crucial role in determining the reliability of an electric grid. To achieve this goal, scheduled maintenance of bulk power system components is an important activity to secure the transmission system against unanticipated events. This thesis identifies critical transmission elements in a 500 kV transmission network utilizing a ranking strategy.
The impact of the failure of transmission assets operated by a major utility company in the Southwest United States on its power system network is studied. A methodology is used to quantify the impact and subsequently rank transmission assets in decreasing order of their criticality. The analysis is carried out on the power system network using a node breaker model and steady state analysis. The light load case of spring 2019, peak load case of summer 2023 and two intermediate load cases have been considered for the ranking. The contingency simulations and power flow studies have been carried out using a commercial power flow study software package, Positive Sequence Load Flow (PSLF). The results obtained from PSLF are analyzed using Matlab to obtain the desired ranking. The ranked list of transmission assets will enable asset managers to identify the assets that have the most significant impact on the overall power system network performance. Therefore, investment and maintenance decisions can be made effectively. A conclusion along with a recommendation for future work is also provided in the thesis.
The impact of the failure of transmission assets operated by a major utility company in the Southwest United States on its power system network is studied. A methodology is used to quantify the impact and subsequently rank transmission assets in decreasing order of their criticality. The analysis is carried out on the power system network using a node breaker model and steady state analysis. The light load case of spring 2019, peak load case of summer 2023 and two intermediate load cases have been considered for the ranking. The contingency simulations and power flow studies have been carried out using a commercial power flow study software package, Positive Sequence Load Flow (PSLF). The results obtained from PSLF are analyzed using Matlab to obtain the desired ranking. The ranked list of transmission assets will enable asset managers to identify the assets that have the most significant impact on the overall power system network performance. Therefore, investment and maintenance decisions can be made effectively. A conclusion along with a recommendation for future work is also provided in the thesis.
ContributorsBhandari, Harsh Nandlal (Author) / Vittal, Vijay (Thesis advisor) / Heydt, Gerald T (Thesis advisor) / Ayyanar, Raja (Committee member) / Arizona State University (Publisher)
Created2019
Description
This paper introduces an application space of Power over Ethernet to Universal Serial Bus (USB) Power Delivery, and develops 3 different flyback approaches to a 45 Watt solution in the space. The designs of Fixed Frequency Flyback, Quasi-Resonant Flyback, and Active Clamp Flyback are developed for the application with 37 Volts (V) to 57 V Direct Current (DC) input voltage and 5 V, 9 V, 15 V, and 20 V output, and results are examined for the given specifications. Implementation based concerns are addressed for each topology during the design process. The systems are proven and tested for efficiency, thermals, and output voltage ripple across the operation range. The topologies are then compared for a cost and benefit analysis and their highlights are identified to showcase each systems prowess.
ContributorsNasir, Anthony Michael (Author) / Ayyanar, Raja (Thesis advisor) / Lei, Qin (Committee member) / Hari, Ajay (Committee member) / Arizona State University (Publisher)
Created2021
Description
The broad deployment of time-synchronized continuous point-on-wave (CPoW) modules will enable electric power utilities to gain unprecedented insight into the behavior of their power system assets, loads, and distributed renewable generation in real time. By increasing the available level of detail visible to operators, serious fault events such as wildfire-inducing arc flashes, safety-jeopardizing transformer failures, and equipment-damaging power quality decline can be mitigated in a data-driven, systematic manner. In this research project, a time-synchronized micro-scale CPoW module was designed, constructed, and characterized. This inductively powered CPoW module, which operates wirelessly by using the current flowing through a typical distribution conductor as its power source and a wireless data link for communication, has been configured to measure instantaneous line current at high frequency (nominally 3,000 samples per second) with 12-bit resolution. The design process for this module is detailed in this study, including background research, individual block design and testing, printed circuit board (PCB) design, and final characterization of the system.
To validate the performance of this module, tests of power requirements, measurement accuracy, battery life, susceptibility to electromagnetic interference, and fault detection performance were performed. The results indicate that the design under investigation will satisfy the technical and physical constraints required for bulk deployment in an actual distribution network after manufacturing optimizations. After the test results were summarized, the future research and development activities needed to finalize this design for commercial deployment were identified and discussed.
ContributorsPatterson, John (Author) / Pal, Anamitra (Thesis advisor) / Ogras, Umit (Committee member) / Ayyanar, Raja (Committee member) / Arizona State University (Publisher)
Created2021
Description
Nowadays, the widespread use of distributed generators (DGs) raises significant challenges for the design, planning, and operation of power systems. To avoid the harm caused by excessive DGs, evaluating the reliability and sustainability of the system with high penetration of DGs is essential. The concept of hosting capacity (HC) is used to achieve this purpose. It is to assess the capability of a distribution grid to accommodate DGs without causing damage or updating facilities. To obtain the HC value, traditional HC analysis methods face many problems, including the computational difficulties caused by the large-scale simulations and calculations, lacking the considering temporal correlation from data to data, and the inefficient on real-time analysis. This paper proposes a machine learning-based method, the Spatial-Temporal Long Short-Term Memory (ST-LSTM), to overcome these drawbacks using the traditional HC analysis method. This method will significantly reduce the requirement of calculations and simulations, and obtain HC results in real-time. Using the time-series load profiles and the longest path method, ST-LSTMs can capture the temporal information and spatial information respectively. Moreover, compared with the basic Long Short-Term Memory (LSTM) model, this modified model will improve the performance in the HC analysis by some specific designs, which are the sensitivity gate to consider voltage sensitivity information, the dual forget gates to build spatial and temporal correlation.
ContributorsWu, Jiaqi (Author) / Weng, Yang (Thesis advisor) / Ayyanar, Raja (Committee member) / Cook, Elizabeth (Committee member) / Arizona State University (Publisher)
Created2021