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Description
Programmable metallization cell (PMC) technology is based on an electrochemical phenomenon in which a metallic electrodeposit can be grown or dissolved between two electrodes depending on the voltage applied between them. Devices based on this phenomenon exhibit a unique, self-healing property, as a broken metallic structure can be healed by

Programmable metallization cell (PMC) technology is based on an electrochemical phenomenon in which a metallic electrodeposit can be grown or dissolved between two electrodes depending on the voltage applied between them. Devices based on this phenomenon exhibit a unique, self-healing property, as a broken metallic structure can be healed by applying an appropriate voltage between the two broken ends. This work explores methods of fabricating interconnects and switches based on PMC technology on flexible substrates. The objective was the evaluation of the feasibility of using this technology in flexible electronics applications in which reliability is a primary concern. The re-healable property of the interconnect is characterized for the silver doped germanium selenide (Ag-Ge-Se) solid electrolyte system. This property was evaluated by measuring the resistances of the healed interconnect structures and comparing these to the resistances of the unbroken structures. The reliability of the interconnects in both unbroken and healed states is studied by investigating the resistances of the structures to DC voltages, AC voltages and different temperatures as a function of time. This work also explores replacing silver with copper for these interconnects to enhance their reliability. A model for PMC-based switches on flexible substrates is proposed and compared to the observed device behavior with the objective of developing a formal design methodology for these devices. The switches were subjected to voltage sweeps and their resistance was investigated as a function of sweep voltage. The resistance of the switches as a function of voltage pulse magnitude when placed in series with a resistance was also investigated. A model was then developed to explain the behavior of these devices. All observations were based on statistical measurements to account for random errors. The results of this work demonstrate that solid electrolyte based interconnects display self-healing capability, which depends on the applied healing voltage and the current limit. However, they fail at lower current densities than metal interconnects due to an ion-drift induced failure mechanism. The results on the PMC based switches demonstrate that a model comprising a Schottky diode in parallel with a variable resistor predicts the behavior of the device.
ContributorsBaliga, Sunil Ravindranath (Author) / Kozicki, Michael N (Thesis advisor) / Schroder, Dieter K. (Committee member) / Chae, Junseok (Committee member) / Alford, Terry L. (Committee member) / Arizona State University (Publisher)
Created2011
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Description
The increased use of commercial complementary metal-oxide-semiconductor (CMOS) technologies in harsh radiation environments has resulted in a new approach to radiation effects mitigation. This approach utilizes simulation to support the design of integrated circuits (ICs) to meet targeted tolerance specifications. Modeling the deleterious impact of ionizing radiation on ICs fabricated

The increased use of commercial complementary metal-oxide-semiconductor (CMOS) technologies in harsh radiation environments has resulted in a new approach to radiation effects mitigation. This approach utilizes simulation to support the design of integrated circuits (ICs) to meet targeted tolerance specifications. Modeling the deleterious impact of ionizing radiation on ICs fabricated in advanced CMOS technologies requires understanding and analyzing the basic mechanisms that result in buildup of radiation-induced defects in specific sensitive regions. Extensive experimental studies have demonstrated that the sensitive regions are shallow trench isolation (STI) oxides. Nevertheless, very little work has been done to model the physical mechanisms that result in the buildup of radiation-induced defects and the radiation response of devices fabricated in these technologies. A comprehensive study of the physical mechanisms contributing to the buildup of radiation-induced oxide trapped charges and the generation of interface traps in advanced CMOS devices is presented in this dissertation. The basic mechanisms contributing to the buildup of radiation-induced defects are explored using a physical model that utilizes kinetic equations that captures total ionizing dose (TID) and dose rate effects in silicon dioxide (SiO2). These mechanisms are formulated into analytical models that calculate oxide trapped charge density (Not) and interface trap density (Nit) in sensitive regions of deep-submicron devices. Experiments performed on field-oxide-field-effect-transistors (FOXFETs) and metal-oxide-semiconductor (MOS) capacitors permit investigating TID effects and provide a comparison for the radiation response of advanced CMOS devices. When used in conjunction with closed-form expressions for surface potential, the analytical models enable an accurate description of radiation-induced degradation of transistor electrical characteristics. In this dissertation, the incorporation of TID effects in advanced CMOS devices into surface potential based compact models is also presented. The incorporation of TID effects into surface potential based compact models is accomplished through modifications of the corresponding surface potential equations (SPE), allowing the inclusion of radiation-induced defects (i.e., Not and Nit) into the calculations of surface potential. Verification of the compact modeling approach is achieved via comparison with experimental data obtained from FOXFETs fabricated in a 90 nm low-standby power commercial bulk CMOS technology and numerical simulations of fully-depleted (FD) silicon-on-insulator (SOI) n-channel transistors.
ContributorsSanchez Esqueda, Ivan (Author) / Barnaby, Hugh J (Committee member) / Schroder, Dieter (Thesis advisor) / Schroder, Dieter K. (Committee member) / Holbert, Keith E. (Committee member) / Gildenblat, Gennady (Committee member) / Arizona State University (Publisher)
Created2011
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Description
High-Resistivity Silicon (HRS) substrates are important for low-loss, high-performance microwave and millimeter wave devices in high-frequency telecommunication systems. The highest resistivity of up to ~10,000 ohm.cm is Float Zone (FZ) grown Si which is produced in small quantities and moderate wafer diameter. The more common Czochralski (CZ) Si can achieve

High-Resistivity Silicon (HRS) substrates are important for low-loss, high-performance microwave and millimeter wave devices in high-frequency telecommunication systems. The highest resistivity of up to ~10,000 ohm.cm is Float Zone (FZ) grown Si which is produced in small quantities and moderate wafer diameter. The more common Czochralski (CZ) Si can achieve resistivities of around 1000 ohm.cm, but the wafers contain oxygen that can lead to thermal donor formation with donor concentration significantly higher (~1015 cm-3) than the dopant concentration (~1012-1013 cm-3) of such high-resistivity Si leading to resistivity changes and possible type conversion of high-resistivity p-type silicon. In this research capacitance-voltage (C-V) characterization is employed to study the donor formation and type conversion of p-type High-resistivity Silicon-On-Insulator (HRSOI) wafers and the challenges involved in C-V characterization of HRSOI wafers using a Schottky contact are highlighted. The maximum capacitance of bulk or Silicon-On-Insulator (SOI) wafers is governed by the gate/contact area. During C-V characterization of high-resistivity SOI wafers with aluminum contacts directly on the Si film (Schottky contact); it was observed that the maximum capacitance is much higher than that due to the contact area, suggesting bias spreading due to the distributed transmission line of the film resistance and the buried oxide capacitance. In addition, an "S"-shape C-V plot was observed in the accumulation region. The effects of various factors, such as: frequency, contact and substrate sizes, gate oxide, SOI film thickness, film and substrate doping, carrier lifetime, contact work-function, temperature, light, annealing temperature and radiation on the C-V characteristics of HRSOI wafers are studied. HRSOI wafers have the best crosstalk prevention capability compared to other types of wafers, which plays a major role in system-on-chip configuration to prevent coupling between high frequency digital and sensitive analog circuits. Substrate crosstalk in HRSOI and various factors affecting the crosstalk, such as: substrate resistivity, separation between devices, buried oxide (BOX) thickness, radiation, temperature, annealing, light, and device types are discussed. Also various ways to minimize substrate crosstalk are studied and a new characterization method is proposed. Owing to their very low doping concentrations and the presence of oxygen in CZ wafers, HRS wafers pose a challenge in resistivity measurement using conventional techniques such as four-point probe and Hall measurement methods. In this research the challenges in accurate resistivity measurement using four-point probe, Hall method, and C-V profile are highlighted and a novel approach to extract resistivity of HRS wafers based on Impedance Spectroscopy measurements using polymer dielectrics such as Polystyrene and Poly Methyl Methacrylate (PMMA) is proposed.
ContributorsNayak, Pinakpani (Author) / Schroder, Dieter K. (Thesis advisor) / Vasileska, Dragica (Committee member) / Kozicki, Michael (Committee member) / Aberle, James T., 1961- (Committee member) / Arizona State University (Publisher)
Created2012
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Description
Silicon carbide (SiC), long touted as a material that can satisfy the specific property requirements for high temperature and high power applications, was studied quantitatively using various techniques. The electronic band structure of 4H SiC is examined in the first half of this dissertation. A brief introduction to band structure

Silicon carbide (SiC), long touted as a material that can satisfy the specific property requirements for high temperature and high power applications, was studied quantitatively using various techniques. The electronic band structure of 4H SiC is examined in the first half of this dissertation. A brief introduction to band structure calculations, with particular emphasis on the empirical pseudopotential method, is given as a foundation for the subsequent work. Next, the crystal pseudopotential for 4H SiC is derived in detail, and a novel approach using a genetic algorithm search routine is employed to find the fitting parameters needed to generate the band structure. Using this technique, the band structure is fitted to experimentally measured energy band gaps giving an indirect band gap energy of 3.28 eV, and direct f¡, M, K and L energy transitions of 6.30, 4.42, 7.90 and 6.03 eV, respectively. The generated result is also shown to give effective mass values of mMf¡*=0.66m0, mMK*=0.31m0, mML*=0.34m0, in close agreement with experimental results. The second half of this dissertation discusses computational work in finding the electron Hall mobility and Hall scattering factor for 6H SiC. This disscussion begins with an introductory chapter that gives background on how scattering rates are dervied and the specific expressions for important mechanisms. The next chapter discusses mobility calculations for 6H SiC in particular, beginnning with Rode's method to solve the Boltzmann transport equation. Using this method and the transition rates of the previous chapter, an acoustic deformation potential DA value of 5.5 eV, an inter-valley phonon deformation potential Dif value of 1.25~1011 eV/m and inter-valley phonon energy ℏfÖif of 65 meV that simultaneously fit experimental data on electron Hall mobility and Hall scattering factor was found.
ContributorsNg, Garrick (Author) / Schroder, Dieter K. (Thesis advisor) / Vasileska, Dragica (Committee member) / Skromme, Brian (Committee member) / Alford, Terry (Committee member) / Marinella, Matthew (Committee member) / Arizona State University (Publisher)
Created2010
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Description
Programmable Metallization Cell (PMC) is a resistance-switching device based on migration of nanoscale quantities of cations in a solid electrolyte and formation of a conducting electrodeposit by the reductions of these cations. This dissertation presents electrical characterization results on Cu-SiO2 based PMC devices, which due to the na- ture of

Programmable Metallization Cell (PMC) is a resistance-switching device based on migration of nanoscale quantities of cations in a solid electrolyte and formation of a conducting electrodeposit by the reductions of these cations. This dissertation presents electrical characterization results on Cu-SiO2 based PMC devices, which due to the na- ture of materials can be easily integrated into the current Complimentary metal oxide semiconductor (CMOS) process line. Device structures representing individual mem- ory cells based on W bottom electrode and n-type Si bottom electrode were fabricated for characterization. For the W bottom electrode based devices, switching was ob- served for voltages in the range of 500mV and current value as low as 100 nA showing the electrochemical nature and low power potential. The ON state showed a direct de- pendence on the programming current, showing the possibility of multi-bit storage in a single cell. Room temperature retention was demonstrated in excess of 105 seconds and endurance to approximately 107 cycles. Switching was observed for microsecond duration 3 V amplitude pulses. Material characterization results from Raman, X-ray diffraction, Rutherford backscattering and Secondary-ion mass spectroscopy analysis shows the influence of processing conditions on the Cu concentration within the film and also the presence of Cu as free atoms. The results seemed to indicate stress-induced void formation in the SiO2 matrix as the driving mechanism for Cu diffusion into the SiO2 film. Cu/SiO2
Si based PMC devices were characterized and were shown to have inherent isolation characteristics, proving the feasibility of such a structure for a passive array. The inherent isolation property simplifies fabrication by avoiding the need for a separate diode element in an array. The isolation characteristics were studied mainly in terms of the leakage current. The nature of the diode interface was further studied by extracting a barrier potential which shows it can be approximated to a Cu-nSi metal semiconductor Schottky diode.
ContributorsPuthenthermadam, Sarath (Author) / Kozicki, Michael N (Thesis advisor) / Diaz, Rodolfo (Committee member) / Schroder, Dieter K. (Committee member) / Alford, Terry (Committee member) / Arizona State University (Publisher)
Created2011
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Description
The object of this body of work is to study the properties and suitability of zinc oxide thin films with a view to engineering them for optoelectronics applications, making them a cheap and effective alternative to indium tin oxide (ITO), the most used transparent conducting oxides in the industry. Initially,

The object of this body of work is to study the properties and suitability of zinc oxide thin films with a view to engineering them for optoelectronics applications, making them a cheap and effective alternative to indium tin oxide (ITO), the most used transparent conducting oxides in the industry. Initially, a study was undertaken to examine the behavior of silver contacts to ZnO and ITO during thermal processing, a step frequently used in materials processing in optoelectronics. The second study involved an attempt to improve the conductivity of ZnO films by inserting a thin copper layer between two ZnO layers. The Hall resistivity of the films was as low as 6.9×10-5 -cm with a carrier concentration of 1.2×1022 cm-3 at the optimum copper layer thickness. The physics of conduction in the films has been examined. In order to improve the average visible transmittance, we replaced the copper layer with gold. The films were then found to undergo a seven orders of magnitude drop in effective resistivity from 200 -cm to 5.2×10-5 -cm The films have an average transmittance between 75% and 85% depending upon the gold thickness, and a peak transmittance of up to 93%. The best Haacke figure of merit was 15.1×10-3 . Finally, to test the multilayer transparent electrodes on a device, ZnO/Au/ZnO (ZAZ) electrodes were evaluated as transparent electrodes for organic light-emitting devices (OLEDs). The electrodes exhibited substantially enhanced conductivity (about 8×10-5 -cm) over conventional indium tin oxide (ITO) electrodes (about 3.2×10-5 -cm). OLEDs fabricated with the ZAZ electrodes showed reduced leakage compared to control OLEDs on ITO and reduced ohmic losses at high current densities. At a luminance of 25000 cd/m2, the lum/W efficiency of the ZAZ electrode based device improved by 5% compared to the device on ITO. A normalized intensity graph of the colour output from the green OLEDs shows that ZAZ electrodes allow for a broader spectral output in the green wavelength region of peak photopic sensitivity compared to ITO. The results have implications for electrode choice in display technology.
ContributorsSivaramakrishnan, Karthik (Author) / Alford, Terry L. (Thesis advisor) / Schroder, Dieter K. (Committee member) / Newman, Nathan (Committee member) / Theodore, David N (Committee member) / Arizona State University (Publisher)
Created2010