Matching Items (149)
Filtering by

Clear all filters

152139-Thumbnail Image.png
Description
ABSTRACT Developing new non-traditional device models is gaining popularity as the silicon-based electrical device approaches its limitation when it scales down. Membrane systems, also called P systems, are a new class of biological computation model inspired by the way cells process chemical signals. Spiking Neural P systems (SNP systems), a

ABSTRACT Developing new non-traditional device models is gaining popularity as the silicon-based electrical device approaches its limitation when it scales down. Membrane systems, also called P systems, are a new class of biological computation model inspired by the way cells process chemical signals. Spiking Neural P systems (SNP systems), a certain kind of membrane systems, is inspired by the way the neurons in brain interact using electrical spikes. Compared to the traditional Boolean logic, SNP systems not only perform similar functions but also provide a more promising solution for reliable computation. Two basic neuron types, Low Pass (LP) neurons and High Pass (HP) neurons, are introduced. These two basic types of neurons are capable to build an arbitrary SNP neuron. This leads to the conclusion that these two basic neuron types are Turing complete since SNP systems has been proved Turing complete. These two basic types of neurons are further used as the elements to construct general-purpose arithmetic circuits, such as adder, subtractor and comparator. In this thesis, erroneous behaviors of neurons are discussed. Transmission error (spike loss) is proved to be equivalent to threshold error, which makes threshold error discussion more universal. To improve the reliability, a new structure called motif is proposed. Compared to Triple Modular Redundancy improvement, motif design presents its efficiency and effectiveness in both single neuron and arithmetic circuit analysis. DRAM-based CMOS circuits are used to implement the two basic types of neurons. Functionality of basic type neurons is proved using the SPICE simulations. The motif improved adder and the comparator, as compared to conventional Boolean logic design, are much more reliable with lower leakage, and smaller silicon area. This leads to the conclusion that SNP system could provide a more promising solution for reliable computation than the conventional Boolean logic.
ContributorsAn, Pei (Author) / Cao, Yu (Thesis advisor) / Barnaby, Hugh (Committee member) / Chakrabarti, Chaitali (Committee member) / Arizona State University (Publisher)
Created2013
152151-Thumbnail Image.png
Description
Fluxgate sensors are magnetic field sensors that can measure DC and low frequency AC magnetic fields. They can measure much lower magnetic fields than other magnetic sensors like Hall effect sensors, magnetoresistive sensors etc. They also have high linearity, high sensitivity and low noise. The major application of fluxgate sensors

Fluxgate sensors are magnetic field sensors that can measure DC and low frequency AC magnetic fields. They can measure much lower magnetic fields than other magnetic sensors like Hall effect sensors, magnetoresistive sensors etc. They also have high linearity, high sensitivity and low noise. The major application of fluxgate sensors is in magnetometers for the measurement of earth's magnetic field. Magnetometers are used in navigation systems and electronic compasses. Fluxgate sensors can also be used to measure high DC currents. Integrated micro-fluxgate sensors have been developed in recent years. These sensors have much lower power consumption and area compared to their PCB counterparts. The output voltage of micro-fluxgate sensors is very low which makes the analog front end more complex and results in an increase in power consumption of the system. In this thesis a new analog front-end circuit for micro-fluxgate sensors is developed. This analog front-end circuit uses charge pump based excitation circuit and phase delay based read-out chain. With these two features the power consumption of analog front-end is reduced. The output is digital and it is immune to amplitude noise at the output of the sensor. Digital output is produced without using an ADC. A SPICE model of micro-fluxgate sensor is used to verify the operation of the analog front-end and the simulation results show very good linearity.
ContributorsPappu, Karthik (Author) / Bakkaloglu, Bertan (Thesis advisor) / Christen, Jennifer Blain (Committee member) / Yu, Hongbin (Committee member) / Arizona State University (Publisher)
Created2013
151937-Thumbnail Image.png
Description
Integrated photonics requires high gain optical materials in the telecom wavelength range for optical amplifiers and coherent light sources. Erbium (Er) containing materials are ideal candidates due to the 1.5 μm emission from Er3+ ions. However, the Er density in typical Er-doped materials is less than 1 x 1020 cm-3,

Integrated photonics requires high gain optical materials in the telecom wavelength range for optical amplifiers and coherent light sources. Erbium (Er) containing materials are ideal candidates due to the 1.5 μm emission from Er3+ ions. However, the Er density in typical Er-doped materials is less than 1 x 1020 cm-3, thus limiting the maximum optical gain to a few dB/cm, too small to be useful for integrated photonics applications. Er compounds could potentially solve this problem since they contain much higher Er density. So far the existing Er compounds suffer from short lifetime and strong upconversion effects, mainly due to poor quality of crystals produced by various methods of thin film growth and deposition. This dissertation explores a new Er compound: erbium chloride silicate (ECS, Er3(SiO4)2Cl ) in the nanowire form, which facilitates the growth of high quality single crystals. Growth methods for such single crystal ECS nanowires have been established. Various structural and optical characterizations have been carried out. The high crystal quality of ECS material leads to a long lifetime of the first excited state of Er3+ ions up to 1 ms at Er density higher than 1022 cm-3. This Er lifetime-density product was found to be the largest among all Er containing materials. A unique integrating sphere method was developed to measure the absorption cross section of ECS nanowires from 440 to 1580 nm. Pump-probe experiments demonstrated a 644 dB/cm signal enhancement from a single ECS wire. It was estimated that such large signal enhancement can overcome the absorption to result in a net material gain, but not sufficient to compensate waveguide propagation loss. In order to suppress the upconversion process in ECS, Ytterbium (Yb) and Yttrium (Y) ions are introduced as substituent ions of Er in the ECS crystal structure to reduce Er density. While the addition of Yb ions only partially succeeded, erbium yttrium chloride silicate (EYCS) with controllable Er density was synthesized successfully. EYCS with 30 at. % Er was found to be the best. It shows the strongest PL emission at 1.5 μm, and thus can be potentially used as a high gain material.
ContributorsYin, Leijun (Author) / Ning, Cun-Zheng (Thesis advisor) / Chamberlin, Ralph (Committee member) / Yu, Hongbin (Committee member) / Menéndez, Jose (Committee member) / Ponce, Fernando (Committee member) / Arizona State University (Publisher)
Created2013
151675-Thumbnail Image.png
Description
This dissertation is on the study of structural and optical properties of some III-V and II-VI compound semiconductors. The first part of this dissertation is a study of the deformation mechanisms associated with nanoindentation and nanoscratching of InP, GaN, and ZnO crystals. The second part is an investigation of some

This dissertation is on the study of structural and optical properties of some III-V and II-VI compound semiconductors. The first part of this dissertation is a study of the deformation mechanisms associated with nanoindentation and nanoscratching of InP, GaN, and ZnO crystals. The second part is an investigation of some fundamental issues regarding compositional fluctuations and microstructure in GaInNAs and InAlN alloys. In the first part, the microstructure of (001) InP scratched in an atomic force microscope with a small diamond tip has been studied as a function of applied normal force and crystalline direction in order to understand at the nanometer scale the deformation mechanisms in the zinc-blende structure. TEM images show deeper dislocation propagation for scratches along <110> compared to <100>. High strain fields were observed in <100> scratches, indicating hardening due to locking of dislocations gliding on different slip planes. Reverse plastic flow have been observed in <110> scratches in the form of pop-up events that result from recovery of stored elastic strain. In a separate study, nanoindentation-induced plastic deformation has been studied in c-, a-, and m-plane ZnO single crystals and c-plane GaN respectively, to study the deformation mechanism in wurtzite hexagonal structures. TEM results reveal that the prime deformation mechanism is slip on basal planes and in some cases, on pyramidal planes, and strain built up along particular directions. No evidence of phase transformation or cracking was observed in both materials. CL imaging reveals quenching of near band-edge emission by dislocations. In the second part, compositional inhomogeneity in quaternary GaInNAs and ternary InAlN alloys has been studied using TEM. It is shown that exposure to antimony during growth of GaInNAs results in uniform chemical composition in the epilayer, as antimony suppresses the surface mobility of adatoms that otherwise leads to two-dimensional growth and elemental segregation. In a separate study, compositional instability is observed in lattice-matched InAlN films grown on GaN, for growth beyond a certain thickness. Beyond 200 nm of thickness, two sub-layers with different indium content are observed, the top one with lower indium content.
ContributorsHuang, Jingyi (Author) / Ponce, Fernando A. (Thesis advisor) / Carpenter, Ray W (Committee member) / Smith, David J. (Committee member) / Yu, Hongbin (Committee member) / Treacy, Michael Mj (Committee member) / Arizona State University (Publisher)
Created2013
151337-Thumbnail Image.png
Description
One dimensional (1D) and quasi-one dimensional quantum wires have been a subject of both theoretical and experimental interest since 1990s and before. Phenomena such as the "0.7 structure" in the conductance leave many open questions. In this dissertation, I study the properties and the internal electron states of semiconductor quantum

One dimensional (1D) and quasi-one dimensional quantum wires have been a subject of both theoretical and experimental interest since 1990s and before. Phenomena such as the "0.7 structure" in the conductance leave many open questions. In this dissertation, I study the properties and the internal electron states of semiconductor quantum wires with the path integral Monte Carlo (PIMC) method. PIMC is a tool for simulating many-body quantum systems at finite temperature. Its ability to calculate thermodynamic properties and various correlation functions makes it an ideal tool in bridging experiments with theories. A general study of the features interpreted by the Luttinger liquid theory and observed in experiments is first presented, showing the need for new PIMC calculations in this field. I calculate the DC conductance at finite temperature for both noninteracting and interacting electrons. The quantized conductance is identified in PIMC simulations without making the same approximation in the Luttinger model. The low electron density regime is subject to strong interactions, since the kinetic energy decreases faster than the Coulomb interaction at low density. An electron state called the Wigner crystal has been proposed in this regime for quasi-1D wires. By using PIMC, I observe the zig-zag structure of the Wigner crystal. The quantum fluctuations suppress the long range correla- tions, making the order short-ranged. Spin correlations are calculated and used to evaluate the spin coupling strength in a zig-zag state. I also find that as the density increases, electrons undergo a structural phase transition to a dimer state, in which two electrons of opposite spins are coupled across the two rows of the zig-zag. A phase diagram is sketched for a range of densities and transverse confinements. The quantum point contact (QPC) is a typical realization of quantum wires. I study the QPC by explicitly simulating a system of electrons in and around a Timp potential (Timp, 1992). Localization of a single electron in the middle of the channel is observed at 5 K, as the split gate voltage increases. The DC conductance is calculated, which shows the effect of the Coulomb interaction. At 1 K and low electron density, a state similar to the Wigner crystal is found inside the channel.
ContributorsLiu, Jianheng, 1982- (Author) / Shumway, John B (Thesis advisor) / Schmidt, Kevin E (Committee member) / Chen, Tingyong (Committee member) / Yu, Hongbin (Committee member) / Ros, Robert (Committee member) / Arizona State University (Publisher)
Created2012
151354-Thumbnail Image.png
Description
The design and development of analog/mixed-signal (AMS) integrated circuits (ICs) is becoming increasingly expensive, complex, and lengthy. Rapid prototyping and emulation of analog ICs will be significant in the design and testing of complex analog systems. A new approach, Programmable ANalog Device Array (PANDA) that maps any AMS design problem

The design and development of analog/mixed-signal (AMS) integrated circuits (ICs) is becoming increasingly expensive, complex, and lengthy. Rapid prototyping and emulation of analog ICs will be significant in the design and testing of complex analog systems. A new approach, Programmable ANalog Device Array (PANDA) that maps any AMS design problem to a transistor-level programmable hardware, is proposed. This approach enables fast system level validation and a reduction in post-Silicon bugs, minimizing design risk and cost. The unique features of the approach include 1) transistor-level programmability that emulates each transistor behavior in an analog design, achieving very fine granularity of reconfiguration; 2) programmable switches that are treated as a design component during analog transistor emulating, and optimized with the reconfiguration matrix; 3) compensation of AC performance degradation through boosting the bias current. Based on these principles, a digitally controlled PANDA platform is designed at 45nm node that can map AMS modules across 22nm to 90nm technology nodes. A systematic emulation approach to map any analog transistor to PANDA cell is proposed, which achieves transistor level matching accuracy of less than 5% for ID and less than 10% for Rout and Gm. Circuit level analog metrics of a voltage-controlled oscillator (VCO) emulated by PANDA, match to those of the original designs in 90nm nodes with less than a 5% error. Voltage-controlled delay lines at 65nm and 90nm are emulated by 32nm PANDA, which successfully match important analog metrics. And at-speed emulation is achieved as well. Several other 90nm analog blocks are successfully emulated by the 45nm PANDA platform, including a folded-cascode operational amplifier and a sample-and-hold module (S/H)
ContributorsXu, Cheng (Author) / Cao, Yu (Thesis advisor) / Blain Christen, Jennifer (Committee member) / Bakkaloglu, Bertan (Committee member) / Arizona State University (Publisher)
Created2012
151296-Thumbnail Image.png
Description
Scaling of the classical planar MOSFET below 20 nm gate length is facing not only technological difficulties but also limitations imposed by short channel effects, gate and junction leakage current due to quantum tunneling, high body doping induced threshold voltage variation, and carrier mobility degradation. Non-classical multiple-gate structures such as

Scaling of the classical planar MOSFET below 20 nm gate length is facing not only technological difficulties but also limitations imposed by short channel effects, gate and junction leakage current due to quantum tunneling, high body doping induced threshold voltage variation, and carrier mobility degradation. Non-classical multiple-gate structures such as double-gate (DG) FinFETs and surrounding gate field-effect-transistors (SGFETs) have good electrostatic integrity and are an alternative to planar MOSFETs for below 20 nm technology nodes. Circuit design with these devices need compact models for SPICE simulation. In this work physics based compact models for the common-gate symmetric DG-FinFET, independent-gate asymmetric DG-FinFET, and SGFET are developed. Despite the complex device structure and boundary conditions for the Poisson-Boltzmann equation, the core structure of the DG-FinFET and SGFET models, are maintained similar to the surface potential based compact models for planar MOSFETs such as SP and PSP. TCAD simulations show differences between the transient behavior and the capacitance-voltage characteristics of bulk and SOI FinFETs if the gate-voltage swing includes the accumulation region. This effect can be captured by a compact model of FinFETs only if it includes the contribution of both types of carriers in the Poisson-Boltzmann equation. An accurate implicit input voltage equation valid in all regions of operation is proposed for common-gate symmetric DG-FinFETs with intrinsic or lightly doped bodies. A closed-form algorithm is developed for solving the new input voltage equation including ambipolar effects. The algorithm is verified for both the surface potential and its derivatives and includes a previously published analytical approximation for surface potential as a special case when ambipolar effects can be neglected. The symmetric linearization method for common-gate symmetric DG-FinFETs is developed in a form free of the charge-sheet approximation present in its original formulation for bulk MOSFETs. The accuracy of the proposed technique is verified by comparison with exact results. An alternative and computationally efficient description of the boundary between the trigonometric and hyperbolic solutions of the Poisson-Boltzmann equation for the independent-gate asymmetric DG-FinFET is developed in terms of the Lambert W function. Efficient numerical algorithm is proposed for solving the input voltage equation. Analytical expressions for terminal charges of an independent-gate asymmetric DG-FinFET are derived. The new charge model is C-infinity continuous, valid for weak as well as for strong inversion condition of both the channels and does not involve the charge-sheet approximation. This is accomplished by developing the symmetric linearization method in a form that does not require identical boundary conditions at the two Si-SiO2 interfaces and allows for volume inversion in the DG-FinFET. Verification of the model is performed with both numerical computations and 2D TCAD simulations under a wide range of biasing conditions. The model is implemented in a standard circuit simulator through Verilog-A code. Simulation examples for both digital and analog circuits verify good model convergence and demonstrate the capabilities of new circuit topologies that can be implemented using independent-gate asymmetric DG-FinFETs.
ContributorsDessai, Gajanan (Author) / Gildenblat, Gennady (Committee member) / McAndrew, Colin (Committee member) / Cao, Yu (Committee member) / Barnaby, Hugh (Committee member) / Arizona State University (Publisher)
Created2012
151454-Thumbnail Image.png
Description
Nitride semiconductors have wide applications in electronics and optoelectronics technologies. Understanding the nature of the optical recombination process and its effects on luminescence efficiency is important for the development of novel devices. This dissertation deals with the optical properties of nitride semiconductors, including GaN epitaxial layers and more complex heterostructures.

Nitride semiconductors have wide applications in electronics and optoelectronics technologies. Understanding the nature of the optical recombination process and its effects on luminescence efficiency is important for the development of novel devices. This dissertation deals with the optical properties of nitride semiconductors, including GaN epitaxial layers and more complex heterostructures. The emission characteristics are examined by cathodoluminescence spectroscopy and imaging, and are correlated with the structural and electrical properties studied by transmission electron microscopy and electron holography. Four major areas are covered in this dissertation, which are described next. The effect of strain on the emission characteristics in wurtzite GaN has been studied. The values of the residual strain in GaN epilayers with different dislocation densities are determined by x-ray diffraction, and the relationship between exciton emission energy and the in-plane residual strain is demonstrated. It shows that the emission energy increases withthe magnitude of the in-plane compressive strain. The temperature dependence of the emission characteristics in cubic GaN has been studied. It is observed that the exciton emission and donor-acceptor pair recombination behave differently with temperature. The donor-bound exciton binding energy has been measured to be 13 meV from the temperature dependence of the emission spectrum. It is also found that the ionization energies for both acceptors and donors are smaller in cubic compared with hexagonal structures, which should contribute to higher doping efficiencies. A comprehensive study on the structural and optical properties is presented for InGaN/GaN quantum wells emitting in the blue, green, and yellow regions of the electromagnetic spectrum. Transmission electron microscopy images indicate the presence of indium inhomogeneties which should be responsible for carrier localization. The temperature dependence of emission luminescence shows that the carrier localization effects become more significant with increasing emission wavelength. On the other hand, the effect of non-radiative recombination on luminescence efficiency also varies with the emission wavelength. The fast increase of the non-radiative recombination rate with temperature in the green emitting QWs contributes to the lower efficiency compared with the blue emitting QWs. The possible saturation of non-radiative recombination above 100 K may explain the unexpected high emission efficiency for the yellow emitting QWs Finally, the effects of InGaN underlayers on the electronic and optical properties of InGaN/GaN quantum wells emitting in visible spectral regions have been studied. A significant improvement of the emission efficiency is observed, which is associated with a blue shift in the emission energy, a reduced recombination lifetime, an increased spatial homogeneity in the luminescence, and a weaker internal field across the quantum wells. These are explained by a partial strain relaxation introduced by the InGaN underlayer, which is measured by reciprocal space mapping of the x-ray diffraction intensity.
ContributorsLi, Di (Author) / Ponce, Fernando (Thesis advisor) / Culbertson, Robert (Committee member) / Yu, Hongbin (Committee member) / Shumway, John (Committee member) / Menéndez, Jose (Committee member) / Arizona State University (Publisher)
Created2012
151410-Thumbnail Image.png
Description
Test cost has become a significant portion of device cost and a bottleneck in high volume manufacturing. Increasing integration density and shrinking feature sizes increased test time/cost and reduce observability. Test engineers have to put a tremendous effort in order to maintain test cost within an acceptable budget. Unfortunately, there

Test cost has become a significant portion of device cost and a bottleneck in high volume manufacturing. Increasing integration density and shrinking feature sizes increased test time/cost and reduce observability. Test engineers have to put a tremendous effort in order to maintain test cost within an acceptable budget. Unfortunately, there is not a single straightforward solution to the problem. Products that are tested have several application domains and distinct customer profiles. Some products are required to operate for long periods of time while others are required to be low cost and optimized for low cost. Multitude of constraints and goals make it impossible to find a single solution that work for all cases. Hence, test development/optimization is typically design/circuit dependent and even process specific. Therefore, test optimization cannot be performed using a single test approach, but necessitates a diversity of approaches. This works aims at addressing test cost minimization and test quality improvement at various levels. In the first chapter of the work, we investigate pre-silicon strategies, such as design for test and pre-silicon statistical simulation optimization. In the second chapter, we investigate efficient post-silicon test strategies, such as adaptive test, adaptive multi-site test, outlier analysis, and process shift detection/tracking.
ContributorsYilmaz, Ender (Author) / Ozev, Sule (Thesis advisor) / Bakkaloglu, Bertan (Committee member) / Cao, Yu (Committee member) / Christen, Jennifer Blain (Committee member) / Arizona State University (Publisher)
Created2012
151533-Thumbnail Image.png
Description
Memories play an integral role in today's advanced ICs. Technology scaling has enabled high density designs at the price paid for impact due to variability and reliability. It is imperative to have accurate methods to measure and extract the variability in the SRAM cell to produce accurate reliability projections for

Memories play an integral role in today's advanced ICs. Technology scaling has enabled high density designs at the price paid for impact due to variability and reliability. It is imperative to have accurate methods to measure and extract the variability in the SRAM cell to produce accurate reliability projections for future technologies. This work presents a novel test measurement and extraction technique which is non-invasive to the actual operation of the SRAM memory array. The salient features of this work include i) A single ended SRAM test structure with no disturbance to SRAM operations ii) a convenient test procedure that only requires quasi-static control of external voltages iii) non-iterative method that extracts the VTH variation of each transistor from eight independent switch point measurements. With the present day technology scaling, in addition to the variability with the process, there is also the impact of other aging mechanisms which become dominant. The various aging mechanisms like Negative Bias Temperature Instability (NBTI), Channel Hot Carrier (CHC) and Time Dependent Dielectric Breakdown (TDDB) are critical in the present day nano-scale technology nodes. In this work, we focus on the impact of NBTI due to aging in the SRAM cell and have used Trapping/De-Trapping theory based log(t) model to explain the shift in threshold voltage VTH. The aging section focuses on the following i) Impact of Statistical aging in PMOS device due to NBTI dominates the temporal shift of SRAM cell ii) Besides static variations , shifting in VTH demands increased guard-banding margins in design stage iii) Aging statistics remain constant during the shift, presenting a secondary effect in aging prediction. iv) We have investigated to see if the aging mechanism can be used as a compensation technique to reduce mismatch due to process variations. Finally, the entire test setup has been tested in SPICE and also validated with silicon and the results are presented. The method also facilitates the study of design metrics such as static, read and write noise margins and also the data retention voltage and thus help designers to improve the cell stability of SRAM.
ContributorsRavi, Venkatesa (Author) / Cao, Yu (Thesis advisor) / Bakkaloglu, Bertan (Committee member) / Clark, Lawrence (Committee member) / Arizona State University (Publisher)
Created2013