Matching Items (4)
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- All Subjects: Audio amplifiers--Design and construction.
- All Subjects: Metasurface
- Creators: Bai, Jing
- Creators: Chakraborty, Bijeta
Description
Efficiency of components is an ever increasing area of importance to portable applications, where a finite battery means finite operating time. Higher efficiency devices need to be designed that don't compromise on the performance that the consumer has come to expect. Class D amplifiers deliver on the goal of increased efficiency, but at the cost of distortion. Class AB amplifiers have low efficiency, but high linearity. By modulating the supply voltage of a Class AB amplifier to make a Class H amplifier, the efficiency can increase while still maintaining the Class AB level of linearity. A 92dB Power Supply Rejection Ratio (PSRR) Class AB amplifier and a Class H amplifier were designed in a 0.24um process for portable audio applications. Using a multiphase buck converter increased the efficiency of the Class H amplifier while still maintaining a fast response time to respond to audio frequencies. The Class H amplifier had an efficiency above the Class AB amplifier by 5-7% from 5-30mW of output power without affecting the total harmonic distortion (THD) at the design specifications. The Class H amplifier design met all design specifications and showed performance comparable to the designed Class AB amplifier across 1kHz-20kHz and 0.01mW-30mW. The Class H design was able to output 30mW into 16Ohms without any increase in THD. This design shows that Class H amplifiers merit more research into their potential for increasing efficiency of audio amplifiers and that even simple designs can give significant increases in efficiency without compromising linearity.
ContributorsPeterson, Cory (Author) / Bakkaloglu, Bertan (Thesis advisor) / Barnaby, Hugh (Committee member) / Kiaei, Sayfe (Committee member) / Arizona State University (Publisher)
Created2013
Description
Class D Amplifiers are widely used in portable systems such as mobile phones to achieve high efficiency. The demands of portable electronics for low power consumption to extend battery life and reduce heat dissipation mandate efficient, high-performance audio amplifiers. The high efficiency of Class D amplifiers (CDAs) makes them particularly attractive for portable applications. The Digital class D amplifier is an interesting solution to increase the efficiency of embedded systems. However, this solution is not good enough in terms of PWM stage linearity and power supply rejection. An efficient control is needed to correct the error sources in order to get a high fidelity sound quality in the whole audio range of frequencies. A fundamental analysis on various error sources due to non idealities in the power stage have been discussed here with key focus on Power supply perturbations driving the Power stage of a Class D Audio Amplifier. Two types of closed loop Digital Class D architecture for PSRR improvement have been proposed and modeled. Double sided uniform sampling modulation has been used. One of the architecture uses feedback around the power stage and the second architecture uses feedback into digital domain. Simulation & experimental results confirm that the closed loop PSRR & PS-IMD improve by around 30-40 dB and 25 dB respectively.
ContributorsChakraborty, Bijeta (Author) / Bakkaloglu, Bertan (Thesis advisor) / Garrity, Douglas (Committee member) / Ozev, Sule (Committee member) / Arizona State University (Publisher)
Created2012
Description
In this thesis, a digital input class D audio amplifier system which has the ability
to reject the power supply noise and nonlinearly of the output stage is presented. The main digital class D feed-forward path is using the fully-digital sigma-delta PWM open loop topology. Feedback loop is used to suppress the power supply noise and harmonic distortions. The design is using global foundry 0.18um technology.
Based on simulation, the power supply rejection at 200Hz is about -49dB with
81dB dynamic range and -70dB THD+N. The full scale output power can reach as high as 27mW and still keep minimum -68dB THD+N. The system efficiency at full scale is about 82%.
to reject the power supply noise and nonlinearly of the output stage is presented. The main digital class D feed-forward path is using the fully-digital sigma-delta PWM open loop topology. Feedback loop is used to suppress the power supply noise and harmonic distortions. The design is using global foundry 0.18um technology.
Based on simulation, the power supply rejection at 200Hz is about -49dB with
81dB dynamic range and -70dB THD+N. The full scale output power can reach as high as 27mW and still keep minimum -68dB THD+N. The system efficiency at full scale is about 82%.
ContributorsBai, Jing (Author) / Bakkaloglu, Bertan (Thesis advisor) / Arizona State University (Publisher)
Created2015
Description
Polarization detection and control techniques play essential roles in various applications, including optical communication, polarization imaging, chemical analysis, target detection, and biomedical diagnosis. Conventional methods for polarization detection and polarization control require bulky optical systems. Flat optics opens a new way for ultra-compact, lower-cost devices and systems for polarization detection and control. However, polarization measurement and manipulating devices with high efficiency and accuracy in the mid-infrared (MIR) range remain elusive. This dissertation presented design concepts and experimental demonstrations of full-Stokes parameters detection and polarization generation devices based on chip-integrated plasmonic metasurfaces with high performance and record efficiency. One of the significant challenges for full-Stokes polarization detection is to achieve high-performance circular polarization (CP) filters. The first design presented in this dissertation is based on the direct integration of plasmonic quarter-wave plate (QWP) onto gold nanowire gratings. It is featured with the subwavelength thickness (~500nm) and extinction ratio around 16. The second design is based on the anisotropic thin-film interference between two vertically integrated anisotropic plasmonic metasurfaces. It provides record high efficiency (around 90%) and extinction ratio (>180). These plasmonic CP filters can be used for circular, elliptical, and linear polarization generation at different wavelengths. The maximum degree of circular polarization (DOCP) measured from the sample achieves 0.99998.
The proposed CP filters were integrated with nanograting-based linear polarization (LP) filters on the same chip for single-shot polarization detection. Full-Stokes measurements were experimentally demonstrated with high accuracy at the single wavelength using the direct subtraction method and over a broad wavelength range from 3.5 to 4.5mm using the Mueller matrix method. This design concept was later expanded to a pixelized array of polarization filters. A full-Stokes imaging system was experimentally demonstrated based on integrating a metasurface with pixelized polarization filters arrays and an MIR camera.
ContributorsBai, Jing (Author) / Yao, Yu (Thesis advisor) / Balanis, Constantine A. (Committee member) / Wang, Liping (Committee member) / Zhang, Yong-Hang (Committee member) / Arizona State University (Publisher)
Created2021