Matching Items (4)
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- All Subjects: CBRAM
- Creators: Barnaby, Hugh J
- Creators: Yu, Shimeng
Description
Advances in software and applications continue to demand advances in memory. The ideal memory would be non-volatile and have maximal capacity, speed, retention time, endurance, and radiation hardness while also having minimal physical size, energy usage, and cost. The programmable metallization cell (PMC) is an emerging memory technology that is likely to surpass flash memory in all the listed ideal memory characteristics. A comprehensive physics-based model is needed to fully understand PMC operation and aid in design optimization. With the intent of advancing the PMC modeling effort, this thesis presents two simulation models for the PMC. The first model is a finite element model based on Silvaco Atlas finite element analysis software. Limitations of the software are identified that make this model inconsistent with the operating mechanism of the PMC. The second model is a physics-based numerical model developed for the PMC. This model is successful in matching data measured from a chalcogenide glass PMC designed and manufactured at ASU. Matched operating characteristics observable in the current and resistance vs. voltage data include the OFF/ON resistances and write/erase and electrodeposition voltage thresholds. Multilevel programming is also explained and demonstrated with the numerical model. The numerical model has already proven useful by revealing some information presented about the operation and characteristics of the PMC.
ContributorsOleksy, David Ryan (Author) / Barnaby, Hugh J (Thesis advisor) / Kozicki, Michael N (Committee member) / Edwards, Arthur H (Committee member) / Arizona State University (Publisher)
Created2013
Description
This work focuses on the existence of multiple resistance states in a type of emerging non-volatile resistive memory device known commonly as Programmable Metallization Cell (PMC) or Conductive Bridge Random Access Memory (CBRAM), which can be important for applications such as multi-bit memory as well as non-volatile logic and neuromorphic computing. First, experimental data from small signal, quasi-static and pulsed mode electrical characterization of such devices are presented which clearly demonstrate the inherent multi-level resistance programmability property in CBRAM devices. A physics based analytical CBRAM compact model is then presented which simulates the ion-transport dynamics and filamentary growth mechanism that causes resistance change in such devices. Simulation results from the model are fitted to experimental dynamic resistance switching characteristics. The model designed using Verilog-a language is computation-efficient and can be integrated with industry standard circuit simulation tools for design and analysis of hybrid circuits involving both CMOS and CBRAM devices. Three main circuit applications for CBRAM devices are explored in this work. Firstly, the susceptibility of CBRAM memory arrays to single event induced upsets is analyzed via compact model simulation and experimental heavy ion testing data that show possibility of both high resistance to low resistance and low resistance to high resistance transitions due to ion strikes. Next, a non-volatile sense amplifier based flip-flop architecture is proposed which can help make leakage power consumption negligible by allowing complete shutdown of power supply while retaining its output data in CBRAM devices. Reliability and energy consumption of the flip-flop circuit for different CBRAM low resistance levels and supply voltage values are analyzed and compared to CMOS designs. Possible extension of this architecture for threshold logic function computation using the CBRAM devices as re-configurable resistive weights is also discussed. Lastly, Spike timing dependent plasticity (STDP) based gradual resistance change behavior in CBRAM device fabricated in back-end-of-line on a CMOS die containing integrate and fire CMOS neuron circuits is demonstrated for the first time which indicates the feasibility of using CBRAM devices as electronic synapses in spiking neural network hardware implementations for non-Boolean neuromorphic computing.
ContributorsMahalanabis, Debayan (Author) / Barnaby, Hugh J. (Thesis advisor) / Kozicki, Michael N. (Committee member) / Vrudhula, Sarma (Committee member) / Yu, Shimeng (Committee member) / Arizona State University (Publisher)
Created2015
Description
This work investigates the effects of ionizing radiation and displacement damage on the retention of state, DC programming, and neuromorphic pulsed programming of Ag-Ge30Se70 conductive bridging random access memory (CBRAM) devices. The results show that CBRAM devices are susceptible to both environments. An observable degradation in electrical response due to total ionizing dose (TID) is shown during neuromorphic pulsed programming at TID below 1 Mrad using Cobalt-60. DC cycling in a 14 MeV neutron environment showed a collapse of the high resistance state (HRS) and low resistance state (LRS) programming window after a fluence of 4.9x10^{12} n/cm^2, demonstrating the CBRAM can fail in a displacement damage environment. Heavy ion exposure during retention testing and DC cycling, showed that failures to programming occurred at approximately the same threshold, indicating that the failure mechanism for the two types of tests may be the same. The dose received due to ionizing electronic interactions and non-ionizing kinetic interactions, was calculated for each ion species at the fluence of failure. TID values appear to be the most correlated, indicating that TID effects may be the dominate failure mechanism in a combined environment, though it is currently unclear as to how the displacement damage also contributes to the response. An analysis of material effects due to TID has indicated that radiation damage can limit the migration of Ag+ ions. The reduction in ion current density can explain several of the effects observed in CBRAM while in the LRS.
ContributorsTaggart, Jennifer L (Author) / Barnaby, Hugh J (Thesis advisor) / Kozicki, Michael N (Committee member) / Holbert, Keith E. (Committee member) / Yu, Shimeng (Committee member) / Arizona State University (Publisher)
Created2018
Description
The Programmable Metallization Cell (PMC) is a novel solid-state resistive switching technology. It has a simple metal-insulator-metal “MIM” structure with one metal being electrochemically active (Cu) and the other one being inert (Pt or W), an insulating film (silica) acts as solid electrolyte for ion transport is sandwiched between these two electrodes. PMC’s resistance can be altered by an external electrical stimulus. The change of resistance is attributed to the formation or dissolution of Cu metal filament(s) within the silica layer which is associated with electrochemical redox reactions and ion transportation. In this dissertation, a comprehensive study of microfabrication method and its impacts on performance of PMC device is demonstrated, gamma-ray total ionizing dose (TID) impacts on device reliability is investigated, and the materials properties of doped/undoped silica switching layers are illuminated by impedance spectroscopy (IS). Due to the inherent CMOS compatibility, Cu-silica PMCs have great potential to be adopted in many emerging technologies, such as non-volatile storage cells and selector cells in ultra-dense 3D crosspoint memories, as well as electronic synapses in brain-inspired neuromorphic computing. Cu-silica PMC device performance for these applications is also assessed in this dissertation.
ContributorsChen, Wenhao (Author) / Kozicki, Michael N (Thesis advisor) / Barnaby, Hugh J (Thesis advisor) / Yu, Shimeng (Committee member) / Thornton, Trevor (Committee member) / Arizona State University (Publisher)
Created2017