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Description
This dissertation presents a new hybrid fault current limiter (FCL) topology that is primarily intended to protect single-phase power equipment. It can however be extended to protect three phase systems but would need three devices to protect each individual phase. In comparison against the existing fault current limiter technology, the

This dissertation presents a new hybrid fault current limiter (FCL) topology that is primarily intended to protect single-phase power equipment. It can however be extended to protect three phase systems but would need three devices to protect each individual phase. In comparison against the existing fault current limiter technology, the salient fea-tures of the proposed topology are: a) provides variable impedance that provides a 50% reduction in prospective fault current; b) near instantaneous response time which is with-in the first half cycle (1-4 ms); c) the use of semiconductor switches as the commutating switch which produces reduced leakage current, reduced losses, improved reliability, and a faster switch time (ns-µs); d) zero losses in steady-state operation; e) use of a Neodym-ium (NdFeB) permanent magnet as the limiting impedance which reduces size, cost, weight, eliminates DC biasing and cooling costs; f) use of Pulse Width Modulation (PWM) to control the magnitude of the fault current to a user's desired level. g) experi-mental test system is developed and tested to prove the concepts of the proposed FCL. This dissertation presents the proposed topology and its working principle backed up with numerical verifications, simulation results, and hardware implementation results. Conclu-sions and future work are also presented.
ContributorsPrigmore, Jay (Author) / Karady, George G. (Thesis advisor) / Ayyanar, Raja (Committee member) / Holbert, Keith E. (Committee member) / Hedman, Kory (Committee member) / Arizona State University (Publisher)
Created2013
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Description
As residential photovoltaic (PV) systems become more and more common and widespread, their system architectures are being developed to maximize power extraction while keeping the cost of associated electronics to a minimum. An architecture that has become popular in recent years is the "DC optimizer" architecture, wherein one DC-DC

As residential photovoltaic (PV) systems become more and more common and widespread, their system architectures are being developed to maximize power extraction while keeping the cost of associated electronics to a minimum. An architecture that has become popular in recent years is the "DC optimizer" architecture, wherein one DC-DC converter is connected to the output of each PV module. The DC optimizer architecture has the advantage of performing maximum power-point tracking (MPPT) at the module level, without the high cost of using an inverter on each module (the "microinverter" architecture). This work details the design of a proposed DC optimizer. The design incorporates a series-input parallel-output topology to implement MPPT at the sub-module level. This topology has some advantages over the more common series-output DC optimizer, including relaxed requirements for the system's inverter. An autonomous control scheme is proposed for the series-connected converters, so that no external control signals are needed for the system to operate, other than sunlight. The DC optimizer in this work is designed with an emphasis on efficiency, and to that end it uses GaN FETs and an active clamp technique to reduce switching and conduction losses. As with any parallel-output converter, phase interleaving is essential to minimize output RMS current losses. This work proposes a novel phase-locked loop (PLL) technique to achieve interleaving among the series-input converters.
ContributorsLuster, Daniel (Author) / Ayyanar, Raja (Thesis advisor) / Bakkaloglu, Bertan (Committee member) / Kiaei, Sayfe (Committee member) / Arizona State University (Publisher)
Created2014
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Description
With the rapid expansion of the photovoltaic industry over the last decade, there has been a huge demand in the PV installations in the residential sector. This thesis focuses on the analysis and implementation of a dc-dc boost converter at photovoltaic sub-module level. The thesis also analyses the various topologies

With the rapid expansion of the photovoltaic industry over the last decade, there has been a huge demand in the PV installations in the residential sector. This thesis focuses on the analysis and implementation of a dc-dc boost converter at photovoltaic sub-module level. The thesis also analyses the various topologies like switched capacitors and extended duty ratio which can be practically implemented in the photovoltaic panels. The results obtained in this work have concentrated on the use of novel strategies to substitute the use of central dc-dc converter used in PV module string connection. The implementation of distributed MPPT at the PV sub-module level is also an integral part of this thesis. Using extensive PLECS simulations, this thesis came to the conclusion that with the design of a proper compensation at the dc interconnection of a series or parallel PV Module Integrated Converter string, the central dc-dc converter can be substituted. The dc-ac interconnection voltage remains regulated at all irradiance level even without a dc-dc central converter at the string end. The foundation work for the hardware implementation has also been carried out. Design of parameters for future hardware implementation has also been presented in detail in this thesis.
ContributorsSen, Sourav (Author) / Ayyanar, Raja (Thesis advisor) / Kiaei, Sayfe (Committee member) / Bakkaloglu, Bertan (Committee member) / Arizona State University (Publisher)
Created2012
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Description
The development of a Solid State Transformer (SST) that incorporates a DC-DC multiport converter to integrate both photovoltaic (PV) power generation and battery energy storage is presented in this dissertation. The DC-DC stage is based on a quad-active-bridge (QAB) converter which not only provides isolation for the load, but also

The development of a Solid State Transformer (SST) that incorporates a DC-DC multiport converter to integrate both photovoltaic (PV) power generation and battery energy storage is presented in this dissertation. The DC-DC stage is based on a quad-active-bridge (QAB) converter which not only provides isolation for the load, but also for the PV and storage. The AC-DC stage is implemented with a pulse-width-modulated (PWM) single phase rectifier. A unified gyrator-based average model is developed for a general multi-active-bridge (MAB) converter controlled through phase-shift modulation (PSM). Expressions to determine the power rating of the MAB ports are also derived. The developed gyrator-based average model is applied to the QAB converter for faster simulations of the proposed SST during the control design process as well for deriving the state-space representation of the plant. Both linear quadratic regulator (LQR) and single-input-single-output (SISO) types of controllers are designed for the DC-DC stage. A novel technique that complements the SISO controller by taking into account the cross-coupling characteristics of the QAB converter is also presented herein. Cascaded SISO controllers are designed for the AC-DC stage. The QAB demanded power is calculated at the QAB controls and then fed into the rectifier controls in order to minimize the effect of the interaction between the two SST stages. The dynamic performance of the designed control loops based on the proposed control strategies are verified through extensive simulation of the SST average and switching models. The experimental results presented herein show that the transient responses for each control strategy match those from the simulations results thus validating them.
ContributorsFalcones, Sixifo Daniel (Author) / Ayyanar, Raja (Thesis advisor) / Karady, George G. (Committee member) / Tylavsky, Daniel (Committee member) / Tsakalis, Konstantinos (Committee member) / Arizona State University (Publisher)
Created2011
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Description
A novel integrated constant current LED driver design on a single chip is developed in this dissertation. The entire design consists of two sections. The first section is a DC-DC switching regulator (boost regulator) as the frontend power supply; the second section is the constant current LED driver system.

In the

A novel integrated constant current LED driver design on a single chip is developed in this dissertation. The entire design consists of two sections. The first section is a DC-DC switching regulator (boost regulator) as the frontend power supply; the second section is the constant current LED driver system.

In the first section, a pulse width modulated (PWM) peak current mode boost regulator is utilized. The overall boost regulator system and its related sub-cells are explained. Among them, an original error amplifier design, a current sensing circuit and slope compensation circuit are presented.

In the second section – the focus of this dissertation – a highly accurate constant current LED driver system design is unveiled. The detailed description of this highly accurate LED driver system and its related sub-cells are presented. A hybrid PWM and linear current modulation scheme to adjust the LED driver output currents is explained. The novel design ideas to improve the LED current accuracy and channel-to-channel output current mismatch are also explained in detail. These ideas include a novel LED driver system architecture utilizing 1) a dynamic current mirror structure and 2) a closed loop structure to keep the feedback loop of the LED driver active all the time during both PWM on-duty and PWM off-duty periods. Inside the LED driver structure, the driving amplifier with a novel slew rate enhancement circuit to dramatically accelerate its response time is also presented.
ContributorsWang, Ge (Author) / Holbert, Keith E. (Thesis advisor) / Song, Hongjiang (Committee member) / Ayyanar, Raja (Committee member) / Yu, Hongbin (Committee member) / Arizona State University (Publisher)
Created2016
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Description
After a major disturbance, the power system response is highly dependent on protection schemes and system dynamics. Improving power systems situational awareness requires proper and simultaneous modeling of both protection schemes and dynamic characteristics in power systems analysis tools. Historical information and ex-post analysis of blackouts reaffirm the critical role

After a major disturbance, the power system response is highly dependent on protection schemes and system dynamics. Improving power systems situational awareness requires proper and simultaneous modeling of both protection schemes and dynamic characteristics in power systems analysis tools. Historical information and ex-post analysis of blackouts reaffirm the critical role of protective devices in cascading events, thereby confirming the necessity to represent protective functions in transient stability studies. This dissertation is aimed at studying the importance of representing protective relays in power system dynamic studies. Although modeling all of the protective relays within transient stability studies may result in a better estimation of system behavior, representing, updating, and maintaining the protection system data becomes an insurmountable task. Inappropriate or outdated representation of the relays may result in incorrect assessment of the system behavior. This dissertation presents a systematic method to determine essential relays to be modeled in transient stability studies. The desired approach should identify protective relays that are critical for various operating conditions and contingencies. The results of the transient stability studies confirm that modeling only the identified critical protective relays is sufficient to capture system behavior for various operating conditions and precludes the need to model all of the protective relays. Moreover, this dissertation proposes a method that can be implemented to determine the appropriate location of out-of-step blocking relays. During unstable power swings, a generator or group of generators may accelerate or decelerate leading to voltage depression at the electrical center along with generator tripping. This voltage depression may cause protective relay mis-operation and unintentional separation of the system. In order to avoid unintentional islanding, the potentially mis-operating relays should be blocked from tripping with the use of out-of-step blocking schemes. Blocking these mis-operating relays, combined with an appropriate islanding scheme, help avoid a system wide collapse. The proposed method is tested on data from the Western Electricity Coordinating Council. A triple line outage of the California-Oregon Intertie is studied. The results show that the proposed method is able to successfully identify proper locations of out-of-step blocking scheme.
ContributorsHedman, Mojdeh Khorsand (Author) / Vittal, Vijay (Thesis advisor) / Ayyanar, Raja (Committee member) / Pal, Anamitra (Committee member) / Qin, Jiangchao (Committee member) / Arizona State University (Publisher)
Created2017
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Description
Presently, hard-switching buck/boost converters are dominantly used for automotive applications. Automotive applications have stringent system requirements for dc-dc converters, such as wide input voltage range and limited EMI noise emission. High switching frequency of the dc-dc converters is much desired in automotive applications for avoiding AM band interference and for

Presently, hard-switching buck/boost converters are dominantly used for automotive applications. Automotive applications have stringent system requirements for dc-dc converters, such as wide input voltage range and limited EMI noise emission. High switching frequency of the dc-dc converters is much desired in automotive applications for avoiding AM band interference and for compact size. However, hard switching buck converter is not suitable at high frequency operation because of its low efficiency. In addition, buck converter has high EMI noise due to its hard-switching. Therefore, soft-switching topologies are considered in this thesis work to improve the performance of the dc-dc converters.

Many soft-switching topologies are reviewed but none of them is well suited for the given automotive applications. Two soft-switching PWM converters are proposed in this work. For low power automotive POL applications, a new active-clamp buck converter is proposed. Comprehensive analysis of this converter is presented. A 2.2 MHz, 25 W active-clamp buck converter prototype with Si MOSFETs was designed and built. The experimental results verify the operation of the converter. For 12 V to 5 V conversion, the Si based prototype achieves a peak efficiency of 89.7%. To further improve the efficiency, GaN FETs are used and an optimized SR turn-off delay is employed. Then, a peak efficiency of 93.22% is achieved. The EMI test result shows significantly improved EMI performance of the proposed active-clamp buck converter. Last, large- and small-signal models of the proposed converter are derived and verified by simulation.

For automotive dual voltage system, a new bidirectional zero-voltage-transition (ZVT) converter with coupled-inductor is proposed in this work. With the coupled-inductor, the current to realize zero-voltage-switching (ZVS) of main switches is much reduced and the core loss is minimized. Detailed analysis and design considerations for the proposed converter are presented. A 1 MHz, 250 W prototype is designed and constructed. The experimental results verify the operation. Peak efficiencies of 93.98% and 92.99% are achieved in buck mode and boost mode, respectively. Significant efficiency improvement is achieved from the efficiency comparison between the hard-switching buck converter and the proposed ZVT converter with coupled-inductor.
ContributorsNan, Chenhao (Author) / Ayyanar, Raja (Thesis advisor) / Bakkaloglu, Bertan (Committee member) / Karady, George G. (Committee member) / Qin, Jiangchao (Committee member) / Arizona State University (Publisher)
Created2016
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Description
Optical Instrument Transformers (OIT) have been developed as an alternative to traditional instrument transformers (IT). The question "Can optical instrument transformers substitute for the traditional transformers?" is the main motivation of this study. Finding the answer for this question and developing complete models are the contributions of this work. Dedicated

Optical Instrument Transformers (OIT) have been developed as an alternative to traditional instrument transformers (IT). The question "Can optical instrument transformers substitute for the traditional transformers?" is the main motivation of this study. Finding the answer for this question and developing complete models are the contributions of this work. Dedicated test facilities are developed so that the steady state and transient performances of analog outputs of a magnetic current transformer (CT) and a magnetic voltage transformer (VT) are compared with that of an optical current transformer (OCT) and an optical voltage transformer (OVT) respectively. Frequency response characteristics of OIT outputs are obtained. Comparison results show that OITs have a specified accuracy of 0.3% in all cases. They are linear, and DC offset does not saturate the systems. The OIT output signal has a 40~60 μs time delay, but this is typically less than the equivalent phase difference permitted by the IEEE and IEC standards for protection applications. Analog outputs have significantly higher bandwidths (adjustable to 20 to 40 kHz) than the IT. The digital output signal bandwidth (2.4 kHz) of an OCT is significantly lower than the analog signal bandwidth (20 kHz) due to the sampling rates involved. The OIT analog outputs may have significant white noise of 6%, but the white noise does not affect accuracy or protection performance. Temperatures up to 50oC do not adversely affect the performance of the OITs. Three types of models are developed for analog outputs: analog, digital, and complete models. Well-known mathematical methods, such as network synthesis and Jones calculus methods are applied. The developed models are compared with experiment results and are verified with simulation programs. Results show less than 1.5% for OCT and 2% for OVT difference and that the developed models can be used for power system simulations and the method used for the development can be used to develop models for all other brands of optical systems. The communication and data transfer between the all-digital protection systems is investigated by developing a test facility for all digital protection systems. Test results show that different manufacturers' relays and transformers based on the IEC standard can serve the power system successfully.
ContributorsKucuksari, Sadik (Author) / Karady, George G. (Thesis advisor) / Heydt, Gerald T (Committee member) / Holbert, Keith E. (Committee member) / Ayyanar, Raja (Committee member) / Farmer, Richard (Committee member) / Arizona State University (Publisher)
Created2010