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- Genre: Masters Thesis
- Creators: Arizona State University
- Creators: Chakraborty, Bijeta
- Creators: Peterson, Cory
- Member of: ASU Electronic Theses and Dissertations
Description
Efficiency of components is an ever increasing area of importance to portable applications, where a finite battery means finite operating time. Higher efficiency devices need to be designed that don't compromise on the performance that the consumer has come to expect. Class D amplifiers deliver on the goal of increased efficiency, but at the cost of distortion. Class AB amplifiers have low efficiency, but high linearity. By modulating the supply voltage of a Class AB amplifier to make a Class H amplifier, the efficiency can increase while still maintaining the Class AB level of linearity. A 92dB Power Supply Rejection Ratio (PSRR) Class AB amplifier and a Class H amplifier were designed in a 0.24um process for portable audio applications. Using a multiphase buck converter increased the efficiency of the Class H amplifier while still maintaining a fast response time to respond to audio frequencies. The Class H amplifier had an efficiency above the Class AB amplifier by 5-7% from 5-30mW of output power without affecting the total harmonic distortion (THD) at the design specifications. The Class H amplifier design met all design specifications and showed performance comparable to the designed Class AB amplifier across 1kHz-20kHz and 0.01mW-30mW. The Class H design was able to output 30mW into 16Ohms without any increase in THD. This design shows that Class H amplifiers merit more research into their potential for increasing efficiency of audio amplifiers and that even simple designs can give significant increases in efficiency without compromising linearity.
ContributorsPeterson, Cory (Author) / Bakkaloglu, Bertan (Thesis advisor) / Barnaby, Hugh (Committee member) / Kiaei, Sayfe (Committee member) / Arizona State University (Publisher)
Created2013
Description
The high penetration of photovoltaic (PV) both at the utility and at the distribu-tion levels, has raised concerns about the reliability of grid-tied inverters of PV power systems. Inverters are generally considered as the weak link in PV power systems. The lack of a dedicated qualification/reliability standard for PV inverters is a main barrier in realizing higher level of confidence in reliability. Development of a well-accepted design qualification standard specifically for PV inverters will help pave the way for significant improvement in reliability and performance of inverters across the entire industry. The existing standards for PV inverters such as UL 1741 and IEC 62109-1 primarily focus on safety. IEC 62093 discusses inverter qualification but it includes all the balance of sys-tem components and therefore not specific to PV inverters. There are other general stan-dards for distributed generators including the IEEE1547 series of standards which cover major concerns like utility integration but they are not dedicated to PV inverters and are not written from a design qualification point of view. In this thesis, some of the potential requirements for a design qualification standard for PV inverters are addressed. The IEC 62093 is considered as a guideline and the possible inclusions in the framework for a dedicated design qualification standard of PV inverter are discussed. The missing links in existing PV inverter related standards are identified by performing gap analysis. Dif-ferent requirements of small residential inverters compared to large utility-scale systems, and the emerging requirements on grid support features are also considered. Electric stress test is found to be the key missing link and one of the electric stress tests, the surge withstand test is studied in detail. The use of the existing standards for surge withstand test of residential scale PV inverters is investigated and a method to suitably adopt these standards is proposed. The proposed method is studied analytically and verified using simulation. A design criterion for choosing the switch ratings of the inverter that can per-form reliably under the surge environment is derived.
ContributorsAlampoondi Venkataramanan, Sai Balasubramanian (Author) / Ayyanar, Raja (Thesis advisor) / Vittal, Vijay (Committee member) / Heydt, Gerald (Committee member) / Arizona State University (Publisher)
Created2011
Description
Class D Amplifiers are widely used in portable systems such as mobile phones to achieve high efficiency. The demands of portable electronics for low power consumption to extend battery life and reduce heat dissipation mandate efficient, high-performance audio amplifiers. The high efficiency of Class D amplifiers (CDAs) makes them particularly attractive for portable applications. The Digital class D amplifier is an interesting solution to increase the efficiency of embedded systems. However, this solution is not good enough in terms of PWM stage linearity and power supply rejection. An efficient control is needed to correct the error sources in order to get a high fidelity sound quality in the whole audio range of frequencies. A fundamental analysis on various error sources due to non idealities in the power stage have been discussed here with key focus on Power supply perturbations driving the Power stage of a Class D Audio Amplifier. Two types of closed loop Digital Class D architecture for PSRR improvement have been proposed and modeled. Double sided uniform sampling modulation has been used. One of the architecture uses feedback around the power stage and the second architecture uses feedback into digital domain. Simulation & experimental results confirm that the closed loop PSRR & PS-IMD improve by around 30-40 dB and 25 dB respectively.
ContributorsChakraborty, Bijeta (Author) / Bakkaloglu, Bertan (Thesis advisor) / Garrity, Douglas (Committee member) / Ozev, Sule (Committee member) / Arizona State University (Publisher)
Created2012
Description
The demand for cleaner energy technology is increasing very rapidly. Hence it is
important to increase the eciency and reliability of this emerging clean energy technologies.
This thesis focuses on modeling and reliability of solar micro inverters. In
order to make photovoltaics (PV) cost competitive with traditional energy sources,
the economies of scale have been guiding inverter design in two directions: large,
centralized, utility-scale (500 kW) inverters vs. small, modular, module level (300
W) power electronics (MLPE). MLPE, such as microinverters and DC power optimizers,
oer advantages in safety, system operations and maintenance, energy yield,
and component lifetime due to their smaller size, lower power handling requirements,
and module-level power point tracking and monitoring capability [1]. However, they
suer from two main disadvantages: rst, depending on array topology (especially
the proximity to the PV module), they can be subjected to more extreme environments
(i.e. temperature cycling) during the day, resulting in a negative impact to
reliability; second, since solar installations can have tens of thousands to millions of
modules (and as many MLPE units), it may be dicult or impossible to track and
repair units as they go out of service. Therefore identifying the weak links in this
system is of critical importance to develop more reliable micro inverters.
While an overwhelming majority of time and research has focused on PV module
eciency and reliability, these issues have been largely ignored for the balance
of system components. As a relatively nascent industry, the PV power electronics
industry does not have the extensive, standardized reliability design and testing procedures
that exist in the module industry or other more mature power electronics
industries (e.g. automotive). To do so, the critical components which are at risk and
their impact on the system performance has to be studied. This thesis identies and
addresses some of the issues related to reliability of solar micro inverters.
This thesis presents detailed discussions on various components of solar micro inverter
and their design. A micro inverter with very similar electrical specications in
comparison with commercial micro inverter is modeled in detail and veried. Components
in various stages of micro inverter are listed and their typical failure mechanisms
are reviewed. A detailed FMEA is conducted for a typical micro inverter to identify
the weak links of the system. Based on the S, O and D metrics, risk priority number
(RPN) is calculated to list the critical at-risk components. Degradation of DC bus
capacitor is identied as one the failure mechanism and the degradation model is built
to study its eect on the system performance. The system is tested for surge immunity
using standard ring and combinational surge waveforms as per IEEE 62.41 and
IEC 61000-4-5 standards. All the simulation presented in this thesis is performed
using PLECS simulation software.
important to increase the eciency and reliability of this emerging clean energy technologies.
This thesis focuses on modeling and reliability of solar micro inverters. In
order to make photovoltaics (PV) cost competitive with traditional energy sources,
the economies of scale have been guiding inverter design in two directions: large,
centralized, utility-scale (500 kW) inverters vs. small, modular, module level (300
W) power electronics (MLPE). MLPE, such as microinverters and DC power optimizers,
oer advantages in safety, system operations and maintenance, energy yield,
and component lifetime due to their smaller size, lower power handling requirements,
and module-level power point tracking and monitoring capability [1]. However, they
suer from two main disadvantages: rst, depending on array topology (especially
the proximity to the PV module), they can be subjected to more extreme environments
(i.e. temperature cycling) during the day, resulting in a negative impact to
reliability; second, since solar installations can have tens of thousands to millions of
modules (and as many MLPE units), it may be dicult or impossible to track and
repair units as they go out of service. Therefore identifying the weak links in this
system is of critical importance to develop more reliable micro inverters.
While an overwhelming majority of time and research has focused on PV module
eciency and reliability, these issues have been largely ignored for the balance
of system components. As a relatively nascent industry, the PV power electronics
industry does not have the extensive, standardized reliability design and testing procedures
that exist in the module industry or other more mature power electronics
industries (e.g. automotive). To do so, the critical components which are at risk and
their impact on the system performance has to be studied. This thesis identies and
addresses some of the issues related to reliability of solar micro inverters.
This thesis presents detailed discussions on various components of solar micro inverter
and their design. A micro inverter with very similar electrical specications in
comparison with commercial micro inverter is modeled in detail and veried. Components
in various stages of micro inverter are listed and their typical failure mechanisms
are reviewed. A detailed FMEA is conducted for a typical micro inverter to identify
the weak links of the system. Based on the S, O and D metrics, risk priority number
(RPN) is calculated to list the critical at-risk components. Degradation of DC bus
capacitor is identied as one the failure mechanism and the degradation model is built
to study its eect on the system performance. The system is tested for surge immunity
using standard ring and combinational surge waveforms as per IEEE 62.41 and
IEC 61000-4-5 standards. All the simulation presented in this thesis is performed
using PLECS simulation software.
ContributorsManchanahalli Ranganatha, Arkanatha Sastry (Author) / Ayyanar, Raja (Thesis advisor) / Karady, George G. (Committee member) / Qin, Jiangchao (Committee member) / Arizona State University (Publisher)
Created2015
Description
In this thesis, a digital input class D audio amplifier system which has the ability
to reject the power supply noise and nonlinearly of the output stage is presented. The main digital class D feed-forward path is using the fully-digital sigma-delta PWM open loop topology. Feedback loop is used to suppress the power supply noise and harmonic distortions. The design is using global foundry 0.18um technology.
Based on simulation, the power supply rejection at 200Hz is about -49dB with
81dB dynamic range and -70dB THD+N. The full scale output power can reach as high as 27mW and still keep minimum -68dB THD+N. The system efficiency at full scale is about 82%.
to reject the power supply noise and nonlinearly of the output stage is presented. The main digital class D feed-forward path is using the fully-digital sigma-delta PWM open loop topology. Feedback loop is used to suppress the power supply noise and harmonic distortions. The design is using global foundry 0.18um technology.
Based on simulation, the power supply rejection at 200Hz is about -49dB with
81dB dynamic range and -70dB THD+N. The full scale output power can reach as high as 27mW and still keep minimum -68dB THD+N. The system efficiency at full scale is about 82%.
ContributorsBai, Jing (Author) / Bakkaloglu, Bertan (Thesis advisor) / Arizona State University (Publisher)
Created2015
Description
Market acceptability of distributed energy resource (DER) technologies and the gradual and consistent increase in their depth of penetration have generated significant interest over the past few years. In particular, in Arizona and several other states there has been a substantial in-crease in distributed photovoltaic (PV) generation interfaced to the power distribution systems, and is expected to continue to grow at a significant rate. This has made integration, control and optimal operation of DER units a main area of focus in the design and operation of distribution systems. Grid-connected, distributed PV covers a wide range of power levels ranging from small, single phase residential roof-top systems to large three-phase, multi-megawatt systems. The focus of this work is on analyzing large, three-phase systems, with the power distribution system of the Arizona State University (ASU) Tempe campus used as the test bed for analysis and simulation. The Tempe campus of ASU has presently 4.5 MW of installed PV capacity, with another 4.5 MW expected to be added by 2011, which will represent about 22% of PV penetration. The PV systems are interfaced to the grid invariably by a power electronic inverter. Many of the important characteristics of the PV generation are influenced by the design and performance of the inverter, and hence suitable models of the inverter are needed to analyze PV systems. Several models of distributed generation (DG), including switching and average models, suitable for different study objectives, and different control modes of the inverter have been described in this thesis. A critical function of the inverters is to quickly detect and eliminate unintentional islands during grid failure. In this thesis, many active anti-islanding techniques with voltage and frequency positive feedback have been studied. Effectiveness of these techniques in terms of the tripping times specified in IEEE Std. 1547 for interconnecting distributed resources with electric power systems has been analyzed. The impact of distributed PV on the voltage profile of a distribution system has been ana-lyzed with ASU system as the test bed using power systems analysis tools namely PowerWorld and CYMDIST. The present inverters complying with IEEE 1547 do not regulate the system vol-tage. However, the future inverters especially at higher power levels are expected to perform sev-eral grid support functions including voltage regulation and reactive power support. Hence, the impact of inverters with the reactive power support capabilities is also analyzed. Various test sce-narios corresponding to different grid conditions are simulated and it is shown that distributed PV improves the voltage profile of the system. The improvements are more significant when the PV generators are capable of reactive power support. Detailed short circuit analyses are also per-formed on the system, and the impact of distributed PV on the fault current magnitude, with and without reactive power injection, have been studied.
ContributorsNarayanan, Anand (Author) / Ayyanar, Raja (Thesis advisor) / Vittal, Vijay (Committee member) / Heydt, Gerald T (Committee member) / Arizona State University (Publisher)
Created2010
Description
This thesis addresses the design and control of three phase inverters. Such inverters are
used to produce three-phase sinusoidal voltages and currents from a DC source. They
are critical for injecting power from renewable energy sources into the grid. This is
especially true since many of these sources of energy are DC sources (e.g. solar
photovoltaic) or need to be stored in DC batteries because they are intermittent (e.g. wind
and solar). Two classes of inverters are examined in this thesis. A control-centric design
procedure is presented for each class. The first class of inverters is simple in that they
consist of three decoupled subsystems. Such inverters are characterized by no mutual
inductance between the three phases. As such, no multivariable coupling is present and
decentralized single-input single-output (SISO) control theory suffices to generate
acceptable control designs. For this class of inverters several families of controllers are
addressed in order to examine command following as well as input disturbance and noise
attenuation specifications. The goal here is to illuminate fundamental tradeoffs. Such
tradeoffs include an improvement in the in-band command following and output
disturbance attenuation versus a deterioration in out-of-band noise attenuation.
A fundamental deficiency associated with such inverters is their large size. This can be
remedied by designing a smaller core. This naturally leads to the second class of inverters
considered in this work. These inverters are characterized by significant mutual
inductances and multivariable coupling. As such, SISO control theory is generally not
adequate and multiple-input multiple-output (MIMO) theory becomes essential for
controlling these inverters.
used to produce three-phase sinusoidal voltages and currents from a DC source. They
are critical for injecting power from renewable energy sources into the grid. This is
especially true since many of these sources of energy are DC sources (e.g. solar
photovoltaic) or need to be stored in DC batteries because they are intermittent (e.g. wind
and solar). Two classes of inverters are examined in this thesis. A control-centric design
procedure is presented for each class. The first class of inverters is simple in that they
consist of three decoupled subsystems. Such inverters are characterized by no mutual
inductance between the three phases. As such, no multivariable coupling is present and
decentralized single-input single-output (SISO) control theory suffices to generate
acceptable control designs. For this class of inverters several families of controllers are
addressed in order to examine command following as well as input disturbance and noise
attenuation specifications. The goal here is to illuminate fundamental tradeoffs. Such
tradeoffs include an improvement in the in-band command following and output
disturbance attenuation versus a deterioration in out-of-band noise attenuation.
A fundamental deficiency associated with such inverters is their large size. This can be
remedied by designing a smaller core. This naturally leads to the second class of inverters
considered in this work. These inverters are characterized by significant mutual
inductances and multivariable coupling. As such, SISO control theory is generally not
adequate and multiple-input multiple-output (MIMO) theory becomes essential for
controlling these inverters.
ContributorsSarkar, Aratrik (Author) / Rodriguez, Armando A. (Thesis advisor) / Si, Jennie (Committee member) / Tsakalis, Konstantinos (Committee member) / Arizona State University (Publisher)
Created2015