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- All Subjects: Systems Engineering
- Creators: Demir, Mustafa
- Resource Type: Text
Description
In recent years we have witnessed a shift towards multi-processor system-on-chips (MPSoCs) to address the demands of embedded devices (such as cell phones, GPS devices, luxury car features, etc.). Highly optimized MPSoCs are well-suited to tackle the complex application demands desired by the end user customer. These MPSoCs incorporate a constellation of heterogeneous processing elements (PEs) (general purpose PEs and application-specific integrated circuits (ASICS)). A typical MPSoC will be composed of a application processor, such as an ARM Coretex-A9 with cache coherent memory hierarchy, and several application sub-systems. Each of these sub-systems are composed of highly optimized instruction processors, graphics/DSP processors, and custom hardware accelerators. Typically, these sub-systems utilize scratchpad memories (SPM) rather than support cache coherency. The overall architecture is an integration of the various sub-systems through a high bandwidth system-level interconnect (such as a Network-on-Chip (NoC)). The shift to MPSoCs has been fueled by three major factors: demand for high performance, the use of component libraries, and short design turn around time. As customers continue to desire more and more complex applications on their embedded devices the performance demand for these devices continues to increase. Designers have turned to using MPSoCs to address this demand. By using pre-made IP libraries designers can quickly piece together a MPSoC that will meet the application demands of the end user with minimal time spent designing new hardware. Additionally, the use of MPSoCs allows designers to generate new devices very quickly and thus reducing the time to market. In this work, a complete MPSoC synthesis design flow is presented. We first present a technique \cite{leary1_intro} to address the synthesis of the interconnect architecture (particularly Network-on-Chip (NoC)). We then address the synthesis of the memory architecture of a MPSoC sub-system \cite{leary2_intro}. Lastly, we present a co-synthesis technique to generate the functional and memory architectures simultaneously. The validity and quality of each synthesis technique is demonstrated through extensive experimentation.
ContributorsLeary, Glenn (Author) / Chatha, Karamvir S (Thesis advisor) / Vrudhula, Sarma (Committee member) / Shrivastava, Aviral (Committee member) / Beraha, Rudy (Committee member) / Arizona State University (Publisher)
Created2013
Description
A fundamental question in the field of strategic management is how companies achieve sustainable competitive advantage. The Market-Oriented Theory (MOT), the Resource-Based Model and their complementary perspective try to answer this fundamental question. The primary goal of this study is to lay the groundwork for Standardized Strategic Assessment Framework (SSAF). The SSAF, which consists of a set of six models, aids in the evaluation and assessment of current and future strategic positioning of Small and Medium Enterprises (SMEs). The SSAF was visualized by IDEF0, a systems engineering tool. In addition, a secondary goal is the development of models to explain relationships between a company's resources, capabilities, and competitive strategy within the SSAF. Six models are considered within the SSAF, including R&D; activities model, product innovation model, process innovation model, operational excellence model, and export performance model. Only one of them, R&D; activities model was explained in-debt and developed a model by transformational system. In the R&D; activities model, the following question drives the investigation. Do company R&D; inputs (tangible, intangible and human resources) affect R&D; activities (basic research, applied research, and experimental development)? Based on this research question, eight hypotheses were extrapolated regarding R&D; activities model. In order to analyze these hypotheses, survey questions were developed for the R&D; model. A survey was sent to academic staff and industry experts for a survey instrument validation. Based on the survey instrument validation, content validity has been established and questions, format, and scales have been improved for future research application.
ContributorsDemir, Mustafa (Author) / Waissi, Gary (Thesis advisor) / Humble, Jane (Committee member) / Polesky, Gerald (Committee member) / Arizona State University (Publisher)
Created2012