Matching Items (4)
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- All Subjects: Silicon
- Creators: Vasileska, Dragica
Description
The goal of this research work is to develop a particle-based device simulator for modeling strained silicon devices. Two separate modules had to be developed for that purpose: A generic bulk Monte Carlo simulation code which in the long-time limit solves the Boltzmann transport equation for electrons; and an extension to this code that solves for the bulk properties of strained silicon. One scattering table is needed for conventional silicon, whereas, because of the strain breaking the symmetry of the system, three scattering tables are needed for modeling strained silicon material. Simulation results for the average drift velocity and the average electron energy are in close agreement with published data. A Monte Carlo device simulation tool has also been employed to integrate the effects of self-heating into device simulation for Silicon on Insulator devices. The effects of different types of materials for buried oxide layers have been studied. Sapphire, Aluminum Nitride (AlN), Silicon dioxide (SiO2) and Diamond have been used as target materials of interest in the analysis and the effects of varying insulator layer thickness have also been investigated. It was observed that although AlN exhibits the best isothermal behavior, diamond is the best choice when thermal effects are accounted for.
ContributorsQazi, Suleman (Author) / Vasileska, Dragica (Thesis advisor) / Goodnick, Stephen (Committee member) / Tao, Meng (Committee member) / Arizona State University (Publisher)
Created2013
Description
One of the challenges in future semiconductor device design is excessive rise of power dissipation and device temperatures. With the introduction of new geometrically confined device structures like SOI, FinFET, nanowires and continuous incorporation of new materials with poor thermal conductivities in the device active region, the device thermal problem is expected to become more challenging in coming years. This work examines the degradation in the ON-current due to self-heating effects in 10 nm channel length silicon nanowire transistors. As part of this dissertation, a 3D electrothermal device simulator is developed that self-consistently solves electron Boltzmann transport equation with 3D energy balance equations for both the acoustic and the optical phonons. This device simulator predicts temperature variations and other physical and electrical parameters across the device for different bias and boundary conditions. The simulation results show insignificant current degradation for nanowire self-heating because of pronounced velocity overshoot effect. In addition, this work explores the role of various placement of the source and drain contacts on the magnitude of self-heating effect in nanowire transistors. This work also investigates the simultaneous influence of self-heating and random charge effects on the magnitude of the ON current for both positively and negatively charged single charges. This research suggests that the self-heating effects affect the ON-current in two ways: (1) by lowering the barrier at the source end of the channel, thus allowing more carriers to go through, and (2) via the screening effect of the Coulomb potential. To examine the effect of temperature dependent thermal conductivity of thin silicon films in nanowire transistors, Selberherr's thermal conductivity model is used in the device simulator. The simulations results show larger current degradation because of self-heating due to decreased thermal conductivity . Crystallographic direction dependent thermal conductivity is also included in the device simulations. Larger degradation is observed in the current along the [100] direction when compared to the [110] direction which is in agreement with the values for the thermal conductivity tensor provided by Zlatan Aksamija.
ContributorsHossain, Arif (Author) / Vasileska, Dragica (Thesis advisor) / Ahmed, Shaikh (Committee member) / Bakkaloglu, Bertan (Committee member) / Goodnick, Stephen (Committee member) / Arizona State University (Publisher)
Created2011
Description
High-Resistivity Silicon (HRS) substrates are important for low-loss, high-performance microwave and millimeter wave devices in high-frequency telecommunication systems. The highest resistivity of up to ~10,000 ohm.cm is Float Zone (FZ) grown Si which is produced in small quantities and moderate wafer diameter. The more common Czochralski (CZ) Si can achieve resistivities of around 1000 ohm.cm, but the wafers contain oxygen that can lead to thermal donor formation with donor concentration significantly higher (~1015 cm-3) than the dopant concentration (~1012-1013 cm-3) of such high-resistivity Si leading to resistivity changes and possible type conversion of high-resistivity p-type silicon. In this research capacitance-voltage (C-V) characterization is employed to study the donor formation and type conversion of p-type High-resistivity Silicon-On-Insulator (HRSOI) wafers and the challenges involved in C-V characterization of HRSOI wafers using a Schottky contact are highlighted. The maximum capacitance of bulk or Silicon-On-Insulator (SOI) wafers is governed by the gate/contact area. During C-V characterization of high-resistivity SOI wafers with aluminum contacts directly on the Si film (Schottky contact); it was observed that the maximum capacitance is much higher than that due to the contact area, suggesting bias spreading due to the distributed transmission line of the film resistance and the buried oxide capacitance. In addition, an "S"-shape C-V plot was observed in the accumulation region. The effects of various factors, such as: frequency, contact and substrate sizes, gate oxide, SOI film thickness, film and substrate doping, carrier lifetime, contact work-function, temperature, light, annealing temperature and radiation on the C-V characteristics of HRSOI wafers are studied. HRSOI wafers have the best crosstalk prevention capability compared to other types of wafers, which plays a major role in system-on-chip configuration to prevent coupling between high frequency digital and sensitive analog circuits. Substrate crosstalk in HRSOI and various factors affecting the crosstalk, such as: substrate resistivity, separation between devices, buried oxide (BOX) thickness, radiation, temperature, annealing, light, and device types are discussed. Also various ways to minimize substrate crosstalk are studied and a new characterization method is proposed. Owing to their very low doping concentrations and the presence of oxygen in CZ wafers, HRS wafers pose a challenge in resistivity measurement using conventional techniques such as four-point probe and Hall measurement methods. In this research the challenges in accurate resistivity measurement using four-point probe, Hall method, and C-V profile are highlighted and a novel approach to extract resistivity of HRS wafers based on Impedance Spectroscopy measurements using polymer dielectrics such as Polystyrene and Poly Methyl Methacrylate (PMMA) is proposed.
ContributorsNayak, Pinakpani (Author) / Schroder, Dieter K. (Thesis advisor) / Vasileska, Dragica (Committee member) / Kozicki, Michael (Committee member) / Aberle, James T., 1961- (Committee member) / Arizona State University (Publisher)
Created2012
Description
Silicon photovoltaics is the dominant contribution to the global solar energy production. As increasing conversion efficiency has become one of the most important factors to lower the cost of photovoltaic systems, the idea of making a multijunction solar cell based on a silicon bottom cell has attracted broad interest. Here the potential of using dilute nitride GaNPAs alloys for a lattice-matched 3-terminal 2-junction Si-based tandem solar cell through multiscale modeling is investigated. To calculate the electronic band structure of dilute nitride alloys with relatively low computational cost, the sp^3 d^5 s^* s_N tight-binding model is chosen, as it has been demonstrated to obtain quantitatively correct trends for the lowest conduction band near Γ, L, and X for dilute-N GaNAs. A genetic algorithm is used to optimize the sp^3 d^5 s^* tight-binding model for pure GaP and GaAs for their optical properties. Then the optimized sp^3 d^5 s^* s_N parametrizations are obtained for GaNP and GaNAs by fitting to experimental bandgap values. After that, a virtual crystal approach gives the Hamiltonian for GaNPAs alloys. From their tight-binding Hamiltonian, the first-order optical response functions of dilute nitride GaNAs, GaNP, and GaNPAs are calculated. As the N mole fraction varies, the calculated critical optical features vary with the correct trends, and agree well with experiment. The calculated optical properties are then used as input for the solar device simulations based on Silvaco ATLAS. For device simulation, a bottom cell model is first constructed to generate performance results that agree well with a demonstrated high-efficiency Si heterojunction interdigitated back contact (IBC) solar cell reported by Kaneka. The front a-Si/c-Si interface is then replaced by a GaP/Si interface for the investigation of the sensitivity of the GaP/Si interface to interface defects in terms of degradation of the IBC cell performance, where we find that an electric field that induces strong band bending can significantly mitigate the impact of the interfacial traps. Finally, a lattice-matched 3-terminal 2-junction tandem model is built for performance simulation by stacking a dilute nitride GaNP(As) cell on the Si IBC cell connected through a GaP/Si interface. The two subcells operate quasi-independently. In this 3-terminal tandem model, traps at the GaP/Si interface still significantly impact the performance of the Si subcell, but their effects on the GaNP subcell are relatively small. Assuming the interfacial traps are well passivated, the tandem efficiency surpasses that of a single-junction Si cell, with values close to 33% based on realistic parameters.
ContributorsZou, Yongjie (Author) / Goodnick, Stephen M. (Thesis advisor) / Honsberg, C. (Christiana B.) (Committee member) / King, Richard R. (Committee member) / Vasileska, Dragica (Committee member) / Arizona State University (Publisher)
Created2019