Matching Items (7)
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- All Subjects: Silicon
- All Subjects: Simultaneous Transmit and Receive Antennas
- Creators: Kozicki, Michael
- Resource Type: Text
- Status: Published
Description
High-Resistivity Silicon (HRS) substrates are important for low-loss, high-performance microwave and millimeter wave devices in high-frequency telecommunication systems. The highest resistivity of up to ~10,000 ohm.cm is Float Zone (FZ) grown Si which is produced in small quantities and moderate wafer diameter. The more common Czochralski (CZ) Si can achieve resistivities of around 1000 ohm.cm, but the wafers contain oxygen that can lead to thermal donor formation with donor concentration significantly higher (~1015 cm-3) than the dopant concentration (~1012-1013 cm-3) of such high-resistivity Si leading to resistivity changes and possible type conversion of high-resistivity p-type silicon. In this research capacitance-voltage (C-V) characterization is employed to study the donor formation and type conversion of p-type High-resistivity Silicon-On-Insulator (HRSOI) wafers and the challenges involved in C-V characterization of HRSOI wafers using a Schottky contact are highlighted. The maximum capacitance of bulk or Silicon-On-Insulator (SOI) wafers is governed by the gate/contact area. During C-V characterization of high-resistivity SOI wafers with aluminum contacts directly on the Si film (Schottky contact); it was observed that the maximum capacitance is much higher than that due to the contact area, suggesting bias spreading due to the distributed transmission line of the film resistance and the buried oxide capacitance. In addition, an "S"-shape C-V plot was observed in the accumulation region. The effects of various factors, such as: frequency, contact and substrate sizes, gate oxide, SOI film thickness, film and substrate doping, carrier lifetime, contact work-function, temperature, light, annealing temperature and radiation on the C-V characteristics of HRSOI wafers are studied. HRSOI wafers have the best crosstalk prevention capability compared to other types of wafers, which plays a major role in system-on-chip configuration to prevent coupling between high frequency digital and sensitive analog circuits. Substrate crosstalk in HRSOI and various factors affecting the crosstalk, such as: substrate resistivity, separation between devices, buried oxide (BOX) thickness, radiation, temperature, annealing, light, and device types are discussed. Also various ways to minimize substrate crosstalk are studied and a new characterization method is proposed. Owing to their very low doping concentrations and the presence of oxygen in CZ wafers, HRS wafers pose a challenge in resistivity measurement using conventional techniques such as four-point probe and Hall measurement methods. In this research the challenges in accurate resistivity measurement using four-point probe, Hall method, and C-V profile are highlighted and a novel approach to extract resistivity of HRS wafers based on Impedance Spectroscopy measurements using polymer dielectrics such as Polystyrene and Poly Methyl Methacrylate (PMMA) is proposed.
ContributorsNayak, Pinakpani (Author) / Schroder, Dieter K. (Thesis advisor) / Vasileska, Dragica (Committee member) / Kozicki, Michael (Committee member) / Aberle, James T., 1961- (Committee member) / Arizona State University (Publisher)
Created2012
Description
In the nano-regime many materials exhibit properties that are quite different from their bulk counterparts. These nano-properties have been shown to be useful in a wide range of applications with nanomaterials being used for catalysts, in energy production, as protective coatings, and in medical treatment. While there is no shortage of exciting and novel applications, the world of nanomaterials suffers from a lack of large scale manufacturing techniques. The current methods and equipment used for manufacturing nanomaterials are generally slow, expensive, potentially dangerous, and material specific. The research and widespread use of nanomaterials has undoubtedly been hindered by this lack of appropriate tooling. This work details the effort to create a novel nanomaterial synthesis and deposition platform capable of operating at industrial level rates and reliability.
The tool, referred to as Deppy, deposits material via hypersonic impaction, a two chamber process that takes advantage of compressible fluids operating in the choked flow regime to accelerate particles to up several thousand meters per second before they impact and stick to the substrate. This allows for the energetic separation of the synthesis and deposition processes while still behaving as a continuous flow reactor giving Deppy the unique ability to independently control the particle properties and the deposited film properties. While the ultimate goal is to design a tool capable of producing a broad range of nanomaterial films, this work will showcase Deppy's ability to produce silicon nano-particle films as a proof of concept.
By adjusting parameters in the upstream chamber the particle composition was varied from completely amorphous to highly crystalline as confirmed by Raman spectroscopy. By adjusting parameters in the downstream chamber significant variation of the film's density was achieved. Further it was shown that the system is capable of making these adjustments in each chamber without affecting the operation of the other.
The tool, referred to as Deppy, deposits material via hypersonic impaction, a two chamber process that takes advantage of compressible fluids operating in the choked flow regime to accelerate particles to up several thousand meters per second before they impact and stick to the substrate. This allows for the energetic separation of the synthesis and deposition processes while still behaving as a continuous flow reactor giving Deppy the unique ability to independently control the particle properties and the deposited film properties. While the ultimate goal is to design a tool capable of producing a broad range of nanomaterial films, this work will showcase Deppy's ability to produce silicon nano-particle films as a proof of concept.
By adjusting parameters in the upstream chamber the particle composition was varied from completely amorphous to highly crystalline as confirmed by Raman spectroscopy. By adjusting parameters in the downstream chamber significant variation of the film's density was achieved. Further it was shown that the system is capable of making these adjustments in each chamber without affecting the operation of the other.
ContributorsFirth, Peter (Author) / Holman, Zachary C (Thesis advisor) / Kozicki, Michael (Committee member) / Goryll, Michael (Committee member) / Arizona State University (Publisher)
Created2015
Description
Layers of intrinsic hydrogenated amorphous silicon and amorphous silicon carbide
were prepared on a polished, intrinsic crystalline silicon substrate via plasma-enhanced chemical vapor deposition to simulate heterojunction device relevant stacks of various materials. The minority carrier lifetime, optical band gap and FTIR spectra were observed at incremental stages of thermal annealing. By observing the changes in the lifetimes the sample structure responsible for the most thermally robust surface passivation could be determined. These results were correlated to the optical band gap and the position and relative area of peaks in the FTIR spectra related to to silicon-hydrogen bonds in the layers. It was found that due to an increased presence of hydrogen bonded to silicon at voids within the passivating layer, hydrogenated amorphous silicon carbide at the interface of the substrate coupled with a hydrogenated amorphous silicon top layer provides better passivation after high temperature annealing than other device structures.
were prepared on a polished, intrinsic crystalline silicon substrate via plasma-enhanced chemical vapor deposition to simulate heterojunction device relevant stacks of various materials. The minority carrier lifetime, optical band gap and FTIR spectra were observed at incremental stages of thermal annealing. By observing the changes in the lifetimes the sample structure responsible for the most thermally robust surface passivation could be determined. These results were correlated to the optical band gap and the position and relative area of peaks in the FTIR spectra related to to silicon-hydrogen bonds in the layers. It was found that due to an increased presence of hydrogen bonded to silicon at voids within the passivating layer, hydrogenated amorphous silicon carbide at the interface of the substrate coupled with a hydrogenated amorphous silicon top layer provides better passivation after high temperature annealing than other device structures.
ContributorsJackson, Alec James (Author) / Holman, Zachary (Thesis advisor) / Bertoni, Mariana (Committee member) / Kozicki, Michael (Committee member) / Arizona State University (Publisher)
Created2016
Description
The Built-In Self-Test for Simultaneous Transmit and Receive (BIST for STAR) will be able to solve the challenges of transmitting and receiving at the same time at the same frequency. One of the major components is the STAR antenna which transmits and receives along the same pathway. The main problem with doing both on the same path is that the transmit signal is usually much stronger in power compared to the received signal. The transmit signal has echoes and leakages that cause self-interference, preventing the received signal from being properly obtained. The solution developed in this project is the BIST component, which will help calculate the functional gain and phase offset of the interference signal and subtract it from the pathway so that the received signal remains. The functions of the proposed circuit board can be modeled in Matlab, where an emulation code generates a random, realistic functional gain and delay for the interference. From the generated values, the BIST for STAR was simulated to output what the measurements would be given the strength of the input signal and a controlled delay. The original Matlab code models an ideal environment directly recalculating the functional gain and phase from the given measurements in a second Matlab script. The actual product will not be ideal; a possible source of error to be considered is the effect of thermal noise. To observe the effect of noise on the BIST for STAR's performance, the Matlab code was expanded upon to include a component for thermal noise, and a method of analyzing the results of the board.
ContributorsLiu, Jennifer Yuan (Author) / Ozev, Sule (Thesis director) / Kozicki, Michael (Committee member) / Electrical Engineering Program (Contributor) / Barrett, The Honors College (Contributor)
Created2016-05
Description
The capstone portion of this project was to use the established STaR antennas and add a Built in Self-Test system to ensure the quality of the signals being received. This part of the project required a MatLab simulation to be built, a layout created, and a PCB designed for fabrication. In theory, the test BiST unit will allow the gain and delay of the transmitted signal and then cancel out unneeded interference for the received signal. However, this design required multiple paths to maintain the same lengths to keep the signals in phase for comparison. The purpose of this thesis is to show the potential drop-offs of the quality of the signals from being out of phase due to the wires that should be similar, being off by a certain percentage. This project will calculate the theoretical delay of all wires being out of sync and then add this delay to the established MatLab simulation. This report will show the relationship between the error of the received variables and what the actual generated values. And, the last part of the document will demonstrate the simulation by creating a signal and comparing it to its received counterpart. The end result of the study showed that the percent error between what is seen and what is expected is near insignificant and, hence, not an issue with regards to the quality of the project.
ContributorsSomers, Tyler Scott (Author) / Ozev, Sule (Thesis director) / Kozicki, Michael (Committee member) / Electrical Engineering Program (Contributor) / Barrett, The Honors College (Contributor)
Created2016-05
Description
The purpose of the Simultaneous Transmit and Receive Antenna project is to design a test circuit that will allow us to use an antenna to both send out and receive a signal at the same time on the same frequency. The test circuit will generate DC voltage levels that we can use to solve for the gain and delay of the transmit interference, so we will then be able to cancel out the unwanted signal from the received signal. With a theoretically perfect setup, the transmitted signal will be able to be completely isolated from the received signal, leaving us with only what we want at the output. In practice, however, this is not the case. There are many variables that will affect the integrity of the DC output of the test signal. As the output voltage level deviates from its theoretical perfect measurement, the precision to which we are able to solve for the gain and delay values decreases. The focus of this study is to estimate the effect of using a digital measurement tool to measure the output of the test circuit. Assuming a voltmeter with 1 volt full range, simulations were run using measurements stored at different bit resolutions, from 8-bit storage up to 16-bit storage. Since the physical hardware for the Simultaneous Transmit and Receive test circuit is not currently available, these tests were performed with an edited version of the Matlab simulation created for the Senior Design project. The simulation was run 2000 times over each bit resolution to get a wide range of generated values, then the error from each run was analyzed to come to a conclusion on the effect of the digital measurement on the design. The results of these simulations as well as further details of the project and testing are described inside this document.
ContributorsKral, Brandon Michael (Author) / Ozev, Sule (Thesis director) / Kozicki, Michael (Committee member) / Electrical Engineering Program (Contributor) / Barrett, The Honors College (Contributor)
Created2016-05
Description
This is a test plan document for Team Aegis' capstone project that has the goal of mitigating single event upsets in NAND flash memory caused by space radiation.
ContributorsForman, Oliver Ethan (Co-author) / Smith, Aiden (Co-author) / Salls, Demetra (Co-author) / Kozicki, Michael (Thesis director) / Hodge, Chris (Committee member) / Electrical Engineering Program (Contributor) / Barrett, The Honors College (Contributor)
Created2021-05