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- Creators: Chan, Candace
Description
This work demonstrates a capable reverse pulse deposition methodology to influence gap fill behavior inside microvia along with a uniform deposit in the fine line patterned regions for substrate packaging applications. Interconnect circuitry in IC substrate packages comprises of stacked microvia that varies in depth from 20µm to 100µm with an aspect ratio of 0.5 to 1.5 and fine line patterns defined by photolithography. Photolithography defined pattern regions incorporate a wide variety of feature sizes including large circular pad structures with diameter of 20µm - 200µm, fine traces with varying widths of 3µm - 30µm and additional planar regions to define a IC substrate package. Electrodeposition of copper is performed to establish the desired circuit. Electrodeposition of copper in IC substrate applications holds certain unique challenges in that they require a low cost manufacturing process that enables a void-free gap fill inside the microvia along with uniform deposition of copper on exposed patterned regions. Deposition time scales to establish the desired metal thickness for such packages could range from several minutes to few hours. This work showcases a reverse pulse electrodeposition methodology that achieves void-free gap fill inside the microvia and uniform plating in FLS (Fine Lines and Spaces) regions with significantly higher deposition rates than traditional approaches. In order to achieve this capability, systematic experimental and simulation studies were performed. A strong correlation of independent parameters that govern the electrodeposition process such as bath temperature, reverse pulse plating parameters and the ratio of electrolyte concentrations is shown to the deposition kinetics and deposition uniformity in fine patterned regions and gap fill rate inside the microvia. Additionally, insight into the physics of via fill process is presented with secondary and tertiary current simulation efforts. Such efforts lead to show “smart” control of deposition rate at the top and bottom of via to avoid void formation. Finally, a parametric effect on grain size and the ensuing copper metallurgical characteristics of bulk copper is also shown to enable high reliability substrate packages for the IC packaging industry.
ContributorsGanesan, Kousik (Author) / Tasooji, Amaneh (Thesis advisor) / Manepalli, Rahul (Committee member) / Alford, Terry (Committee member) / Chan, Candace (Committee member) / Arizona State University (Publisher)
Created2018
Description
This work correlates microscopic material changes to short- and long-term performance in modern, Cu-doped, CdTe-based solar cells. Past research on short- and long-term performance emphasized the device-scale impact of Cu, but neglected the microscopic impact of the other chemical species in the system (e.g., Se, Cl, Cu), their distributions, their local atomic environments, or their interactions/reactions. Additionally, technological limitations precluded nanoscale measurements of the Cu distributions in the cell, and microscale measurements of the material properties (i.e. composition, microstructure, charge transport) as the cell operates. This research aims to answer (1) what is the spatial distribution of Cu in the cell, (2) how does its distribution and local environment correlate with cell performance, and (3) how do local material properties change as the cell operates? This work employs a multi-scale, multi-modal, correlative-measurement approach to elucidate microscopic mechanisms. Several analytical techniques are used – including and especially correlative synchrotron X-ray microscopy – and a unique state-of-the-art instrument was developed to access the dynamics of microscopic mechanisms as they proceed. The work shows Cu segregates around CdTe grain boundaries, and Cu-related acceptor penetration into the CdTe layer is crucial for well-performing cells. After long-term operation, the work presents strong evidence of Se migration into the CdTe layer. This redistribution correlates with microstructural changes in the CdTe layer and limited charge transport around the metal-CdTe interface. Finally, the work correlates changes in microstructure, Cu atomic environment, and charge collection as a cell operates. The results suggest that, as the cell ages, a change to Cu local environment limits charge transport through the metal-CdTe interface, and this change could be influenced by Se migration into the CdTe layer of the cell.
ContributorsWalker, Trumann (Author) / Bertoni, Mariana I (Thesis advisor) / Holman, Zachary (Committee member) / Chan, Candace (Committee member) / Colegrove, Eric (Committee member) / Arizona State University (Publisher)
Created2022