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Photosynthesis, one of the most important processes in nature, has provided an energy basis for nearly all life on Earth, as well as the fossil fuels we use today to power modern society. This research aims to mimic the photosynthetic process of converting incident solar energy into chemical potential energy

Photosynthesis, one of the most important processes in nature, has provided an energy basis for nearly all life on Earth, as well as the fossil fuels we use today to power modern society. This research aims to mimic the photosynthetic process of converting incident solar energy into chemical potential energy in the form of a fuel via systems capable of carrying out photo-induced electron transfer to drive the production of hydrogen from water. Herein is detailed progress in using photo-induced stepwise electron transfer to drive the oxidation of water and reduction of protons to hydrogen. In the design, use of more blue absorbing porphyrin dyes to generate high-potential intermediates for oxidizing water and more red absorbing phthalocyanine dyes for forming the low potential charge needed for the production of hydrogen have been utilized. For investigating water oxidation at the photoanode, high potential porphyrins such as, bis-pyridyl porphyrins and pentafluorophenyl porphyrins have been synthesized and experiments have aimed at the co-immobilization of this dye with an IrO2-nH2O catalyst on TiO2. To drive the cathodic reaction of the water splitting photoelectrochemical cell, utilization of silicon octabutoxy-phthalocyanines have been explored, as they offer good absorption in the red to near infrared, coupled with low potential photo-excited states. Axially and peripherally substituted phthalocyanines bearing carboxylic anchoring groups for the immobilization on semiconductors such as TiO2 has been investigated. Ultimately, this work should culminate in a photoelectrochemical cell capable of splitting water to oxygen and hydrogen with the only energy input from light. A series of perylene dyes bearing multiple semi-conducting metal oxide anchoring groups have been synthesized and studied. Results have shown interfacial electron transfer between these perylenes and TiO2 nanoparticles encapsulated within reverse micelles and naked nanoparticles. The binding process was followed by monitoring the hypsochromic shift of the dye absorption spectra over time. Photoinduced electron transfer from the singlet excited state of the perylenes to the TiO2 conduction band is indicated by emission quenching of the TiO2-bound form of the dyes and confirmed by transient absorption measurements of the radical cation of the dyes and free carriers (injected electrons) in the TiO2.
ContributorsBergkamp, Jesse J (Author) / Moore, Ana L (Thesis advisor) / Mariño-Ochoa, Ernesto (Thesis advisor) / Gust, Devens J (Committee member) / Gould, Ian (Committee member) / Arizona State University (Publisher)
Created2013
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Description
In recent years we have witnessed a shift towards multi-processor system-on-chips (MPSoCs) to address the demands of embedded devices (such as cell phones, GPS devices, luxury car features, etc.). Highly optimized MPSoCs are well-suited to tackle the complex application demands desired by the end user customer. These MPSoCs incorporate a

In recent years we have witnessed a shift towards multi-processor system-on-chips (MPSoCs) to address the demands of embedded devices (such as cell phones, GPS devices, luxury car features, etc.). Highly optimized MPSoCs are well-suited to tackle the complex application demands desired by the end user customer. These MPSoCs incorporate a constellation of heterogeneous processing elements (PEs) (general purpose PEs and application-specific integrated circuits (ASICS)). A typical MPSoC will be composed of a application processor, such as an ARM Coretex-A9 with cache coherent memory hierarchy, and several application sub-systems. Each of these sub-systems are composed of highly optimized instruction processors, graphics/DSP processors, and custom hardware accelerators. Typically, these sub-systems utilize scratchpad memories (SPM) rather than support cache coherency. The overall architecture is an integration of the various sub-systems through a high bandwidth system-level interconnect (such as a Network-on-Chip (NoC)). The shift to MPSoCs has been fueled by three major factors: demand for high performance, the use of component libraries, and short design turn around time. As customers continue to desire more and more complex applications on their embedded devices the performance demand for these devices continues to increase. Designers have turned to using MPSoCs to address this demand. By using pre-made IP libraries designers can quickly piece together a MPSoC that will meet the application demands of the end user with minimal time spent designing new hardware. Additionally, the use of MPSoCs allows designers to generate new devices very quickly and thus reducing the time to market. In this work, a complete MPSoC synthesis design flow is presented. We first present a technique \cite{leary1_intro} to address the synthesis of the interconnect architecture (particularly Network-on-Chip (NoC)). We then address the synthesis of the memory architecture of a MPSoC sub-system \cite{leary2_intro}. Lastly, we present a co-synthesis technique to generate the functional and memory architectures simultaneously. The validity and quality of each synthesis technique is demonstrated through extensive experimentation.
ContributorsLeary, Glenn (Author) / Chatha, Karamvir S (Thesis advisor) / Vrudhula, Sarma (Committee member) / Shrivastava, Aviral (Committee member) / Beraha, Rudy (Committee member) / Arizona State University (Publisher)
Created2013