Matching Items (6)
Filtering by
- All Subjects: Calibration
- Genre: Academic theses
- Creators: Kitchen, Jennifer
Description
High speed current-steering DACs with high linearity are needed in today's applications such as wired and wireless communications, instrumentation, radar, and other direct digital synthesis (DDS) applications. However, a trade-off exists between the speed and resolution of Nyquist rate current-steering DACs. As the resolution increases, more transistor area is required to meet matching requirements for optimal linearity and thus, the overall speed of the DAC is limited.
In this thesis work, a 12-bit current-steering DAC was designed with current sources scaled below the required matching size to decrease the area and increase the overall speed of the DAC. By scaling the current sources, however, errors due to random mismatch between current sources will arise and additional calibration hardware is necessary to ensure 12-bit linearity. This work presents how to implement a self-calibration DAC that works to fix amplitude errors while maintaining a lower overall area. Additionally, the DAC designed in this thesis investigates the implementation feasibility of a data-interleaved architecture. Data interleaving can increase the total bandwidth of the DACs by 2 with an increase in SQNR by an additional 3 dB.
The final results show that the calibration method can effectively improve the linearity of the DAC. The DAC is able to run up to 400 MSPS frequencies with a 75 dB SFDR performance and above 87 dB SFDR performance at update rates of 200 MSPS.
In this thesis work, a 12-bit current-steering DAC was designed with current sources scaled below the required matching size to decrease the area and increase the overall speed of the DAC. By scaling the current sources, however, errors due to random mismatch between current sources will arise and additional calibration hardware is necessary to ensure 12-bit linearity. This work presents how to implement a self-calibration DAC that works to fix amplitude errors while maintaining a lower overall area. Additionally, the DAC designed in this thesis investigates the implementation feasibility of a data-interleaved architecture. Data interleaving can increase the total bandwidth of the DACs by 2 with an increase in SQNR by an additional 3 dB.
The final results show that the calibration method can effectively improve the linearity of the DAC. The DAC is able to run up to 400 MSPS frequencies with a 75 dB SFDR performance and above 87 dB SFDR performance at update rates of 200 MSPS.
ContributorsJankunas, Benjamin (Author) / Bakkaloglu, Bertan (Thesis advisor) / Kitchen, Jennifer (Committee member) / Ozev, Sule (Committee member) / Arizona State University (Publisher)
Created2014
Description
RF transmitter manufacturers go to great extremes and expense to ensure that their product meets the RF output power requirements for which they are designed. Therefore, there is an urgent need for in-field monitoring of output power and gain to bring down the costs of RF transceiver testing and ensure product reliability. Built-in self-test (BIST) techniques can perform such monitoring without the requirement for expensive RF test equipment. In most BIST techniques, on-chip resources, such as peak detectors, power detectors, or envelope detectors are used along with frequency down conversion to analyze the output of the design under test (DUT). However, this conversion circuitry is subject to similar process, voltage, and temperature (PVT) variations as the DUT and affects the measurement accuracy. So, it is important to monitor BIST performance over time, voltage and temperature, such that accurate in-field measurements can be performed.
In this research, a multistep BIST solution using only baseband signals for test analysis is presented. An on-chip signal generation circuit, which is robust with respect to time, supply voltage, and temperature variations is used for self-calibration of the BIST system before the DUT measurement. Using mathematical modelling, an analytical expression for the output signal is derived first and then test signals are devised to extract the output power of the DUT. By utilizing a standard 180nm IBM7RF CMOS process, a 2.4GHz low power RF IC incorporated with the proposed BIST circuitry and on-chip test signal source is designed and fabricated. Experimental results are presented, which show this BIST method can monitor the DUT’s output power with +/- 0.35dB accuracy over a 20dB power dynamic range.
In this research, a multistep BIST solution using only baseband signals for test analysis is presented. An on-chip signal generation circuit, which is robust with respect to time, supply voltage, and temperature variations is used for self-calibration of the BIST system before the DUT measurement. Using mathematical modelling, an analytical expression for the output signal is derived first and then test signals are devised to extract the output power of the DUT. By utilizing a standard 180nm IBM7RF CMOS process, a 2.4GHz low power RF IC incorporated with the proposed BIST circuitry and on-chip test signal source is designed and fabricated. Experimental results are presented, which show this BIST method can monitor the DUT’s output power with +/- 0.35dB accuracy over a 20dB power dynamic range.
ContributorsGangula, Sudheer Kumar Reddy (Author) / Kitchen, Jennifer (Thesis advisor) / Ozev, Sule (Committee member) / Ogras, Umit Y. (Committee member) / Arizona State University (Publisher)
Created2015
Description
Volcanic devolatilization is one of the major processes in the global nitrogen cycle. Past studies have often estimated the magnitude of this flux using volcanic emission measurements, which are limited to currently active systems and sensitive to atmospheric contamination. A different methodological approach requires appropriate analytical parameters for nitrogen analysis in silicate glasses by secondary ion mass spectrometry (SIMS), which have not yet been established. To this end, we analyze various ion implanted basaltic and rhyolitic glasses by SIMS. We demonstrate that water content significantly affects the ion yields of 14N+ and 14N16O−, as well as the background intensity of 14N+ and 12C+. Application of implant-derived calibrations to natural samples provide the first reported concentrations of nitrogen in melt inclusions. These measurements are from samples from the Bishop Tuff in California, the Huckleberry Ridge Tuff of the Yellowstone Volcanic Center, and material from the Okaia and Oruanui eruptions in the Taupo Volcanic Center. In all studied material, we find maximum nitrogen contents of less than 45 ppm and that nitrogen concentration varies positively with CO2 concentration, which is interpreted to reflect partial degassing trend. Using the maximum measured nitrogen contents for each eruption, we find that the Bishop released >3.6 x 1013 g of nitrogen, the Huckleberry Ridge released >1.3 x 1014 g, the Okaia released >1.1 x 1011 g of nitrogen, the Oruanui released >4.7 x 1013 g of nitrogen. Simple calculations suggest that with concentrations such as these, rhyolitic eruptions may ephemerally increase the nitrogen flux to the atmosphere, but are insignificant compared to the 4 x 1021 g of nitrogen stored in the atmosphere.
ContributorsRegier, Margo Elaine (Author) / Hervig, Richard L (Thesis advisor) / Roggensack, Kurt (Committee member) / Till, Christy B. (Committee member) / Arizona State University (Publisher)
Created2016
Description
In this work, a 12-bit ADC with three types of calibration is proposed for high speed security applications as well as a precision application. This converter performs for both applications because it satisfies all the necessary specifications such as minimal device mismatch and offset, programmability to decrease aging effects, high SNR for increased ENOB and fast conversion rate. The designed converter implements three types of calibration necessary for offset and gain error, including: a correlated double sampling integrator used in the first stage of the ADC, a power up auto zero technique implemented in the digital code to store any offset and subtract out if necessary, and an automatic startup and manual calibration to control the common mode voltages. The proposed ADC was designed in Intel’s 10nm technology. This ADC is designed to monitor DC voltages for the precision and high speed applications. The conversion rate of the analog to digital converter is programmable to 7µs or 910ns, depending on the precision or high speed application, respectively. The range of the input and reference supply is 0 to 1.25V. The ADC is designed in Intel 10nm technology using a 1.8V supply consuming an area of 0.0705mm2. This thesis explores challenges of designing a dual-purpose analog to digital converter, which include: 1.) increased offset in 10nm technology, 2.) dual application ADC that can be accurate and fast, 3.) reducing the parasitic capacitance of the ADC, and 4.) gain error that occurs in ADCs.
ContributorsSchmelter, Brooke (Author) / Bakkaloglu, Bertan (Thesis advisor) / Ogras, Umit Y. (Committee member) / Kitchen, Jennifer (Committee member) / Arizona State University (Publisher)
Created2017
Description
In thesis, a test time reduction (a low cost test) methodology for digitally-calibrated pipeline analog-to-digital converters (ADCs) is presented. A long calibration time is required in the final test to validate performance of these designs. To reduce total test time, optimized calibration technique and calibrated effective number of bits (ENOB) prediction from calibration coefficient will be presented. With the prediction technique, failed devices can be identified only without actual calibration. This technique reduces significant amount of time for the total test time.
ContributorsKim, Kibeom (Author) / Ozev, Sule (Thesis advisor) / Kitchen, Jennifer (Committee member) / Barnaby, Hugh (Committee member) / Arizona State University (Publisher)
Created2013
Description
A novel technique for measuring heavy trace elements in geologic materials with secondary ion mass spectrometry (SIMS) is presented. This technique combines moderate levels of mass resolving power (MRP) with energy filtering in order to remove molecular ion interferences while maintaining enough sensitivity to measure trace elements. The technique was evaluated by measuring a set of heavy chalcophilic elements in two sets of doped glasses similar in composition to rhyolites and basalts, respectively. The normalized count rates of Cu, As, Se, Br, and Te were plotted against concentrations to test that the signal increased linearly with concentration. The signal from any residual molecular ion interferences (e.g. ²⁹Si³⁰Si¹⁶O on ⁷⁵As) represented apparent concentrations ≤ 1 μg/g for most of the chalcophiles in rhyolitic matrices and between 1 and 10 μg/g in basaltic compositions. This technique was then applied to two suites of melt inclusions from the Bandelier Tuff: Ti-rich, primitive and Ti-poor, evolved rhyolitic compositions. The results showed that Ti-rich inclusions contained ~30 μg/g Cu and ~3 μg/g As while the Ti-poor inclusions contained near background Cu and ~6 μg/g As. Additionally, two of the Ti-rich inclusions contained > 5 μg/g of Sb and Te, well above background. Other elements were at or near background. This suggests certain chalcophilic elements may be helpful in unraveling processes relating to diversity of magma sources in large eruptions. Additionally, an unrelated experiment is presented demonstrating changes in the matrix effect on SIMS counts when normalizing against ³⁰Si⁺ versus ²⁸Si²⁺. If one uses doubly charged silicon as a reference, (common when using large-geometry SIMS instruments to study the light elements Li - C) it is important that the standards closely match the major element chemistry of the unknown.
ContributorsCarlson, Eric Norton (Author) / Hervig, Richard L (Thesis advisor) / Roggensack, Kurt (Committee member) / Burt, Donald M (Committee member) / Arizona State University (Publisher)
Created2021