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Voltage Sense Amplifier (VSA) Design For RRAM Cross-Point Memory Array Structures

Description

RRAM is an emerging technology that looks to replace FLASH NOR and possibly NAND memory. It is attractive because it uses an adjustable resistance and does not rely on charge; in the sub-10nm feature size circuitry this is critical. However,

RRAM is an emerging technology that looks to replace FLASH NOR and possibly NAND memory. It is attractive because it uses an adjustable resistance and does not rely on charge; in the sub-10nm feature size circuitry this is critical. However, RRAM cross-point arrays suffer tremendously from leakage currents that prevent proper readings in larger array sizes. In this research an exponential IV selector was added to each cell to minimize this current. Using this technique the largest array-size supportable was determined to be 512x512 cells using the conventional voltage sense amplifier by HSPICE simulations. However, with the increase in array size, the sensing latency also remarkably increases due to more sneak path currents, approaching 873 ns for the 512x512 array.

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Date Created
2016-05

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Development of Frequency Selective Surfaces for RF Interrogator Design

Description

The honors thesis presented in this document describes an extension to an electrical engineering capstone project whose scope is to develop the receiver electronics for an RF interrogator. The RF interrogator functions by detecting the change in resonant frequency

The honors thesis presented in this document describes an extension to an electrical engineering capstone project whose scope is to develop the receiver electronics for an RF interrogator. The RF interrogator functions by detecting the change in resonant frequency of (i.e, frequency of maximum backscatter from) a target resulting from an environmental input. The general idea of this honors project was to design three frequency selective surfaces that would act as surrogate backscattering or reflecting targets that each contains a distinct frequency response. Using 3-D electromagnetic simulation software, three surrogate targets exhibiting bandpass frequency responses at distinct frequencies were designed and presented in this thesis.

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Date Created
2021-05

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Memory Characterization Testing System

Description

This thesis outlines the hand-held memory characterization testing system that is to be created into a PCB (printed circuit board). The circuit is designed to apply voltages diagonally through a RRAM cell (32x32 memory array). The purpose of this swee

This thesis outlines the hand-held memory characterization testing system that is to be created into a PCB (printed circuit board). The circuit is designed to apply voltages diagonally through a RRAM cell (32x32 memory array). The purpose of this sweep across the RRAM is to measure and calculate the high and low resistance state value over a specified amount of testing cycles. With each cell having a unique output of high and low resistance states a unique characterization of each RRAM cell is able to be developed. Once the memory is characterized, the specific RRAM cell that was tested is then able to be used in a varying amount of applications for different things based on its uniqueness. Due to an inability to procure a packaged RRAM cell, a Mock-RRAM was instead designed in order to emulate the same behavior found in a RRAM cell.
The final testing circuit and Mock-RRAM are varied and complex but come together to be able to produce a measured value of the high resistance and low resistance state. This is done by the Arduino autonomously digitizing the anode voltage, cathode voltage, and output voltage. A ramp voltage that sweeps from 1V to -1V is applied to the Mock-RRAM acting as an input. This ramp voltage is then later defined as the anode voltage which is just one of the two nodes connected to the Mock-RRAM. The cathode voltage is defined as the other node at which the voltage drops across the Mock-RRAM. Using these three voltages as input to the Arduino, the Mock-RRAM path resistance is able to be calculated at any given point in time. Conducting many test cycles and calculating the high and low resistance values allows for a graph to be developed of the chaotic variation of resistance state values over time. This chaotic variation can then be analyzed further in the future in order to better predict trends and characterize the RRAM cell that was tested.
Furthermore, the interchangeability of many devices on the PCB allows for the testing system to do more in the future. Ports have been added to the final PCB in order to connect a packaged RRAM cell. This will allow for the characterization of a real RRAM memory cell later down the line rather than a Mock-RRAM as emulation. Due to the autonomous testing, very few human intervention is needed which makes this board a great baseline for others in the future looking to add to it and collect larger pools of data.

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Date Created
2019-05

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Current Sensing Amplifier Design for RRAM Crossbar Arrays

Description

Resistive Random Access Memory (RRAM) is an emerging type of non-volatile memory technology that seeks to replace FLASH memory. The RRAM crossbar array is advantageous in its relatively small cell area and faster read latency in comparison to NAND and

Resistive Random Access Memory (RRAM) is an emerging type of non-volatile memory technology that seeks to replace FLASH memory. The RRAM crossbar array is advantageous in its relatively small cell area and faster read latency in comparison to NAND and NOR FLASH memory; however, the crossbar array faces design challenges of its own in sneak-path currents that prevent proper reading of memory stored in the RRAM cell. The Current Sensing Amplifier is one method of reading RRAM crossbar arrays. HSpice simulations are used to find the associated reading delays of the Current Sensing Amplifier with respect to various sizes of RRAM crossbar arrays, as well as the largest array size compatible for accurate reading. It is found that up to 1024x1024 arrays are achievable with a worst-case read delay of 815ps, and it is further likely 2048x2048 arrays are able to be read using the Current Sensing Amplifier. In comparing the Current Sensing Amplifier latency results with previously obtained latency results from the Voltage Sensing Amplifier, it is shown that the Voltage Sensing Amplifier reads arrays in sizes up to 256x256 faster while the Current Sensing Amplifier reads larger arrays faster.

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Date Created
2016-12

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Voltage Pulse Production for RRAM Crossbar Array ASIC for Machine Learning Applications

Description

Most machine learning algorithms, and specifically neural networks, utilize vector-matrix multiplication (VMM) to process information, but these calculations are CPU intensive and can have long run-times. This issue is fundamentally outlined by the von Neumann bottleneck. Because of this undesirable

Most machine learning algorithms, and specifically neural networks, utilize vector-matrix multiplication (VMM) to process information, but these calculations are CPU intensive and can have long run-times. This issue is fundamentally outlined by the von Neumann bottleneck. Because of this undesirable expense associated with performing VMM via software, the exploration of new ways to perform the same calculations via hardware have grown more popular. When performed with hardware that is specialized to perform these calculations, VMM becomes far more power-efficient and less time consuming. This project expands upon those principles and seeks to validate the use of RRAM in this hardware.
The flexibility of the conductance of RRAM makes these devices a strong contender for hardware-driven VMM calculation for neural network computing. The conductance of these devices is affected by the pulse width of a voltage signal sent across the devices at each node. This pulse is produced on-chip and can be modified by user inputs. The design of this pulse- producing circuit, as well as the simulated and physical functionality of the design, is discussed in this Honors Thesis.
Simulation and physical testing of the pulse-producing design on the ASIC have verified correct operation of the design. This operation is imperative to the future ability of the ASIC to perform accurate VMM.

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Date Created
2022-05

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Flexible Fractal-Inspired Metamaterial for Head Imaging at 3 T MRI

Description

The ability of magnetic resonance imaging (MRI) to image any part of the human body without the effects of harmful radiation such as in CAT and PET scans established MRI as a clinical mainstay for a variety of different ailments

The ability of magnetic resonance imaging (MRI) to image any part of the human body without the effects of harmful radiation such as in CAT and PET scans established MRI as a clinical mainstay for a variety of different ailments and maladies. Short wavelengths accompany the high frequencies present in high-field MRI, and are on the same scale as the human body at a static magnetic field strength of 3 T (128 MHz). As a result of these shorter wavelengths, standing wave effects are produced in the MR bore where the patient is located. These standing waves generate bright and dark spots in the resulting MR image, which correspond to irregular regions of high and low clarity. Coil loading is also an inevitable byproduct of subject positioning inside the bore, which decreases the signal that the region of interest (ROI) receives for the same input power. Several remedies have been proposed in the literature to remedy the standing wave effect, including the placement of high permittivity dielectric pads (HPDPs) near the ROI. Despite the success of HPDPs at smoothing out image brightness, these pads are traditionally bulky and take up a large spatial volume inside the already small MR bore. In recent years, artificial periodic structures known as metamaterials have been designed to exhibit specific electromagnetic effects when placed inside the bore. Although typically thinner than HPDPs, many metamaterials in the literature are rigid and cannot conform to the shape of the patient, and some are still too bulky for practical use in clinical settings. The well-known antenna engineering concept of fractalization, or the introduction of self-similar patterns, may be introduced to the metamaterial to display a specific resonance curve as well as increase the metamaterial’s intrinsic capacitance. Proposed in this paper is a flexible fractal-inspired metamaterial for application in 3 T MR head imaging. To demonstrate the advantages of this flexibility, two different metamaterial configurations are compared to determine which produces a higher localized signal-to-noise ratio (SNR) and average signal measured in the image: in the first configuration, the metamaterial is kept rigid underneath a human head phantom to represent metamaterials in the literature (single-sided placement); and in the second, the metamaterial is wrapped around the phantom to utilize its flexibility (double-sided placement). The double-sided metamaterial setup was found to produce an increase in normalized SNR of over 5% increase in five of six chosen ROIs when compared to no metamaterial use and showed a 10.14% increase in the total average signal compared to the single-sided configuration.

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Date Created
2022-05