Matching Items (3)
Filtering by

Clear all filters

152284-Thumbnail Image.png
Description
Electromigration in metal interconnects is the most pernicious failure mechanism in semiconductor integrated circuits (ICs). Early electromigration investigations were primarily focused on aluminum interconnects for silicon-based ICs. An alternative metallization compatible with gallium arsenide (GaAs) was required in the development of high-powered radio frequency (RF) compound semiconductor devices operating at

Electromigration in metal interconnects is the most pernicious failure mechanism in semiconductor integrated circuits (ICs). Early electromigration investigations were primarily focused on aluminum interconnects for silicon-based ICs. An alternative metallization compatible with gallium arsenide (GaAs) was required in the development of high-powered radio frequency (RF) compound semiconductor devices operating at higher current densities and elevated temperatures. Gold-based metallization was implemented on GaAs devices because it uniquely forms a very low resistance ohmic contact and gold interconnects have superior electrical and thermal conductivity properties. Gold (Au) was also believed to have improved resistance to electromigration due to its higher melting temperature, yet electromigration reliability data on passivated Au interconnects is scarce and inadequate in the literature. Therefore, the objective of this research was to characterize the electromigration lifetimes of passivated Au interconnects under precisely controlled stress conditions with statistically relevant quantities to obtain accurate model parameters essential for extrapolation to normal operational conditions. This research objective was accomplished through measurement of electromigration lifetimes of large quantities of passivated electroplated Au interconnects utilizing high-resolution in-situ resistance monitoring equipment. Application of moderate accelerated stress conditions with a current density limited to 2 MA/cm2 and oven temperatures in the range of 300°C to 375°C avoided electrical overstress and severe Joule-heated temperature gradients. Temperature coefficients of resistance (TCRs) were measured to determine accurate Joule-heated Au interconnect film temperatures. A failure criterion of 50% resistance degradation was selected to prevent thermal runaway and catastrophic metal ruptures that are problematic of open circuit failure tests. Test structure design was optimized to reduce resistance variation and facilitate failure analysis. Characterization of the Au microstructure yielded a median grain size of 0.91 ìm. All Au lifetime distributions followed log-normal distributions and Black's model was found to be applicable. An activation energy of 0.80 ± 0.05 eV was measured from constant current electromigration tests at multiple temperatures. A current density exponent of 1.91 was extracted from multiple current densities at a constant temperature. Electromigration-induced void morphology along with these model parameters indicated grain boundary diffusion is dominant and the void nucleation mechanism controlled the failure time.
ContributorsKilgore, Stephen (Author) / Adams, James (Thesis advisor) / Schroder, Dieter (Thesis advisor) / Krause, Stephen (Committee member) / Gaw, Craig (Committee member) / Arizona State University (Publisher)
Created2013
149710-Thumbnail Image.png
Description
Fuel cells, particularly solid oxide fuel cells (SOFC), are important for the future of greener and more efficient energy sources. Although SOFCs have been in existence for over fifty years, they have not been deployed extensively because they need to be operated at a high temperature (∼1000 °C), are expensive,

Fuel cells, particularly solid oxide fuel cells (SOFC), are important for the future of greener and more efficient energy sources. Although SOFCs have been in existence for over fifty years, they have not been deployed extensively because they need to be operated at a high temperature (∼1000 °C), are expensive, and have slow response to changes in energy demands. One important need for commercialization of SOFCs is a lowering of their operating temperature, which requires an electrolyte that can operate at lower temperatures. Doped ceria is one such candidate. For this dissertation work I have studied different types of doped ceria to understand the mechanism of oxygen vacancy diffusion through the bulk. Doped ceria is important because they have high ionic conductivities thus making them attractive candidates for the electrolytes of solid oxide fuel cells. In particular, I have studied how the ionic conductivities are improved in these doped materials by studying the oxygen-vacancy formations and migrations. In this dissertation I describe the application of density functional theory (DFT) and Kinetic Lattice Monte Carlo (KLMC) simulations to calculate the vacancy diffusion and ionic conductivities in doped ceria. The dopants used are praseodymium (Pr), gadolinium (Gd), and neodymium (Nd), all belonging to the lanthanide series. The activation energies for vacancy migration between different nearest neighbor (relative to the dopant) positions were calculated using the commercial DFT code VASP (Vienna Ab-initio Simulation Package). These activation energies were then used as inputs to the KLMC code that I co-developed. The KLMC code was run for different temperatures (673 K to 1073 K) and for different dopant concentrations (0 to 40%). These simulations have resulted in the prediction of dopant concentrations for maximum ionic conductivity at a given temperature.
ContributorsAnwar, Shahriar (Author) / Adams, James B (Thesis advisor) / Crozier, Peter (Committee member) / Krause, Stephen (Committee member) / Arizona State University (Publisher)
Created2011
150722-Thumbnail Image.png
Description
In 2022, integrated circuit interconnects will approach 10 nm and the diffusion barrier layers needed to ensure long lasting devices will be at 1 nm. This dimension means the interconnect will be dominated by the interface and it has been shown the interface is currently eroding device performance. The standard

In 2022, integrated circuit interconnects will approach 10 nm and the diffusion barrier layers needed to ensure long lasting devices will be at 1 nm. This dimension means the interconnect will be dominated by the interface and it has been shown the interface is currently eroding device performance. The standard interconnect system has three layers - a Copper metal core, a Tantalum Adhesion layer and a Tantalum Nitride Diffusion Barrier Layer. An alternate interconnect schema is a Tantalum Nitride barrier layer and Silver as a metal. The adhesion layer is removed from the system along with changing to an alternate, low resistivity metal. First principles are used to assess the interface of the Silver and Tantalum Nitride. Several stoichiometric 1:1 Tantalum Nitride polymorphs are assessed and it is found that the Fe2P crystal structure is actually the most stable crystal structure which is at odds with the published phase diagram for ambient crystal structure. The surface stability of Fe2P-TaN is assessed and the absorption enthalpy of Silver adatoms is calculated. Finally, the thermodynamic stability of the TaN-Ag interconnect system is assessed.
ContributorsGrumski, Michael (Author) / Adams, James (Thesis advisor) / Krause, Stephen (Committee member) / Alford, Terry (Committee member) / Arizona State University (Publisher)
Created2012